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From: b35083@freescale.com (Jingchang Lu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] pinctrl/imx: add zero register offset valid for Vybrid platform
Date: Thu, 2 May 2013 15:48:52 +0800	[thread overview]
Message-ID: <1367480932-22318-2-git-send-email-b35083@freescale.com> (raw)
In-Reply-To: <1367480932-22318-1-git-send-email-b35083@freescale.com>

On some platform such as Vybrid, offset of mux and pad ctrl register
may be zero. This patch add a platform condition to imx core pinctrl
framework, making zero register offset valid on setting mux_mode and
pad config value.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
---
 drivers/pinctrl/pinctrl-imx.c | 34 ++++++++++++++++++++++------------
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-imx.c b/drivers/pinctrl/pinctrl-imx.c
index 4fcfff92..b4d7c91 100644
--- a/drivers/pinctrl/pinctrl-imx.c
+++ b/drivers/pinctrl/pinctrl-imx.c
@@ -221,10 +221,14 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
 		pin_id = pins[i];
 		pin_reg = &info->pin_regs[pin_id];
 
-		if (!pin_reg->mux_reg) {
-			dev_err(ipctl->dev, "Pin(%s) does not support mux function\n",
-				info->pins[pin_id].name);
-			return -EINVAL;
+		/* mux_reg offset maybe zero on some platform such as Vybrid */
+		if (!of_machine_is_compatible("fsl,mvf600")) {
+			if (!pin_reg->mux_reg) {
+				dev_err(ipctl->dev,
+					"Pin(%s) does not support mux function\n",
+					info->pins[pin_id].name);
+				return -EINVAL;
+			}
 		}
 
 		writel(mux[i], ipctl->base + pin_reg->mux_reg);
@@ -287,10 +291,13 @@ static int imx_pinconf_get(struct pinctrl_dev *pctldev,
 	const struct imx_pinctrl_soc_info *info = ipctl->info;
 	const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
 
-	if (!pin_reg->conf_reg) {
-		dev_err(info->dev, "Pin(%s) does not support config function\n",
-			info->pins[pin_id].name);
-		return -EINVAL;
+	if (!of_machine_is_compatible("fsl,mvf600")) {
+		if (!pin_reg->conf_reg) {
+			dev_err(info->dev,
+				"Pin(%s) does not support config function\n",
+				info->pins[pin_id].name);
+			return -EINVAL;
+		}
 	}
 
 	*config = readl(ipctl->base + pin_reg->conf_reg);
@@ -305,10 +312,13 @@ static int imx_pinconf_set(struct pinctrl_dev *pctldev,
 	const struct imx_pinctrl_soc_info *info = ipctl->info;
 	const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
 
-	if (!pin_reg->conf_reg) {
-		dev_err(info->dev, "Pin(%s) does not support config function\n",
-			info->pins[pin_id].name);
-		return -EINVAL;
+	if (!of_machine_is_compatible("fsl,mvf600")) {
+		if (!pin_reg->conf_reg) {
+			dev_err(info->dev,
+				"Pin(%s) does not support config function\n",
+				info->pins[pin_id].name);
+			return -EINVAL;
+		}
 	}
 
 	dev_dbg(ipctl->dev, "pinconf set pin %s\n",
-- 
1.8.0

  reply	other threads:[~2013-05-02  7:48 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-02  7:48 [PATCH V2 1/2] pinctrl/mvf: add MVF pinctrl driver Jingchang Lu
2013-05-02  7:48 ` Jingchang Lu [this message]
2013-05-02 18:27   ` [PATCH 2/2] pinctrl/imx: add zero register offset valid for Vybrid platform Sascha Hauer
2013-05-03  8:35     ` Shawn Guo
2013-05-06  2:54 ` [PATCH V2 1/2] pinctrl/mvf: add MVF pinctrl driver Shawn Guo

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