From: Wadim Egorov <w.egorov@phytec.de>
To: Garrett Giordano <ggiordano@phytec.com>, <nm@ti.com>,
<vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<r-gunasekaran@ti.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<upstream@lists.phytec.de>
Subject: Re: [PATCH] arm64: dts: ti: phycore-am64: Add R5F DMA Region and Mailboxes
Date: Tue, 5 Dec 2023 18:26:00 +0100 [thread overview]
Message-ID: <136b3721-2ea7-488a-89cc-cc74f631f5fc@phytec.de> (raw)
In-Reply-To: <20231204212304.1736306-1-ggiordano@phytec.com>
Am 04.12.23 um 22:23 schrieb Garrett Giordano:
> Communication between the R5F subsystem and Linux takes place using DMA
> memory regions and mailboxes. Here we add DT nodes for the memory
> regions and mailboxes to facilitate communication between the R5
> clusters and Linux as remoteproc will fail to start if no memory
> regions or mailboxes are provided.
>
> Fixes: c48ac0efe6d7 ("arm64: dts: ti: Add support for phyBOARD-Electra-AM642")
> Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
> ---
> .../boot/dts/ti/k3-am64-phycore-som.dtsi | 102 +++++++++++++++++-
> 1 file changed, 101 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> index 1c2c8f0daca9..37a33006c1fc 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> @@ -29,7 +29,7 @@ memory@80000000 {
> reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
> };
>
> - reserved-memory {
> + reserved_memory: reserved-memory {
> #address-cells = <2>;
> #size-cells = <2>;
> ranges;
> @@ -39,6 +39,54 @@ secure_ddr: optee@9e800000 {
> alignment = <0x1000>;
> no-map;
> };
> +
> + main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa0000000 0x00 0x100000>;
> + no-map;
> + };
> +
> + main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa0100000 0x00 0xf00000>;
> + no-map;
> + };
> +
> + main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa1000000 0x00 0x100000>;
> + no-map;
> + };
> +
> + main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa1100000 0x00 0xf00000>;
> + no-map;
> + };
> +
> + main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa2000000 0x00 0x100000>;
> + no-map;
> + };
> +
> + main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa2100000 0x00 0xf00000>;
> + no-map;
> + };
> +
> + main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa3000000 0x00 0x100000>;
> + no-map;
> + };
> +
> + main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0xa3100000 0x00 0xf00000>;
> + no-map;
> + };
> };
>
> leds {
> @@ -160,6 +208,34 @@ &cpsw_port2 {
> status = "disabled";
> };
>
> +&mailbox0_cluster2 {
> + status = "okay";
> +
> + mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
> + ti,mbox-rx = <0 0 2>;
> + ti,mbox-tx = <1 0 2>;
> + };
> +
> + mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
> + ti,mbox-rx = <2 0 2>;
> + ti,mbox-tx = <3 0 2>;
> + };
> +};
> +
> +&mailbox0_cluster4 {
> + status = "okay";
> +
> + mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
> + ti,mbox-rx = <0 0 2>;
> + ti,mbox-tx = <1 0 2>;
> + };
> +
> + mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
> + ti,mbox-rx = <2 0 2>;
> + ti,mbox-tx = <3 0 2>;
> + };
> +};
> +
> &main_i2c0 {
> status = "okay";
> pinctrl-names = "default";
> @@ -180,6 +256,30 @@ i2c_som_rtc: rtc@52 {
> };
> };
>
> +&main_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
> + memory-region = <&main_r5fss0_core0_dma_memory_region>,
> + <&main_r5fss0_core0_memory_region>;
> +};
> +
> +&main_r5fss0_core1 {
> + mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
> + memory-region = <&main_r5fss0_core1_dma_memory_region>,
> + <&main_r5fss0_core1_memory_region>;
> +};
> +
> +&main_r5fss1_core0 {
> + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
> + memory-region = <&main_r5fss1_core0_dma_memory_region>,
> + <&main_r5fss1_core0_memory_region>;
> +};
> +
> +&main_r5fss1_core1 {
> + mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
> + memory-region = <&main_r5fss1_core1_dma_memory_region>,
> + <&main_r5fss1_core1_memory_region>;
> +};
> +
> &ospi0 {
> status = "okay";
> pinctrl-names = "default";
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next prev parent reply other threads:[~2023-12-05 17:26 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-04 21:23 [PATCH] arm64: dts: ti: phycore-am64: Add R5F DMA Region and Mailboxes Garrett Giordano
2023-12-05 17:26 ` Wadim Egorov [this message]
2023-12-06 16:02 ` Nishanth Menon
[not found] <20231102201216.3771589-1-ggiordano@phytec.com>
2023-11-03 0:17 ` Nishanth Menon
2023-11-03 9:00 ` Wadim Egorov
2023-12-04 13:44 ` Nishanth Menon
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