[PATCH 1/4] ARM: dts: imx27-phytec-phycore: Add reset GPIO for FEC

[PATCH 1/4] ARM: dts: imx27-phytec-phycore: Add reset GPIO for FEC

[Alexander Shiyan]

FEC (KSZ8001L) reset pin is connected to GPIOC30.
Add this definition to dts.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/boot/dts/imx27-phytec-phycore.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts
index eb7d9fa..a4c0256 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts
@@ -58,6 +58,7 @@
 
 		aipi at 10020000 { /* aipi2 */
 			ethernet at 1002b000 {
+				phy-reset-gpios = <&gpio3 30 0>;
 				status = "okay";
 			};
 		};
-- 
1.8.1.5

[PATCH 2/4] ARM: dts: imx27-phytec-phycore: Rename file to match functionality

[Alexander Shiyan]

PCM038 dts can be used as base for development kit board or any
custom PCB designs. Renames this file to match functionality.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/boot/dts/Makefile                                              | 2 +-
 .../boot/dts/{imx27-phytec-phycore.dts => imx27-phytec-phycore-som.dts} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm/boot/dts/{imx27-phytec-phycore.dts => imx27-phytec-phycore-som.dts} (100%)

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 78695bd..8450c14 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -107,7 +107,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx27-apf27.dtb \
 	imx27-apf27dev.dtb \
 	imx27-pdk.dtb \
-	imx27-phytec-phycore.dtb \
+	imx27-phytec-phycore-som.dtb \
 	imx31-bug.dtb \
 	imx51-apf51.dtb \
 	imx51-apf51dev.dtb \
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
similarity index 100%
rename from arch/arm/boot/dts/imx27-phytec-phycore.dts
rename to arch/arm/boot/dts/imx27-phytec-phycore-som.dts
-- 
1.8.1.5

[PATCH 3/4] ARM: dts: imx27-phytec-phycore-som: Remove UART definitions

[Alexander Shiyan]

UART1 and UART2 can be unused on some designs with PCM038 module.
Remove these definitions from basic dts and lets choose user only
necessary UARTs in custom designs.
Keep UART0 for using this one as boot console, but since we have
not way to disable usage RTSCTS signals, remove this parameter for UART0.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/boot/dts/imx27-phytec-phycore-som.dts | 11 -----------
 1 file changed, 11 deletions(-)

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
index a4c0256..73f4b28 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
@@ -23,17 +23,6 @@
 	soc {
 		aipi at 10000000 { /* aipi1 */
 			serial at 1000a000 {
-				fsl,uart-has-rtscts;
-				status = "okay";
-			};
-
-			serial at 1000b000 {
-				fsl,uart-has-rtscts;
-				status = "okay";
-			};
-
-			serial at 1000c000 {
-				fsl,uart-has-rtscts;
 				status = "okay";
 			};
 
-- 
1.8.1.5

[PATCH 4/4] ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

[Alexander Shiyan]

Patch adds initial dts for Phytec PCM970 Rapid development kit.
- Added definition for UART0 and UART1.
- Added additional SPI chipselect which used on RDK for ZegBee module.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
 arch/arm/boot/dts/Makefile                     |  1 +
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 8450c14..eee371f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
 	imx27-apf27dev.dtb \
 	imx27-pdk.dtb \
 	imx27-phytec-phycore-som.dtb \
+	imx27-phytec-phycore-rdk.dtb \
 	imx31-bug.dtb \
 	imx51-apf51.dtb \
 	imx51-apf51dev.dtb \
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
new file mode 100644
index 0000000..f8a7a49
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -0,0 +1,29 @@
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include "imx27-phytec-phycore-som.dts"
+
+/ {
+	model = "Phytec pcm970";
+	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
+};
+
+&cspi1 {
+	fsl,spi-num-chipselects = <2>;
+	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
+};
+
+&uart1 {
+	fsl,uart-has-rtscts;
+};
+
+&uart2 {
+	fsl,uart-has-rtscts;
+	status = "okay";
+};
-- 
1.8.1.5

[PATCH 4/4] ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

[Sascha Hauer]

On Sat, Jun 01, 2013 at 09:54:13AM +0400, Alexander Shiyan wrote:
> Patch adds initial dts for Phytec PCM970 Rapid development kit.
> - Added definition for UART0 and UART1.
> - Added additional SPI chipselect which used on RDK for ZegBee module.
> 
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> ---
>  arch/arm/boot/dts/Makefile                     |  1 +
>  arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
>  2 files changed, 30 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 8450c14..eee371f 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
>  	imx27-apf27dev.dtb \
>  	imx27-pdk.dtb \
>  	imx27-phytec-phycore-som.dtb \
> +	imx27-phytec-phycore-rdk.dtb \
>  	imx31-bug.dtb \
>  	imx51-apf51.dtb \
>  	imx51-apf51dev.dtb \
> diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> new file mode 100644
> index 0000000..f8a7a49
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> @@ -0,0 +1,29 @@
> +/*
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +#include "imx27-phytec-phycore-som.dts"
> +
> +/ {
> +	model = "Phytec pcm970";
> +	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
> +};
> +
> +&cspi1 {
> +	fsl,spi-num-chipselects = <2>;
> +	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
> +};

The first chipselect connects to the mc13783 PMIC which is on the
module, not on the baseboard. Also this is a no-op since the status
property of the cspi is not changed to 'okay'.
I suspect you already have a patch adding mc13783 support to the module
which should be in this series ;)

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re[2]: [PATCH 4/4] ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

[Alexander Shiyan]

> On Sat, Jun 01, 2013 at 09:54:13AM +0400, Alexander Shiyan wrote:
> > Patch adds initial dts for Phytec PCM970 Rapid development kit.
> > - Added definition for UART0 and UART1.
> > - Added additional SPI chipselect which used on RDK for ZegBee module.
> > 
> > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> > ---
> >  arch/arm/boot/dts/Makefile                     |  1 +
> >  arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
> >  2 files changed, 30 insertions(+)
> >  create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > 
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index 8450c14..eee371f 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> >  	imx27-apf27dev.dtb \
> >  	imx27-pdk.dtb \
> >  	imx27-phytec-phycore-som.dtb \
> > +	imx27-phytec-phycore-rdk.dtb \
> >  	imx31-bug.dtb \
> >  	imx51-apf51.dtb \
> >  	imx51-apf51dev.dtb \
> > diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > new file mode 100644
> > index 0000000..f8a7a49
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > @@ -0,0 +1,29 @@
> > +/*
> > + * The code contained herein is licensed under the GNU General Public
> > + * License. You may obtain a copy of the GNU General Public License
> > + * Version 2 or later at the following locations:
> > + *
> > + * http://www.opensource.org/licenses/gpl-license.html
> > + * http://www.gnu.org/copyleft/gpl.html
> > + */
> > +
> > +#include "imx27-phytec-phycore-som.dts"
> > +
> > +/ {
> > +	model = "Phytec pcm970";
> > +	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
> > +};
> > +
> > +&cspi1 {
> > +	fsl,spi-num-chipselects = <2>;
> > +	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
> > +};
> 
> The first chipselect connects to the mc13783 PMIC which is on the
> module, not on the baseboard. Also this is a no-op since the status
> property of the cspi is not changed to 'okay'.
> I suspect you already have a patch adding mc13783 support to the module
> which should be in this series ;)

MC13783 is already here. See my previous patch for this SOM:
http://www.spinics.net/lists/arm-kernel/msg240873.html

---

[PATCH 4/4] ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

[Sascha Hauer]

On Sat, Jun 01, 2013 at 12:05:57PM +0400, Alexander Shiyan wrote:
> > On Sat, Jun 01, 2013 at 09:54:13AM +0400, Alexander Shiyan wrote:
> > > Patch adds initial dts for Phytec PCM970 Rapid development kit.
> > > - Added definition for UART0 and UART1.
> > > - Added additional SPI chipselect which used on RDK for ZegBee module.
> > > 
> > > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> > > ---
> > >  arch/arm/boot/dts/Makefile                     |  1 +
> > >  arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
> > >  2 files changed, 30 insertions(+)
> > >  create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > > 
> > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > > index 8450c14..eee371f 100644
> > > --- a/arch/arm/boot/dts/Makefile
> > > +++ b/arch/arm/boot/dts/Makefile
> > > @@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> > >  	imx27-apf27dev.dtb \
> > >  	imx27-pdk.dtb \
> > >  	imx27-phytec-phycore-som.dtb \
> > > +	imx27-phytec-phycore-rdk.dtb \
> > >  	imx31-bug.dtb \
> > >  	imx51-apf51.dtb \
> > >  	imx51-apf51dev.dtb \
> > > diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > > new file mode 100644
> > > index 0000000..f8a7a49
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > > @@ -0,0 +1,29 @@
> > > +/*
> > > + * The code contained herein is licensed under the GNU General Public
> > > + * License. You may obtain a copy of the GNU General Public License
> > > + * Version 2 or later at the following locations:
> > > + *
> > > + * http://www.opensource.org/licenses/gpl-license.html
> > > + * http://www.gnu.org/copyleft/gpl.html
> > > + */
> > > +
> > > +#include "imx27-phytec-phycore-som.dts"
> > > +
> > > +/ {
> > > +	model = "Phytec pcm970";
> > > +	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
> > > +};
> > > +
> > > +&cspi1 {
> > > +	fsl,spi-num-chipselects = <2>;
> > > +	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
> > > +};
> > 
> > The first chipselect connects to the mc13783 PMIC which is on the
> > module, not on the baseboard. Also this is a no-op since the status
> > property of the cspi is not changed to 'okay'.
> > I suspect you already have a patch adding mc13783 support to the module
> > which should be in this series ;)
> 
> MC13783 is already here. See my previous patch for this SOM:
> http://www.spinics.net/lists/arm-kernel/msg240873.html

Ah, nice. I didn't remember that. In this case you can get my:

Acked-by: Sascha Hauer <s.hauer@pengutronix.de>

for this series

Sascha

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re[3]: [PATCH 4/4] ARM: dts: imx27-phytec-phycore-som: Add initial support for PCM970 RDK

[Alexander Shiyan]

> > On Sat, Jun 01, 2013 at 09:54:13AM +0400, Alexander Shiyan wrote:
> > > Patch adds initial dts for Phytec PCM970 Rapid development kit.
> > > - Added definition for UART0 and UART1.
> > > - Added additional SPI chipselect which used on RDK for ZegBee module.
> > > 
> > > Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
> > > ---
> > >  arch/arm/boot/dts/Makefile                     |  1 +
> > >  arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 29 ++++++++++++++++++++++++++
> > >  2 files changed, 30 insertions(+)
> > >  create mode 100644 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > > 
> > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > > index 8450c14..eee371f 100644
> > > --- a/arch/arm/boot/dts/Makefile
> > > +++ b/arch/arm/boot/dts/Makefile
> > > @@ -108,6 +108,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> > >  	imx27-apf27dev.dtb \
> > >  	imx27-pdk.dtb \
> > >  	imx27-phytec-phycore-som.dtb \
> > > +	imx27-phytec-phycore-rdk.dtb \
> > >  	imx31-bug.dtb \
> > >  	imx51-apf51.dtb \
> > >  	imx51-apf51dev.dtb \
> > > diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > > new file mode 100644
> > > index 0000000..f8a7a49
> > > --- /dev/null
> > > +++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
> > > @@ -0,0 +1,29 @@
> > > +/*
> > > + * The code contained herein is licensed under the GNU General Public
> > > + * License. You may obtain a copy of the GNU General Public License
> > > + * Version 2 or later at the following locations:
> > > + *
> > > + * http://www.opensource.org/licenses/gpl-license.html
> > > + * http://www.gnu.org/copyleft/gpl.html
> > > + */
> > > +
> > > +#include "imx27-phytec-phycore-som.dts"
> > > +
> > > +/ {
> > > +	model = "Phytec pcm970";
> > > +	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
> > > +};
> > > +
> > > +&cspi1 {
> > > +	fsl,spi-num-chipselects = <2>;
> > > +	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
> > > +};
> > 
> > The first chipselect connects to the mc13783 PMIC which is on the
> > module, not on the baseboard. Also this is a no-op since the status
> > property of the cspi is not changed to 'okay'.
> > I suspect you already have a patch adding mc13783 support to the module
> > which should be in this series ;)
> 
> MC13783 is already here. See my previous patch for this SOM:
> http://www.spinics.net/lists/arm-kernel/msg240873.html

I have given you a wrong link. Sorry. This is a patch for MC13783 regulator.
Here is a patch for add dt-node to the module:
http://comments.gmane.org/gmane.linux.ports.arm.kernel/234757

---

[PATCH 1/4] ARM: dts: imx27-phytec-phycore: Add reset GPIO for FEC

[Shawn Guo]

On Sat, Jun 01, 2013 at 09:54:10AM +0400, Alexander Shiyan wrote:
> FEC (KSZ8001L) reset pin is connected to GPIOC30.
> Add this definition to dts.
> 
> Signed-off-by: Alexander Shiyan <shc_work@mail.ru>

Applied the series, thanks.

Shawn

> ---
>  arch/arm/boot/dts/imx27-phytec-phycore.dts | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts
> index eb7d9fa..a4c0256 100644
> --- a/arch/arm/boot/dts/imx27-phytec-phycore.dts
> +++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts
> @@ -58,6 +58,7 @@
>  
>  		aipi at 10020000 { /* aipi2 */
>  			ethernet at 1002b000 {
> +				phy-reset-gpios = <&gpio3 30 0>;
>  				status = "okay";
>  			};
>  		};
> -- 
> 1.8.1.5
>