linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: jagarwal@nvidia.com (Jay Agarwal)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V3 4/4] ARM: tegra: pcie: Enable PCIe controller on Cardhu
Date: Wed, 5 Jun 2013 00:27:32 +0530	[thread overview]
Message-ID: <1370372252-4332-4-git-send-email-jagarwal@nvidia.com> (raw)
In-Reply-To: <1370372252-4332-1-git-send-email-jagarwal@nvidia.com>

- Enable PCIe controller on Cardhu
- Only port 2 is connected on this board
- Add regulators required for Tegra30

Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
---
Patch is based on remotes/gitorious_thierryreding_linux/tegra/next and should be applied on top of this.

Changes in V3:
- Added num-lanes property for cardhu as per review comments

 arch/arm/boot/dts/tegra30-cardhu.dtsi |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 8ad4841..b6270e3 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -27,6 +27,24 @@
 	model = "NVIDIA Tegra30 Cardhu evaluation board";
 	compatible = "nvidia,cardhu", "nvidia,tegra30";
 
+	pcie-controller {
+		status = "okay";
+		pex-clk-supply = <&pex_hvdd_3v3_reg>;
+		vdd-supply = <&ldo1_reg>;
+		avdd-supply = <&ldo2_reg>;
+
+		pci at 1,0 {
+			nvidia,num-lanes = <4>;
+		};
+		pci at 2,0 {
+			nvidia,num-lanes = <1>;
+		};
+		pci at 3,0 {
+			status = "okay";
+			nvidia,num-lanes = <1>;
+		};
+	};
+
 	host1x {
 		dc at 54200000 {
 			rgb {
-- 
1.7.0.4

  parent reply	other threads:[~2013-06-04 18:57 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-04 18:57 [PATCH V3 1/4] ARM: tegra30: clocks: Fix pciex clock registration Jay Agarwal
2013-06-04 18:57 ` [PATCH V3 2/4] ARM: tegra: pcie: Add tegra3 support Jay Agarwal
2013-06-04 19:17   ` Stephen Warren
2013-06-05 14:57     ` Jay Agarwal
2013-06-10 19:50     ` Thierry Reding
2013-06-11  4:43       ` Jay Agarwal
2013-06-11 10:16         ` Thierry Reding
2013-06-11 10:40           ` Jay Agarwal
2013-06-04 18:57 ` [PATCH V3 3/4] ARM: dts: tegra: Correct PCIe entry Jay Agarwal
2013-06-10 19:55   ` Thierry Reding
2013-06-11  4:52     ` Jay Agarwal
2013-06-11  7:30     ` Peter De Schrijver
2013-07-17  4:56       ` Thierry Reding
2013-06-04 18:57 ` Jay Agarwal [this message]
2013-06-04 19:08 ` [PATCH V3 1/4] ARM: tegra30: clocks: Fix pciex clock registration Stephen Warren
2013-06-11 22:17   ` Mike Turquette
2013-06-12  7:11     ` Jay Agarwal

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1370372252-4332-4-git-send-email-jagarwal@nvidia.com \
    --to=jagarwal@nvidia.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).