* [PATCH v2] ARM: mx6: Fix the number of reported cores
@ 2013-07-03 16:55 Fabio Estevam
2013-07-04 2:01 ` Shawn Guo
0 siblings, 1 reply; 2+ messages in thread
From: Fabio Estevam @ 2013-07-03 16:55 UTC (permalink / raw)
To: linux-arm-kernel
From: Fabio Estevam <fabio.estevam@freescale.com>
On a mx6 quad-core processor:
$ cat /proc/cpuinfo
processor : 0
model name : ARMv7 Processor rev 10 (v7l)
BogoMIPS : 1581.05
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc09
CPU revision : 10
,which incorrectly shows this is a single core device.
Commit a0ae0240 (ARM: kernel: add device tree init map function) introduced the
following requirement according to Documentation/devicetree/bindings/arm/cpus.txt:
"For the ARM architecture every CPU node must contain the following properties:
- device_type: must be "cpu"
Pass the 'device_type' property for each cpu node, so that we can have all the
four cores correctly reported again.
Cc: <stable@vger.kernel.org> #3.10
Reported-by: Mike Loebl <mloebl@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v1:
- Add missing ";" in the dual-lite .dtsi
arch/arm/boot/dts/imx6dl.dtsi | 2 ++
arch/arm/boot/dts/imx6q.dtsi | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 5bcdf3a..62dc781 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -18,12 +18,14 @@
cpu at 0 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
};
cpu at 1 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 21e6758..dc54a72 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -18,6 +18,7 @@
cpu at 0 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
operating-points = <
@@ -39,18 +40,21 @@
cpu@1 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};
cpu at 2 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <2>;
next-level-cache = <&L2>;
};
cpu at 3 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <3>;
next-level-cache = <&L2>;
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH v2] ARM: mx6: Fix the number of reported cores
2013-07-03 16:55 [PATCH v2] ARM: mx6: Fix the number of reported cores Fabio Estevam
@ 2013-07-04 2:01 ` Shawn Guo
0 siblings, 0 replies; 2+ messages in thread
From: Shawn Guo @ 2013-07-04 2:01 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jul 03, 2013 at 01:55:10PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> On a mx6 quad-core processor:
>
> $ cat /proc/cpuinfo
> processor : 0
> model name : ARMv7 Processor rev 10 (v7l)
> BogoMIPS : 1581.05
> Features : swp half thumb fastmult vfp edsp neon vfpv3 tls
> CPU implementer : 0x41
> CPU architecture: 7
> CPU variant : 0x2
> CPU part : 0xc09
> CPU revision : 10
>
> ,which incorrectly shows this is a single core device.
>
> Commit a0ae0240 (ARM: kernel: add device tree init map function) introduced the
> following requirement according to Documentation/devicetree/bindings/arm/cpus.txt:
> "For the ARM architecture every CPU node must contain the following properties:
>
> - device_type: must be "cpu"
>
> Pass the 'device_type' property for each cpu node, so that we can have all the
> four cores correctly reported again.
>
> Cc: <stable@vger.kernel.org> #3.10
> Reported-by: Mike Loebl <mloebl@gmail.com>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Lorenzo had commit 7925e89 (ARM: dts: imx: cpus/cpu nodes dts updates)
fixing up thing, which has just hit the mainline. But it seems we were
unaware of this user space regression and did not apply the fix to 3.10.
Now we have to apply it for 3.10 via stable tree.
Shawn
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