* [PATCH 1/3] ARM: imx: Select CACHE_L2X0
@ 2013-07-08 17:58 Fabio Estevam
2013-07-08 17:58 ` [PATCH 2/3] ARM: mx3: Select ARM_ERRATA_411920 Fabio Estevam
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Fabio Estevam @ 2013-07-08 17:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Fabio Estevam <fabio.estevam@freescale.com>
Select CACHE_L2X0 for mx31/35/51/53/6q/6sl.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/mach-imx/Kconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index f546560..f864af2 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -122,6 +122,7 @@ config SOC_IMX27
config SOC_IMX31
bool
+ select CACHE_L2X0
select COMMON_CLK
select CPU_V6
select IMX_HAVE_PLATFORM_MXC_RNGA
@@ -131,6 +132,7 @@ config SOC_IMX31
config SOC_IMX35
bool
select ARCH_MXC_IOMUX_V3
+ select CACHE_L2X0
select COMMON_CLK
select CPU_V6K
select HAVE_EPIT
@@ -142,6 +144,7 @@ config SOC_IMX5
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select ARCH_MXC_IOMUX_V3
+ select CACHE_L2X0
select COMMON_CLK
select CPU_V7
select MXC_TZIC
@@ -785,6 +788,7 @@ config SOC_IMX6Q
bool "i.MX6 Quad/DualLite support"
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
+ select CACHE_L2X0
select ARM_CPU_SUSPEND if PM
select ARM_ERRATA_754322
select ARM_ERRATA_764369 if SMP
@@ -815,6 +819,7 @@ config SOC_IMX6SL
select ARM_ERRATA_754322
select ARM_ERRATA_775420
select ARM_GIC
+ select CACHE_L2X0
select CPU_V7
select HAVE_IMX_ANATOP
select HAVE_IMX_GPC
--
1.8.1.2
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/3] ARM: mx3: Select ARM_ERRATA_411920
2013-07-08 17:58 [PATCH 1/3] ARM: imx: Select CACHE_L2X0 Fabio Estevam
@ 2013-07-08 17:58 ` Fabio Estevam
2013-07-08 18:06 ` Alexander Shiyan
2013-07-08 17:58 ` [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base Fabio Estevam
2013-07-09 6:26 ` [PATCH 1/3] ARM: imx: Select CACHE_L2X0 Shawn Guo
2 siblings, 1 reply; 10+ messages in thread
From: Fabio Estevam @ 2013-07-08 17:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Fabio Estevam <fabio.estevam@freescale.com>
ARM_ERRATA_411920 affects mx31 and mx35, so let's enable it:
ARM_ERRATA_411920:
Invalidation of the Instruction Cache operation can
fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
It does not affect the MPCore. This option enables the ARM Ltd.
recommended workaround.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/mach-imx/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index f864af2..a0a89c4 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -122,6 +122,7 @@ config SOC_IMX27
config SOC_IMX31
bool
+ select ARM_ERRATA_411920
select CACHE_L2X0
select COMMON_CLK
select CPU_V6
@@ -132,6 +133,7 @@ config SOC_IMX31
config SOC_IMX35
bool
select ARCH_MXC_IOMUX_V3
+ select ARM_ERRATA_411920
select CACHE_L2X0
select COMMON_CLK
select CPU_V6K
--
1.8.1.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base
2013-07-08 17:58 [PATCH 1/3] ARM: imx: Select CACHE_L2X0 Fabio Estevam
2013-07-08 17:58 ` [PATCH 2/3] ARM: mx3: Select ARM_ERRATA_411920 Fabio Estevam
@ 2013-07-08 17:58 ` Fabio Estevam
2013-07-09 6:24 ` Shawn Guo
2013-07-09 6:26 ` [PATCH 1/3] ARM: imx: Select CACHE_L2X0 Shawn Guo
2 siblings, 1 reply; 10+ messages in thread
From: Fabio Estevam @ 2013-07-08 17:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Fabio Estevam <fabio.estevam@freescale.com>
After l2x0_base has been used, we should free it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
arch/arm/mach-imx/mm-imx3.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 0884ca9..3143f5e 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -113,6 +113,7 @@ static void __init imx3_init_l2x0(void)
}
l2x0_init(l2x0_base, 0x00030024, 0x00000000);
+ iounmap(l2x0_base);
#endif
}
--
1.8.1.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base
2013-07-08 17:58 ` [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base Fabio Estevam
@ 2013-07-09 6:24 ` Shawn Guo
2013-07-09 18:16 ` Fabio Estevam
0 siblings, 1 reply; 10+ messages in thread
From: Shawn Guo @ 2013-07-09 6:24 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jul 08, 2013 at 02:58:38PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> After l2x0_base has been used, we should free it.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> arch/arm/mach-imx/mm-imx3.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
> index 0884ca9..3143f5e 100644
> --- a/arch/arm/mach-imx/mm-imx3.c
> +++ b/arch/arm/mach-imx/mm-imx3.c
> @@ -113,6 +113,7 @@ static void __init imx3_init_l2x0(void)
> }
>
> l2x0_init(l2x0_base, 0x00030024, 0x00000000);
> + iounmap(l2x0_base);
Are you sure? I think cache-l2x0 driver still needs the mapping after
that.
Shawn
> #endif
> }
>
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base
2013-07-09 6:24 ` Shawn Guo
@ 2013-07-09 18:16 ` Fabio Estevam
2013-07-09 18:20 ` Sascha Hauer
0 siblings, 1 reply; 10+ messages in thread
From: Fabio Estevam @ 2013-07-09 18:16 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 9, 2013 at 3:24 AM, Shawn Guo <shawn.guo@linaro.org> wrote:
> On Mon, Jul 08, 2013 at 02:58:38PM -0300, Fabio Estevam wrote:
>> From: Fabio Estevam <fabio.estevam@freescale.com>
>>
>> After l2x0_base has been used, we should free it.
>>
>> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
>> ---
>> arch/arm/mach-imx/mm-imx3.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
>> index 0884ca9..3143f5e 100644
>> --- a/arch/arm/mach-imx/mm-imx3.c
>> +++ b/arch/arm/mach-imx/mm-imx3.c
>> @@ -113,6 +113,7 @@ static void __init imx3_init_l2x0(void)
>> }
>>
>> l2x0_init(l2x0_base, 0x00030024, 0x00000000);
>> + iounmap(l2x0_base);
>
> Are you sure? I think cache-l2x0 driver still needs the mapping after
> that.
l2x0_base is a local variable of the static imx3_init_l2x0() function,
so we should iounmap it.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base
2013-07-09 18:16 ` Fabio Estevam
@ 2013-07-09 18:20 ` Sascha Hauer
2013-07-10 16:53 ` Fabio Estevam
0 siblings, 1 reply; 10+ messages in thread
From: Sascha Hauer @ 2013-07-09 18:20 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jul 09, 2013 at 03:16:00PM -0300, Fabio Estevam wrote:
> On Tue, Jul 9, 2013 at 3:24 AM, Shawn Guo <shawn.guo@linaro.org> wrote:
> > On Mon, Jul 08, 2013 at 02:58:38PM -0300, Fabio Estevam wrote:
> >> From: Fabio Estevam <fabio.estevam@freescale.com>
> >>
> >> After l2x0_base has been used, we should free it.
> >>
> >> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> >> ---
> >> arch/arm/mach-imx/mm-imx3.c | 1 +
> >> 1 file changed, 1 insertion(+)
> >>
> >> diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
> >> index 0884ca9..3143f5e 100644
> >> --- a/arch/arm/mach-imx/mm-imx3.c
> >> +++ b/arch/arm/mach-imx/mm-imx3.c
> >> @@ -113,6 +113,7 @@ static void __init imx3_init_l2x0(void)
> >> }
> >>
> >> l2x0_init(l2x0_base, 0x00030024, 0x00000000);
> >> + iounmap(l2x0_base);
> >
> > Are you sure? I think cache-l2x0 driver still needs the mapping after
> > that.
>
> l2x0_base is a local variable of the static imx3_init_l2x0() function,
> so we should iounmap it.
l2x0_base is passed to l2x0_init which uses it for the outer cache
maintenance operations. I wonder this doesn't crash your kernel.
Sascha
--
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Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base
2013-07-09 18:20 ` Sascha Hauer
@ 2013-07-10 16:53 ` Fabio Estevam
2013-07-10 17:29 ` Fabio Estevam
0 siblings, 1 reply; 10+ messages in thread
From: Fabio Estevam @ 2013-07-10 16:53 UTC (permalink / raw)
To: linux-arm-kernel
Hi Sascha,
On Tue, Jul 9, 2013 at 3:20 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> l2x0_base is passed to l2x0_init which uses it for the outer cache
> maintenance operations. I wonder this doesn't crash your kernel.
l2x0_init() is called from arch/arm/mach-imx/mm-imx3.c first and then
from arch/arm/mm/cache-l2x0.c
later.
Why do we need to call it twice?
Can't we just do:
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 0884ca9..94f3b4f 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -85,7 +85,6 @@ static void __iomem *imx3_ioremap_caller(phys_addr_t
phys_addr, size_t size,
static void __init imx3_init_l2x0(void)
{
#ifdef CONFIG_CACHE_L2X0
- void __iomem *l2x0_base;
void __iomem *clkctl_base;
/*
@@ -105,14 +104,6 @@ static void __init imx3_init_l2x0(void)
} else {
pr_err("L2 cache: Cannot fix timing. Trying to continue without\n");
}
-
- l2x0_base = ioremap(MX3x_L2CC_BASE_ADDR, 4096);
- if (!l2x0_base) {
- printk(KERN_ERR "remapping L2 cache area failed\n");
- return;
- }
-
- l2x0_init(l2x0_base, 0x00030024, 0x00000000);
#endif
}
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base
2013-07-10 16:53 ` Fabio Estevam
@ 2013-07-10 17:29 ` Fabio Estevam
0 siblings, 0 replies; 10+ messages in thread
From: Fabio Estevam @ 2013-07-10 17:29 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jul 10, 2013 at 1:53 PM, Fabio Estevam <festevam@gmail.com> wrote:
> Hi Sascha,
>
> On Tue, Jul 9, 2013 at 3:20 PM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
>
>> l2x0_base is passed to l2x0_init which uses it for the outer cache
>> maintenance operations. I wonder this doesn't crash your kernel.
>
> l2x0_init() is called from arch/arm/mach-imx/mm-imx3.c first and then
> from arch/arm/mm/cache-l2x0.c
> later.
>
> Why do we need to call it twice?
Understood now, actually l2x0_init() is only called in
arch/arm/mm/cache-l2x0.c for the dt case.
So all is fine with the current code.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/3] ARM: imx: Select CACHE_L2X0
2013-07-08 17:58 [PATCH 1/3] ARM: imx: Select CACHE_L2X0 Fabio Estevam
2013-07-08 17:58 ` [PATCH 2/3] ARM: mx3: Select ARM_ERRATA_411920 Fabio Estevam
2013-07-08 17:58 ` [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base Fabio Estevam
@ 2013-07-09 6:26 ` Shawn Guo
2 siblings, 0 replies; 10+ messages in thread
From: Shawn Guo @ 2013-07-09 6:26 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jul 08, 2013 at 02:58:36PM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> Select CACHE_L2X0 for mx31/35/51/53/6q/6sl.
>
We should select the option from defconfig, so that the support can be
disabled for whatever purpose, e.g. debugging, from menuconfig.
Shawn
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> arch/arm/mach-imx/Kconfig | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> index f546560..f864af2 100644
> --- a/arch/arm/mach-imx/Kconfig
> +++ b/arch/arm/mach-imx/Kconfig
> @@ -122,6 +122,7 @@ config SOC_IMX27
>
> config SOC_IMX31
> bool
> + select CACHE_L2X0
> select COMMON_CLK
> select CPU_V6
> select IMX_HAVE_PLATFORM_MXC_RNGA
> @@ -131,6 +132,7 @@ config SOC_IMX31
> config SOC_IMX35
> bool
> select ARCH_MXC_IOMUX_V3
> + select CACHE_L2X0
> select COMMON_CLK
> select CPU_V6K
> select HAVE_EPIT
> @@ -142,6 +144,7 @@ config SOC_IMX5
> select ARCH_HAS_CPUFREQ
> select ARCH_HAS_OPP
> select ARCH_MXC_IOMUX_V3
> + select CACHE_L2X0
> select COMMON_CLK
> select CPU_V7
> select MXC_TZIC
> @@ -785,6 +788,7 @@ config SOC_IMX6Q
> bool "i.MX6 Quad/DualLite support"
> select ARCH_HAS_CPUFREQ
> select ARCH_HAS_OPP
> + select CACHE_L2X0
> select ARM_CPU_SUSPEND if PM
> select ARM_ERRATA_754322
> select ARM_ERRATA_764369 if SMP
> @@ -815,6 +819,7 @@ config SOC_IMX6SL
> select ARM_ERRATA_754322
> select ARM_ERRATA_775420
> select ARM_GIC
> + select CACHE_L2X0
> select CPU_V7
> select HAVE_IMX_ANATOP
> select HAVE_IMX_GPC
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2013-07-10 17:29 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-07-08 17:58 [PATCH 1/3] ARM: imx: Select CACHE_L2X0 Fabio Estevam
2013-07-08 17:58 ` [PATCH 2/3] ARM: mx3: Select ARM_ERRATA_411920 Fabio Estevam
2013-07-08 18:06 ` Alexander Shiyan
2013-07-08 17:58 ` [PATCH 3/3] ARM: imx: mm-imx3: Free l2x0_base Fabio Estevam
2013-07-09 6:24 ` Shawn Guo
2013-07-09 18:16 ` Fabio Estevam
2013-07-09 18:20 ` Sascha Hauer
2013-07-10 16:53 ` Fabio Estevam
2013-07-10 17:29 ` Fabio Estevam
2013-07-09 6:26 ` [PATCH 1/3] ARM: imx: Select CACHE_L2X0 Shawn Guo
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