From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4E373C3ABC5 for ; Sun, 11 May 2025 10:17:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=5a3a7V+XtBUb1Y2DCtBO9bFgMKOod7QDQZbBrVd+0qg=; b=XFLF/ryrbAnVdbOwEUAkLdZvZf yRUMTbDfokEeuAw51qH0NyYOU/aPQFXuGRIMOLkUxuGvhgrcFufGEupSEf/EhkJnMnaQy930flVxF 7MSQTAjSxbaMaw0RxJjWEwbGvp0fKbgpme1Xk35yU0hUzA4IP0xyi5xOfB/ahxXxBsY0nj0hUTycV weWDt44Yr5DVNBtWOCgklMbMAacWsDRGzeje7TaMuJVmHKwEL82U8S//mmaD4mgfOnTZhDqH6l/dH arW0KtjV2xpx7tTp5u8b8ttclO4HOuA7pjZfDr/cgzgJxMUGY+wr/ggMwA7K/Xm/Q8y0DduaanAV3 n0vTNHHQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uE3jy-000000074io-2u1R; Sun, 11 May 2025 10:17:02 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uE3hy-000000074W0-1SGu; Sun, 11 May 2025 10:14:59 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Type:Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=5a3a7V+XtBUb1Y2DCtBO9bFgMKOod7QDQZbBrVd+0qg=; b=I6znUy3gTyckQuu0SDQ90zmn// MfHHUDDdn7yySDUuZqxcXtoyiJU02Y6TrTYMNjlo0na2og0PZ7ucuhKLyCu8eJ/t8H13Y4sFiaix8 VBZHuowl2RXJIYFshxy3cIhm50NS8Q+NCCWxKKJKK/L5oNL8Hf/uTEFYWnKDgOuSfa9MCjQ85MtPd 62Oc+zBe/5yNYyfGsajEGbQRJ4A4e4cEIztLGapSLFu+KpDLewF+p396mbYzVaw75FTne2tEmKN8N i+V0Nt9faMGex0wZ8yOBYlEVHy4aYMErOLl8gH0qPWnhv6+yzf5tBzncR0qj64MmxwFNcibzCxuf7 3Dkbp4jg==; Received: from i53875a1d.versanet.de ([83.135.90.29] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uE3hT-0002ls-VM; Sun, 11 May 2025 12:14:28 +0200 From: Heiko =?UTF-8?B?U3TDvGJuZXI=?= To: ziyao@disroot.org, Chukun Pan Cc: andyshrk@163.com, conor+dt@kernel.org, damon.ding@rock-chips.com, devicetree@vger.kernel.org, didi.debian@cknow.org, dsimic@manjaro.org, jbx6244@gmail.com, jing@jing.rocks, krzk+dt@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, sebastian.reichel@collabora.com, Chukun Pan Subject: Re: [PATCH v7 4/5] arm64: dts: rockchip: add core dtsi for RK3562 SoC Date: Sun, 11 May 2025 12:14:27 +0200 Message-ID: <13758471.dW097sEU6C@diego> In-Reply-To: <20250511100022.31465-1-amadeus@jmu.edu.cn> References: <20250310140916.14384-2-ziyao@disroot.org> <20250511100022.31465-1-amadeus@jmu.edu.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250511_031458_406797_EB155260 X-CRM114-Status: GOOD ( 24.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, Am Sonntag, 11. Mai 2025, 12:00:22 Mitteleurop=C3=A4ische Sommerzeit schrie= b Chukun Pan: > > > > --- /dev/null > > +++ b/arch/arm64/boot/dts/rockchip/rk3562.dtsi > > @@ -0,0 +1,1187 @@ > > > > +#include > > +#include > > +#include >=20 > Does this need to be sorted alphabetically? the rk3562-power header is gone temporarily anyway (in another tree), so I moved things to numbers temporarily and created https://lore.kernel.org/r/20250510161531.2086706-1-heiko@sntech.de to be applied after the merge-window. >=20 > > > > + idle-states { > > + entry-method =3D "psci"; >=20 > It would be better to leave a blank line here. added > > + CPU_SLEEP: cpu-sleep { >=20 > > > > + pwm0: pwm@ff230000 { > > + compatible =3D "rockchip,rk3562-pwm", "rockchip,rk3328-pwm"; > > + reg =3D <0x0 0xff230000 0x0 0x10>; > > + #pwm-cells =3D <3>; > > + pinctrl-names =3D "active"; >=20 > It should be `pinctrl-names =3D "default";` for pwm, see also [1] fixed the pinctrl > > + pinctrl-0 =3D <&pwm0m0_pins>; > > + clocks =3D <&cru CLK_PMU1_PWM0>, <&cru PCLK_PMU1_PWM0>; > > + clock-names =3D "pwm", "pclk"; > > + status =3D "disabled"; > > + }; >=20 > The pinctrl should be placed below the clock. fixed ordering >=20 > > > > + power: power-controller { > > + compatible =3D "rockchip,rk3562-power-controller"; > > + #power-domain-cells =3D <1>; > > + #address-cells =3D <1>; > > + #size-cells =3D <0>; > > + status =3D "okay"; > > + >=20 > `status =3D "okay"` is not needed here. > Also remove extra blank lines. dropped okay ... extra blank was already removing when applying >=20 > > + > > + power-domain@RK3562_PD_GPU { > > > > + power-domain@RK3562_PD_VI { > > + reg =3D ; > > + #power-domain-cells =3D <1>; > > + #address-cells =3D <1>; > > + #size-cells =3D <0>; > > + pm_qos =3D <&qos_isp>, > > + <&qos_vicap>; > > + > > + power-domain@RK3562_PD_VEPU { > > + reg =3D ; > > + pm_qos =3D <&qos_vepu>; > > + #power-domain-cells =3D <0>; >=20 > This line is missing a tab, resulting in an indentation error. fixed the indentation > > + }; > > + }; > > >=20 > > + pcie2x1: pcie@ff500000 { > > + compatible =3D "rockchip,rk3562-pcie", "rockchip,rk3568-pcie"; > > + #address-cells =3D <3>; > > + #size-cells =3D <2>; >=20 > #address-cells/#size-cells should be placed above `status =3D "disabled";` > I think other nodes also need to change this. (Some for #pwm-cells) moved them (and the #pwm-cells above) > > + interrupt-names =3D "sys", "pmc", "msg", "legacy", "err", "msi"; >=20 > I noticed that the bsp 5.10 kernel said that pcie only has 8 MSI vectors, > [2][3] but in the bsp 6.1 kernel it changed to 32 MSI vectors [4]. >=20 > The rockchip documentation also says there are only 8 MSI vectors: >=20 > [5] Page37 8.8 "RK3528/RK3562/RK3576=E5=8F=AF=E5=88=86=E9=85=8D=E7=9A=84M= SI=E6=88=96=E8=80=85MSI-X=E6=80=BB=E6=95=B0=E6=98=AF8=E4=B8=AA" > Translate into English: "The total number of MSI or MSI-X that > can be allocated by RK3528/RK3562/RK3576 is 8" >=20 > We noticed this when supporting rk3528, so which one is correct? I'll leave that for a fixup patch or further discussion ;-) > > + phys =3D <&combphy_pu PHY_TYPE_PCIE>; >=20 > s/combphy_pu/combphy >=20 > > > + combphy_pu: phy@ff750000 { >=20 > Please change it to `combphy` like rk3568. changed the naming. > Heiko I know you just merged this, it's a bit offensive but I think > it would be better to drop these patches and fix them further. > Or kever would you like to send a fix patch? Although most of > them are typo issues, it will take a few patches to fix it. =46irst of all, thanks for noticing all the bits and pieces to improve. I di think I have now fixed up all the "regular" pieces you mentioned and amended the commit accordingly: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git/co= mmit/?id=3D1d2f65fa98ddcafdfd1ebcdb87105141861b584a Heiko