From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/6] ARM: prefetch: remove redundant "cc" clobber
Date: Tue, 17 Sep 2013 14:29:33 +0100 [thread overview]
Message-ID: <1379424578-7477-2-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1379424578-7477-1-git-send-email-will.deacon@arm.com>
The pld instruction does not affect the condition flags, so don't bother
clobbering them.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
arch/arm/include/asm/processor.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 413f387..514a989 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -97,9 +97,7 @@ static inline void prefetch(const void *ptr)
{
__asm__ __volatile__(
"pld\t%a0"
- :
- : "p" (ptr)
- : "cc");
+ :: "p" (ptr));
}
#define ARCH_HAS_PREFETCHW
--
1.8.2.2
next prev parent reply other threads:[~2013-09-17 13:29 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-17 13:29 [PATCH v3 0/6] Add support for pldw instruction on v7 MP cores Will Deacon
2013-09-17 13:29 ` Will Deacon [this message]
2013-09-17 13:29 ` [PATCH v3 2/6] ARM: smp_on_up: move inline asm ALT_SMP patching macro out of spinlock.h Will Deacon
2013-09-17 13:29 ` [PATCH v3 3/6] ARM: prefetch: add support for prefetchw using pldw on SMP ARMv7+ CPUs Will Deacon
2013-09-17 13:29 ` [PATCH v3 4/6] ARM: locks: prefetch the destination word for write prior to strex Will Deacon
2013-09-17 13:29 ` [PATCH v3 5/6] ARM: atomics: " Will Deacon
2013-09-17 18:09 ` Nicolas Pitre
2013-09-18 9:54 ` Will Deacon
2013-09-17 13:29 ` [PATCH v3 6/6] ARM: bitops: " Will Deacon
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