From: nicolas.pitre@linaro.org (Nicolas Pitre)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 05/13] ARM: SMP: basic IPI triggered completion support
Date: Mon, 23 Sep 2013 19:17:48 -0400 [thread overview]
Message-ID: <1379978276-31241-6-git-send-email-nicolas.pitre@linaro.org> (raw)
In-Reply-To: <1379978276-31241-1-git-send-email-nicolas.pitre@linaro.org>
We need a mechanism to let an inbound CPU signal that it is alive before
even getting into the kernel environment i.e. from early assembly code.
Using an IPI is the simplest way to achieve that.
This adds some basic infrastructure to register a struct completion
pointer to be "completed" when the dedicated IPI for this task is
received.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
---
arch/arm/include/asm/hardirq.h | 2 +-
arch/arm/include/asm/smp.h | 2 ++
arch/arm/kernel/smp.c | 21 +++++++++++++++++++++
3 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h
index 2740c2a2df..3d7351c844 100644
--- a/arch/arm/include/asm/hardirq.h
+++ b/arch/arm/include/asm/hardirq.h
@@ -5,7 +5,7 @@
#include <linux/threads.h>
#include <asm/irq.h>
-#define NR_IPI 6
+#define NR_IPI 7
typedef struct {
unsigned int __softirq_pending;
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index a8cae71cac..22a3b9b5d4 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -84,6 +84,8 @@ extern void arch_send_call_function_single_ipi(int cpu);
extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask);
+extern int register_ipi_completion(struct completion *completion, int cpu);
+
struct smp_operations {
#ifdef CONFIG_SMP
/*
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 72024ea8a3..7d80a549ca 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -66,6 +66,7 @@ enum ipi_msg_type {
IPI_CALL_FUNC,
IPI_CALL_FUNC_SINGLE,
IPI_CPU_STOP,
+ IPI_COMPLETION,
};
static DECLARE_COMPLETION(cpu_running);
@@ -456,6 +457,7 @@ static const char *ipi_types[NR_IPI] = {
S(IPI_CALL_FUNC, "Function call interrupts"),
S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
S(IPI_CPU_STOP, "CPU stop interrupts"),
+ S(IPI_COMPLETION, "completion interrupts"),
};
void show_ipi_list(struct seq_file *p, int prec)
@@ -515,6 +517,19 @@ static void ipi_cpu_stop(unsigned int cpu)
cpu_relax();
}
+static DEFINE_PER_CPU(struct completion *, cpu_completion);
+
+int register_ipi_completion(struct completion *completion, int cpu)
+{
+ per_cpu(cpu_completion, cpu) = completion;
+ return IPI_COMPLETION;
+}
+
+static void ipi_complete(unsigned int cpu)
+{
+ complete(per_cpu(cpu_completion, cpu));
+}
+
/*
* Main handler for inter-processor interrupts
*/
@@ -565,6 +580,12 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
irq_exit();
break;
+ case IPI_COMPLETION:
+ irq_enter();
+ ipi_complete(cpu);
+ irq_exit();
+ break;
+
default:
printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n",
cpu, ipinr);
--
1.8.4.98.gb022869
next prev parent reply other threads:[~2013-09-23 23:17 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-23 23:17 [PATCH 00/13] second batch of b.L switcher patches Nicolas Pitre
2013-09-23 23:17 ` [PATCH 01/13] ARM: bL_switcher: Add synchronous enable/disable interface Nicolas Pitre
2013-09-23 23:17 ` [PATCH 02/13] ARM: bL_switcher: Add runtime control notifier Nicolas Pitre
2013-09-23 23:17 ` [PATCH 03/13] ARM: bL_switcher: Add switch completion callback for bL_switch_request() Nicolas Pitre
2013-09-23 23:17 ` [PATCH 04/13] ARM: bL_switcher: synchronize the outbound with the inbound Nicolas Pitre
2013-09-23 23:17 ` Nicolas Pitre [this message]
2013-09-23 23:17 ` [PATCH 06/13] ARM: mcpm: add a simple poke mechanism to the early entry code Nicolas Pitre
2013-09-23 23:17 ` [PATCH 07/13] ARM: GIC: function to retrieve the physical address of the SGIR Nicolas Pitre
2013-09-23 23:17 ` [PATCH 08/13] ARM: GIC: interface to send a SGI directly Nicolas Pitre
2013-09-23 23:17 ` [PATCH 09/13] ARM: bL_switcher: wait until inbound is alive before performing a switch Nicolas Pitre
2013-09-23 23:17 ` [PATCH 10/13] ARM: bL_switcher: Basic trace events support Nicolas Pitre
2013-09-23 23:17 ` [PATCH 11/13] ARM: bL_switcher/trace: Add trace trigger for trace bootstrapping Nicolas Pitre
2013-09-23 23:17 ` [PATCH 12/13] ARM: bL_switcher/trace: Add kernel trace trigger interface Nicolas Pitre
2013-09-23 23:17 ` [PATCH 13/13] ARM: bL_switcher: Add query interface to discover CPU affinities Nicolas Pitre
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1379978276-31241-6-git-send-email-nicolas.pitre@linaro.org \
--to=nicolas.pitre@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).