[PATCH 0/7] ARM: tegra: basic support for Tegra124 SoC

[PATCH 0/7] ARM: tegra: basic support for Tegra124 SoC

[Joseph Lo]

Hi,

This series adds basic support for the new Tegra SoC, Tegra124. To bring
up the system, it also needs an initrd as rootfs. Because most of the
peripheral not be enabled yet in this series, it depends on the clock and
pinctrl driver.

Here are the commands for U-Boot that I used for booting system to
console prompt:
* preparing kernel & initrd image
mkimage -A arm -T kernel_noload -C none -a 0 -e 0 -d zImage kernel.img
mkimage -A arm -C none -T ramdisk -a ${initrd_addr} -d rootfs.img.gz rootfs.img

* boot cmd for U-Boot
setenv bootargs console=ttyS0,115200 loglevel=8 init=/bin/sh
ext2load mmc ${mmc_dev}:${boot_part} ${kernel_addr_r} kernel.img
ext2load mmc ${mmc_dev}:${boot_part} ${ramdisk_addr_r} rootfs.img
ext2load mmc ${mmc_dev}:${boot_part} ${fdt_addr_r} tegra124-venice2.dtb
bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}

Verified on Venice2.

Joseph Lo (7):
  ARM: tegra: add Tegra124 SoC support
  ARM: tegra: add chip ID of Tegra124
  ARM: tegra: add SMP support for Tegra124
  ARM: tegra: Add initial device tree for Tegra124
  ARM: tegra: add Venice2 board support
  HACK: arm: tegra: reuse the Tegra114 clock driver for Tegra124 UART-A
  ARM: tegra: enable Tegra124 support

 arch/arm/boot/dts/Makefile             |   3 +-
 arch/arm/boot/dts/tegra124-venice2.dts |  21 +++++
 arch/arm/boot/dts/tegra124.dtsi        | 140 +++++++++++++++++++++++++++++++++
 arch/arm/configs/tegra_defconfig       |   1 +
 arch/arm/mach-tegra/Kconfig            |   8 ++
 arch/arm/mach-tegra/fuse.h             |   1 +
 arch/arm/mach-tegra/platsmp.c          |   2 +
 arch/arm/mach-tegra/tegra.c            |   1 +
 8 files changed, 176 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/tegra124-venice2.dts
 create mode 100644 arch/arm/boot/dts/tegra124.dtsi

-- 
1.8.4

[PATCH 1/7] ARM: tegra: add Tegra124 SoC support

[Joseph Lo]

Add Tegra124 SoC support that base on CortexA15MP Core.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/mach-tegra/Kconfig | 8 ++++++++
 arch/arm/mach-tegra/tegra.c | 1 +
 2 files changed, 9 insertions(+)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 67a76f2..92272e0 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -61,6 +61,14 @@ config ARCH_TEGRA_114_SOC
 	  Support for NVIDIA Tegra T114 processor family, based on the
 	  ARM CortexA15MP CPU
 
+config ARCH_TEGRA_124_SOC
+	bool "Enable support for Tegra124 family"
+	select ARM_L1_CACHE_SHIFT_6
+	select HAVE_ARM_ARCH_TIMER
+	help
+	  Support for NVIDIA Tegra T124 processor family, based on the
+	  ARM CortexA15MP CPU
+
 config TEGRA_AHB
 	bool "Enable AHB driver for NVIDIA Tegra SoCs"
 	default y
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
index 40b031c..80b801a 100644
--- a/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@ -181,6 +181,7 @@ static void __init tegra_dt_init_late(void)
 }
 
 static const char * const tegra_dt_board_compat[] = {
+	"nvidia,tegra124",
 	"nvidia,tegra114",
 	"nvidia,tegra30",
 	"nvidia,tegra20",
-- 
1.8.4

[PATCH 2/7] ARM: tegra: add chip ID of Tegra124

[Joseph Lo]

Add tegra_chip_id 0x40 for Tegra124

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/mach-tegra/fuse.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h
index def7968..c01d047 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/fuse.h
@@ -29,6 +29,7 @@
 #define TEGRA20		0x20
 #define TEGRA30		0x30
 #define TEGRA114	0x35
+#define TEGRA124	0x40
 
 #ifndef __ASSEMBLY__
 enum tegra_revision {
-- 
1.8.4

[PATCH 3/7] ARM: tegra: add SMP support for Tegra124

[Joseph Lo]

The power up method is same as Tegra114, so we share the same function
for it.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/mach-tegra/platsmp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 2d02036..eb72ae7 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -176,6 +176,8 @@ static int tegra_boot_secondary(unsigned int cpu,
 		return tegra30_boot_secondary(cpu, idle);
 	if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_chip_id == TEGRA114)
 		return tegra114_boot_secondary(cpu, idle);
+	if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_chip_id == TEGRA124)
+		return tegra114_boot_secondary(cpu, idle);
 
 	return -EINVAL;
 }
-- 
1.8.4

[PATCH 3/7] ARM: tegra: add SMP support for Tegra124

[Stephen Warren]

On 10/07/2013 01:31 AM, Joseph Lo wrote:
> The power up method is same as Tegra114, so we share the same function
> for it.

These first 3 patches are all small, related, and all to the same code
in arch/arm/mach-tegra/, so they could just be squashed into a single patch.

[PATCH 4/7] ARM: tegra: Add initial device tree for Tegra124

[Joseph Lo]

Initial support for Tegra 124 SoC. This is expected to be included in
the board DTS files.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/boot/dts/tegra124.dtsi | 132 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 132 insertions(+)
 create mode 100644 arch/arm/boot/dts/tegra124.dtsi

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
new file mode 100644
index 0000000..6d0d737
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -0,0 +1,132 @@
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "nvidia,tegra124";
+	interrupt-parent = <&gic>;
+
+	gic: interrupt-controller at 50041000 {
+		compatible = "arm,cortex-a15-gic";
+		#interrupt-cells = <3>;
+		interrupt-controller;
+		reg = <0x50041000 0x1000>,
+		      <0x50042000 0x1000>,
+		      <0x50044000 0x2000>,
+		      <0x50046000 0x2000>;
+		interrupts = <GIC_PPI 9
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+	};
+
+	timer at 60005000 {
+		compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
+		reg = <0x60005000 0x400>;
+		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	/*
+	 * There are two serial driver i.e. 8250 based simple serial
+	 * driver and APB DMA based serial driver for higher baudrate
+	 * and performace. To enable the 8250 based driver, the compatible
+	 * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
+	 * the APB DMA based serial driver, the comptible is
+	 * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
+	 */
+	serial at 70006000 {
+		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+		reg = <0x70006000 0x40>;
+		reg-shift = <2>;
+		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	serial at 70006040 {
+		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+		reg = <0x70006040 0x40>;
+		reg-shift = <2>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	serial at 70006200 {
+		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+		reg = <0x70006200 0x40>;
+		reg-shift = <2>;
+		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	serial at 70006300 {
+		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+		reg = <0x70006300 0x40>;
+		reg-shift = <2>;
+		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	serial at 70006400 {
+		compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
+		reg = <0x70006400 0x40>;
+		reg-shift = <2>;
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	rtc {
+		compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
+		reg = <0x7000e000 0x100>;
+		interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+		status = "disabled";
+	};
+
+	pmc {
+		compatible = "nvidia,tegra124-pmc", "nvidia,tegra114-pmc";
+		reg = <0x7000e400 0x400>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0>;
+		};
+
+		cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <1>;
+		};
+
+		cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <2>;
+		};
+
+		cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <3>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <GIC_PPI 13
+				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14
+				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11
+				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10
+				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+};
-- 
1.8.4

[PATCH 4/7] ARM: tegra: Add initial device tree for Tegra124

[Stephen Warren]

On 10/07/2013 01:31 AM, Joseph Lo wrote:
> Initial support for Tegra 124 SoC. This is expected to be included in
> the board DTS files.

> diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi

> +	rtc {
> +		compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
> +		reg = <0x7000e000 0x100>;

We recently decided that all nodes that have a reg property must have a
matching unit address in the node name. Hence, the node should be named
"rtc at 7000e000" not just "rtc". We haven't decided how to clean this up
for existing DTs, but I'd like to enforce the new rule for all new DTs.

The pmc node should also be fixed.

> +	pmc {
> +		compatible = "nvidia,tegra124-pmc", "nvidia,tegra114-pmc";
> +		reg = <0x7000e400 0x400>;
> +	};

Is the Tegra124 PMC really identical to the Tegra114 PMC in hardware?
That would be a departure from history, where the PMC has changed
significantly and incompatibly for each chip. Can you please investigate
the details of the PMC changes; I suspect this should simply be:

		compatible = "nvidia,tegra124-pmc";

[PATCH 4/7] ARM: tegra: Add initial device tree for Tegra124

[Joseph Lo]

On Tue, 2013-10-08 at 01:18 +0800, Stephen Warren wrote:
> On 10/07/2013 01:31 AM, Joseph Lo wrote:
> > Initial support for Tegra 124 SoC. This is expected to be included in
> > the board DTS files.
> The pmc node should also be fixed.
> 
> > +	pmc {
> > +		compatible = "nvidia,tegra124-pmc", "nvidia,tegra114-pmc";
> > +		reg = <0x7000e400 0x400>;
> > +	};
> 
> Is the Tegra124 PMC really identical to the Tegra114 PMC in hardware?
> That would be a departure from history, where the PMC has changed
> significantly and incompatibly for each chip. Can you please investigate
> the details of the PMC changes; I suspect this should simply be:
> 
> 		compatible = "nvidia,tegra124-pmc";
> 

Thanks for reminding, it's not identical. Considering the power gate and
power domain function is not the same with Tegra114.

[PATCH 5/7] ARM: tegra: add Venice2 board support

[Joseph Lo]

Add support for the Tegra124 based Venice2 reference board.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/boot/dts/Makefile             |  3 ++-
 arch/arm/boot/dts/tegra124-venice2.dts | 21 +++++++++++++++++++++
 2 files changed, 23 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/tegra124-venice2.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index cf75889..1c3b871 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -252,7 +252,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra30-beaver.dtb \
 	tegra30-cardhu-a02.dtb \
 	tegra30-cardhu-a04.dtb \
-	tegra114-dalmore.dtb
+	tegra114-dalmore.dtb \
+	tegra124-venice2.dtb
 dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
 	versatile-pb.dtb
 dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
new file mode 100644
index 0000000..8fa58dd
--- /dev/null
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -0,0 +1,21 @@
+/dts-v1/;
+
+#include "tegra124.dtsi"
+
+/ {
+	model = "NVIDIA Tegra124 Venice2";
+	compatible = "nvidia,venice2", "nvidia,tegra124";
+
+	memory {
+		reg = <0x80000000 0x80000000>;
+	};
+
+	serial at 70006000 {
+		status = "okay";
+	};
+
+	pmc {
+		nvidia,invert-interrupt;
+	};
+
+};
-- 
1.8.4

[PATCH 5/7] ARM: tegra: add Venice2 board support

[Stephen Warren]

On 10/07/2013 01:31 AM, Joseph Lo wrote:
> Add support for the Tegra124 based Venice2 reference board.

> diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts

> +	pmc {

You'll need to update the node name here too.

> +		nvidia,invert-interrupt;
> +	};
> +
> +};

There's an extra blank line between the two }; above.

[PATCH 6/7] HACK: arm: tegra: reuse the Tegra114 clock driver for Tegra124 UART-A

[Joseph Lo]

This patch is only a hack for Tegra124 bring up testing. Please don't
merge this. The same function can be replaced by Tegra124 clock driver.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/boot/dts/tegra124.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 6d0d737..dd60f88 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -1,3 +1,4 @@
+#include <dt-bindings/clock/tegra114-car.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include "skeleton.dtsi"
@@ -29,6 +30,12 @@
 			     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	tegra_car: clock {
+		compatible = "nvidia,tegra114-car";
+		reg = <0x60006000 0x1000>;
+		#clock-cells = <1>;
+	};
+
 	/*
 	 * There are two serial driver i.e. 8250 based simple serial
 	 * driver and APB DMA based serial driver for higher baudrate
@@ -43,6 +50,7 @@
 		reg-shift = <2>;
 		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 		status = "disabled";
+		clocks = <&tegra_car TEGRA114_CLK_UARTA>;
 	};
 
 	serial at 70006040 {
-- 
1.8.4

[PATCH 7/7] ARM: tegra: enable Tegra124 support

[Joseph Lo]

Add Tegra124 support in tegra_defconfig file.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/configs/tegra_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig
index ec4f6e7..4934295 100644
--- a/arch/arm/configs/tegra_defconfig
+++ b/arch/arm/configs/tegra_defconfig
@@ -27,6 +27,7 @@ CONFIG_ARCH_TEGRA=y
 CONFIG_ARCH_TEGRA_2x_SOC=y
 CONFIG_ARCH_TEGRA_3x_SOC=y
 CONFIG_ARCH_TEGRA_114_SOC=y
+CONFIG_ARCH_TEGRA_124_SOC=y
 CONFIG_TEGRA_EMC_SCALING_ENABLE=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
-- 
1.8.4

[PATCH 0/7] ARM: tegra: basic support for Tegra124 SoC

[Stephen Warren]

On 10/07/2013 01:31 AM, Joseph Lo wrote:
> Hi,
> 
> This series adds basic support for the new Tegra SoC, Tegra124. To bring
> up the system, it also needs an initrd as rootfs. Because most of the
> peripheral not be enabled yet in this series, it depends on the clock and
> pinctrl driver.

Great. I tested these and they work fine for me too, even using bootz
rather than bootm after fixing some bootz issues in our internal Venice2
U-Boot.

If you post V2, I'll apply it ASAP!