[PATCH 0/4] ARM: tegra: add CPU hot-plug and idle support for Tegra124

[PATCH 0/4] ARM: tegra: add CPU hot-plug and idle support for Tegra124

[Joseph Lo]

The CPU hot-plug and idle function for Tegra124 was identical to Tegra114,
so we share the driver with it.

Note:
This patch series depends on the patch series below.
* [PATCH 0/5] Tegra124 clock support
* [PATCH V2 0/6] ARM: tegra: basic support for Tegra124 SoC
* [PATCH] ARM: tegra: add clock properties for devices of Tegra124

Joseph Lo (4):
  clk: tegra124: add wait_for_reset and disable_clock for
    tegra_cpu_car_ops
  ARM: tegra: CPU hotplug support for Tegra124
  ARM: tegra: make tegra_resume can work with current and later chips
  ARM: tegra: enable CPU idle for Tegra124

 arch/arm/mach-tegra/Makefile        |  4 ++++
 arch/arm/mach-tegra/cpuidle.c       |  4 +++-
 arch/arm/mach-tegra/hotplug.c       |  2 ++
 arch/arm/mach-tegra/reset-handler.S |  9 +++------
 drivers/clk/tegra/clk-tegra124.c    | 26 ++++++++++++++++++++++++++
 5 files changed, 38 insertions(+), 7 deletions(-)

-- 
1.8.4

[PATCH 1/4] clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops

[Joseph Lo]

Hook the functions for CPU hotplug support. After the CPU is hot
unplugged, the flow controller will handle to clock gate the CPU clock.
But still need to implement an empty function to avoid warning message.

Cc: Mike Turquette <mturquette@linaro.org>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
This patch depends on the patch series "[PATCH 0/5] Tegra124 clock support"
that sent by Peter on 10/4/2013.
---
 drivers/clk/tegra/clk-tegra124.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index 26ba059..c1c9330 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -106,6 +106,9 @@
 #define UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE	BIT(1)
 #define UTMIPLL_HW_PWRDN_CFG0_IDDQ_SWCTL	BIT(0)
 
+/* Tegra CPU clock and reset control regs */
+#define CLK_RST_CONTROLLER_CPU_CMPLX_STATUS	0x470
+
 static void __iomem *clk_base;
 static void __iomem *pmc_base;
 
@@ -1120,6 +1123,27 @@ static void __init tegra124_pll_init(void __iomem *clk_base,
 
 }
 
+/* Tegra124 CPU clock and reset control functions */
+static void tegra124_wait_cpu_in_reset(u32 cpu)
+{
+	unsigned int reg;
+
+	do {
+		reg = readl(clk_base + CLK_RST_CONTROLLER_CPU_CMPLX_STATUS);
+		cpu_relax();
+	} while (!(reg & (1 << cpu)));  /* check CPU been reset or not */
+}
+
+static void tegra124_disable_cpu_clock(u32 cpu)
+{
+	/* flow controller would take care in the power sequence. */
+}
+
+static struct tegra_cpu_car_ops tegra124_cpu_car_ops = {
+	.wait_for_reset	= tegra124_wait_cpu_in_reset,
+	.disable_clock	= tegra124_disable_cpu_clock,
+};
+
 static const struct of_device_id pmc_match[] __initconst = {
 	{ .compatible = "nvidia,tegra124-pmc" },
 	{},
@@ -1202,5 +1226,7 @@ static void __init tegra124_clock_init(struct device_node *np)
 	tegra_add_of_provider(np);
 
 	tegra_clk_apply_init_table = tegra124_clock_apply_init_table;
+
+	tegra_cpu_car_ops = &tegra124_cpu_car_ops;
 }
 CLK_OF_DECLARE(tegra124, "nvidia,tegra124-car", tegra124_clock_init);
-- 
1.8.4

[PATCH 2/4] ARM: tegra: CPU hotplug support for Tegra124

[Joseph Lo]

The procedure of CPU hotplug for Tegra124 is same with Tegra114. We
re-use the same function with it.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/mach-tegra/Makefile  | 1 +
 arch/arm/mach-tegra/hotplug.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 97eb48e..04ca2b3 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -35,5 +35,6 @@ obj-$(CONFIG_ARCH_TEGRA_114_SOC)	+= pm-tegra30.o
 ifeq ($(CONFIG_CPU_IDLE),y)
 obj-$(CONFIG_ARCH_TEGRA_114_SOC)	+= cpuidle-tegra114.o
 endif
+obj-$(CONFIG_ARCH_TEGRA_124_SOC)	+= sleep-tegra30.o
 
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= board-paz00.o
diff --git a/arch/arm/mach-tegra/hotplug.c b/arch/arm/mach-tegra/hotplug.c
index 04de2e8..ff26af2 100644
--- a/arch/arm/mach-tegra/hotplug.c
+++ b/arch/arm/mach-tegra/hotplug.c
@@ -57,4 +57,6 @@ void __init tegra_hotplug_init(void)
 		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
 	if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_chip_id == TEGRA114)
 		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
+	if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_chip_id == TEGRA124)
+		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
 }
-- 
1.8.4

[PATCH 3/4] ARM: tegra: make tegra_resume can work with current and later chips

[Joseph Lo]

Because the CPU0 was the first up and the last down core when cluster
power up/down or platform suspend. So only CPU0 needs the rest of the
functions to reset flow controller and re-enable SCU and L2. We also
move the L2 init function for Cortex-A15 to there. The secondery CPU
can just call cpu_resume.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/mach-tegra/reset-handler.S | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index f527b2c..b63e69c 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -45,17 +45,11 @@
 ENTRY(tegra_resume)
 	check_cpu_part_num 0xc09, r8, r9
 	bleq	v7_invalidate_l1
-	blne	tegra_init_l2_for_a15
 
 	cpu_id	r0
-	tegra_get_soc_id TEGRA_APB_MISC_BASE, r6
-	cmp	r6, #TEGRA114
-	beq	no_cpu0_chk
-
 	cmp	r0, #0				@ CPU0?
  THUMB(	it	ne )
 	bne	cpu_resume			@ no
-no_cpu0_chk:
 
 	/* Are we on Tegra20? */
 	cmp	r6, #TEGRA20
@@ -87,6 +81,9 @@ no_cpu0_chk:
 	/* L2 cache resume & re-enable */
 	l2_cache_resume r0, r1, r2, l2x0_saved_regs_addr
 not_ca9:
+	mov32	r9, 0xc0f
+	cmp	r8, r9
+	bleq	tegra_init_l2_for_a15
 
 	b	cpu_resume
 ENDPROC(tegra_resume)
-- 
1.8.4

[PATCH 4/4] ARM: tegra: enable CPU idle for Tegra124

[Joseph Lo]

The CPUIdle function of Tegra124 is identical to Tegra114, so we share
the same driver with Tegra114.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
 arch/arm/mach-tegra/Makefile  | 3 +++
 arch/arm/mach-tegra/cpuidle.c | 4 +++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 04ca2b3..de3748e 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -36,5 +36,8 @@ ifeq ($(CONFIG_CPU_IDLE),y)
 obj-$(CONFIG_ARCH_TEGRA_114_SOC)	+= cpuidle-tegra114.o
 endif
 obj-$(CONFIG_ARCH_TEGRA_124_SOC)	+= sleep-tegra30.o
+ifeq ($(CONFIG_CPU_IDLE),y)
+obj-$(CONFIG_ARCH_TEGRA_124_SOC)	+= cpuidle-tegra114.o
+endif
 
 obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= board-paz00.o
diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c
index 0961dfc..7bc5d8d 100644
--- a/arch/arm/mach-tegra/cpuidle.c
+++ b/arch/arm/mach-tegra/cpuidle.c
@@ -39,7 +39,9 @@ void __init tegra_cpuidle_init(void)
 			tegra30_cpuidle_init();
 		break;
 	case TEGRA114:
-		if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC))
+	case TEGRA124:
+		if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) ||
+		    IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC))
 			tegra114_cpuidle_init();
 		break;
 	}
-- 
1.8.4

[PATCH 0/4] ARM: tegra: add CPU hot-plug and idle support for Tegra124

[Joseph Lo]

On Tue, 2013-10-08 at 16:23 +0800, Joseph Lo wrote:
> The CPU hot-plug and idle function for Tegra124 was identical to Tegra114,
> so we share the driver with it.
> 
Because this series touches common CPU resume function across Tegra
chips, I forgot to mention.

Verified on Seaboard, Cardhu, Dalmore and Venice2 and with THUMB2_KERNEL
as well.

> Note:
> This patch series depends on the patch series below.
> * [PATCH 0/5] Tegra124 clock support
> * [PATCH V2 0/6] ARM: tegra: basic support for Tegra124 SoC
> * [PATCH] ARM: tegra: add clock properties for devices of Tegra124
> 
> Joseph Lo (4):
>   clk: tegra124: add wait_for_reset and disable_clock for
>     tegra_cpu_car_ops
>   ARM: tegra: CPU hotplug support for Tegra124
>   ARM: tegra: make tegra_resume can work with current and later chips
>   ARM: tegra: enable CPU idle for Tegra124
> 
>  arch/arm/mach-tegra/Makefile        |  4 ++++
>  arch/arm/mach-tegra/cpuidle.c       |  4 +++-
>  arch/arm/mach-tegra/hotplug.c       |  2 ++
>  arch/arm/mach-tegra/reset-handler.S |  9 +++------
>  drivers/clk/tegra/clk-tegra124.c    | 26 ++++++++++++++++++++++++++
>  5 files changed, 38 insertions(+), 7 deletions(-)
> 

[PATCH 1/4] clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops

[Stephen Warren]

On 10/08/2013 02:23 AM, Joseph Lo wrote:
> Hook the functions for CPU hotplug support. After the CPU is hot
> unplugged, the flow controller will handle to clock gate the CPU clock.
> But still need to implement an empty function to avoid warning message.
> 
> Cc: Mike Turquette <mturquette@linaro.org>
> Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
> Signed-off-by: Joseph Lo <josephl@nvidia.com>
> ---
> This patch depends on the patch series "[PATCH 0/5] Tegra124 clock support"
> that sent by Peter on 10/4/2013.

Uggh. This series mixes patches for drivers/clk and arch/arm/mach-tegra.
I don't want to introduce dependencies between those two subsystems.
Instead, if this patch is applied to the clock tree, and the reset of
the patches to the Tegra tree, will that cause any build issues, or any
run-time for any SoC other than Tegra124 (which is a new feature so it's
fine if it doesn't work until everything is merged together)?

[PATCH 3/4] ARM: tegra: make tegra_resume can work with current and later chips

[Stephen Warren]

On 10/08/2013 02:23 AM, Joseph Lo wrote:
> Because the CPU0 was the first up and the last down core when cluster
> power up/down or platform suspend. So only CPU0 needs the rest of the
> functions to reset flow controller and re-enable SCU and L2. We also
> move the L2 init function for Cortex-A15 to there. The secondery CPU
> can just call cpu_resume.

Is that really true? I thought that starting with Tegra114, all the CPUs
were independent, so that any CPU could be the last CPU to be
power-gated. Isn't that exactly why we don't need coupled cpuidle or
anything similar on Tegra114

> diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S

>  not_ca9:
> +	mov32	r9, 0xc0f
> +	cmp	r8, r9
> +	bleq	tegra_init_l2_for_a15

That's checking whether the CPU type is a Cortex-A15, isn't it? The only
CPUs that exist NVIDIA SoCs are Cortex-A9 and Cortex-A15, so I don't see
why we need to check whether the CPU is a Cortex-A15, given this label
is jumped to only when the CPU isn't a Cortex-A9.

[PATCH 1/4] clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops

[Joseph Lo]

On Wed, 2013-10-09 at 00:51 +0800, Stephen Warren wrote:
> On 10/08/2013 02:23 AM, Joseph Lo wrote:
> > Hook the functions for CPU hotplug support. After the CPU is hot
> > unplugged, the flow controller will handle to clock gate the CPU clock.
> > But still need to implement an empty function to avoid warning message.
> > 
> > Cc: Mike Turquette <mturquette@linaro.org>
> > Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
> > Signed-off-by: Joseph Lo <josephl@nvidia.com>
> > ---
> > This patch depends on the patch series "[PATCH 0/5] Tegra124 clock support"
> > that sent by Peter on 10/4/2013.
> 
> Uggh. This series mixes patches for drivers/clk and arch/arm/mach-tegra.
> I don't want to introduce dependencies between those two subsystems.
> Instead, if this patch is applied to the clock tree, and the reset of
> the patches to the Tegra tree, will that cause any build issues, or any
> run-time for any SoC other than Tegra124 (which is a new feature so it's
> fine if it doesn't work until everything is merged together)?

This patch can go through the clock tree and won't cause any build
issues or run-time failure even on Tegra124 (except CPU hot plug stress
testing). Only some warning message would show up.

But I am going to send some other patches for platform suspend support
for Tegra124, it might meet the issue you mentioned here. We only can
test it in our local tree or wait for the next linux-next (20131028?)
for testing after everything merged. So it might be OK, I guess.

[PATCH 3/4] ARM: tegra: make tegra_resume can work with current and later chips

[Joseph Lo]

On Wed, 2013-10-09 at 01:00 +0800, Stephen Warren wrote:
> On 10/08/2013 02:23 AM, Joseph Lo wrote:
> > Because the CPU0 was the first up and the last down core when cluster
> > power up/down or platform suspend. So only CPU0 needs the rest of the
> > functions to reset flow controller and re-enable SCU and L2. We also
> > move the L2 init function for Cortex-A15 to there. The secondery CPU
> > can just call cpu_resume.
> 
> Is that really true? I thought that starting with Tegra114, all the CPUs
> were independent, so that any CPU could be the last CPU to be
> power-gated. Isn't that exactly why we don't need coupled cpuidle or
> anything similar on Tegra114
> 
Yes, it's true. I realize the role of CPU0 is the same across all
current Tegra chips. Although we can support independent power gate for
CPU0 in Tegra114/124, for cluster power control it still needs to be set
up by CPU0 (last down and first up). So I send this patch for tunning
the code that only need for CPU0.

> > diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
> 
> >  not_ca9:
> > +	mov32	r9, 0xc0f
> > +	cmp	r8, r9
> > +	bleq	tegra_init_l2_for_a15
> 
> That's checking whether the CPU type is a Cortex-A15, isn't it? The only
> CPUs that exist NVIDIA SoCs are Cortex-A9 and Cortex-A15, so I don't see
> why we need to check whether the CPU is a Cortex-A15, given this label
> is jumped to only when the CPU isn't a Cortex-A9.

Good catch. Will fix.

[PATCH 3/4] ARM: tegra: make tegra_resume can work with current and later chips

[Joseph Lo]

On Wed, 2013-10-09 at 11:11 +0800, Joseph Lo wrote:
> On Wed, 2013-10-09 at 01:00 +0800, Stephen Warren wrote:
> > On 10/08/2013 02:23 AM, Joseph Lo wrote:
> > > diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
> > 
> > >  not_ca9:
> > > +	mov32	r9, 0xc0f
> > > +	cmp	r8, r9
> > > +	bleq	tegra_init_l2_for_a15
> > 
> > That's checking whether the CPU type is a Cortex-A15, isn't it? The only
> > CPUs that exist NVIDIA SoCs are Cortex-A9 and Cortex-A15, so I don't see
> > why we need to check whether the CPU is a Cortex-A15, given this label
> > is jumped to only when the CPU isn't a Cortex-A9.
> 
> Good catch. Will fix.
> 
Ah! I just realize the Cortex-A9 will go through here as well. So I
still need to code to make sure only Cortex-A15 execute the function.

[PATCH 3/4] ARM: tegra: make tegra_resume can work with current and later chips

[Stephen Warren]

On 10/09/2013 02:23 AM, Joseph Lo wrote:
> On Wed, 2013-10-09 at 11:11 +0800, Joseph Lo wrote:
>> On Wed, 2013-10-09 at 01:00 +0800, Stephen Warren wrote:
>>> On 10/08/2013 02:23 AM, Joseph Lo wrote:
>>>> diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
>>>
>>>>  not_ca9:
>>>> +	mov32	r9, 0xc0f
>>>> +	cmp	r8, r9
>>>> +	bleq	tegra_init_l2_for_a15
>>>
>>> That's checking whether the CPU type is a Cortex-A15, isn't it? The only
>>> CPUs that exist NVIDIA SoCs are Cortex-A9 and Cortex-A15, so I don't see
>>> why we need to check whether the CPU is a Cortex-A15, given this label
>>> is jumped to only when the CPU isn't a Cortex-A9.
>>
>> Good catch. Will fix.
>>
> Ah! I just realize the Cortex-A9 will go through here as well. So I
> still need to code to make sure only Cortex-A15 execute the function.

In that case, there's a bug in the label name; A9 CPUs shouldn't execute
code that's "not_ca9"...