From mboxrd@z Thu Jan 1 00:00:00 1970 From: andreas.herrmann@calxeda.com (Andreas Herrmann) Date: Fri, 18 Oct 2013 22:13:15 +0200 Subject: [PATCH 6/6] documentation/iommu: Update description of ARM System MMU binding In-Reply-To: <1382127195-15261-1-git-send-email-andreas.herrmann@calxeda.com> References: <1382127195-15261-1-git-send-email-andreas.herrmann@calxeda.com> Message-ID: <1382127195-15261-7-git-send-email-andreas.herrmann@calxeda.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch adds descriptions fore new properties of device tree binding for the ARM SMMU architecture. These properties control arm-smmu driver options. Cc: Rob Herring Cc: Grant Likely Cc: Will Deacon Signed-off-by: Andreas Herrmann --- .../devicetree/bindings/iommu/arm,smmu.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index e34c6cd..de88cf9 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -48,6 +48,17 @@ conditions. from the mmu-masters towards memory) node for this SMMU. +- arm,smmu-isolate-devices : Enable device isolation for all masters + of this SMMU. Ie. each master will be + attached to its own iommu domain. + +- arm,smmu-secure-config-access : Enable proper handling of buggy + implementations that always use + secure access to SMMU configuration + registers. In this case non-secure + aliases of secure registers have to + be used during SMMU configuration. + Example: smmu { @@ -67,4 +78,5 @@ Example: */ mmu-masters = <&dma0 0xd01d 0xd01e>, <&dma1 0xd11c>; + arm,smmu-isolate-devices; }; -- 1.7.9.5