From mboxrd@z Thu Jan 1 00:00:00 1970 From: peter.chen@freescale.com (Peter Chen) Date: Tue, 22 Oct 2013 13:58:38 +0800 Subject: [Patch v2 04/14] usb: doc: phy-mxs: update binding for adding anatop phandle In-Reply-To: <1382421528-17897-1-git-send-email-peter.chen@freescale.com> References: <1382421528-17897-1-git-send-email-peter.chen@freescale.com> Message-ID: <1382421528-17897-5-git-send-email-peter.chen@freescale.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add anatop phandle which is used to access anatop registers to control PHY's power and other USB operations. Signed-off-by: Peter Chen --- Documentation/devicetree/bindings/usb/mxs-phy.txt | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/mxs-phy.txt b/Documentation/devicetree/bindings/usb/mxs-phy.txt index 912d4ad..5837963 100644 --- a/Documentation/devicetree/bindings/usb/mxs-phy.txt +++ b/Documentation/devicetree/bindings/usb/mxs-phy.txt @@ -8,10 +8,12 @@ mxs PHY verions. "fsl,imx6sl-usbphy": for mx6sl and later mx6 soc serial - reg: Should contain registers location and length - interrupts: Should contain phy interrupt +- fsl,anatop: phandle for anatop register, it is only for mx6 SoC serial Example: usbphy1: usbphy at 020c9000 { compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <0 44 0x04>; + fsl,anatop = <&anatop>; }; -- 1.7.1