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Thu, 24 Jan 2019 18:31:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1548354681; bh=xuCijXfAk1T6OPLysp/p8ggboqusyrHlNrRZbB6m2YU=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=bczxgM06CzAj3VAkb4WKdTCBYr1skicRoHtFMgClfqu3IvwvFFE/Eix1/wbakfkLQ IWdSCkCczdR3JL7tb3joiy8gm4uE6QdJwczr2StwLlZpg+I/bCkSVWi7RmnEtcSPvw vvegSmzjQ1fKwbr1o+HD5qI/s1zRFRYdAvPhppY8= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 47D62607DD Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=saiprakash.ranjan@codeaurora.org Subject: Re: [PATCHv4 1/4] arm64: dts: qcom: sdm845: Add Coresight support To: Mathieu Poirier References: <1bd39862-0725-70ce-6535-fdb59569f683@arm.com> <75ed74af-6946-b86d-092e-42dc16e55308@codeaurora.org> <91a90daa-9e14-2d2e-e633-2ddfdc0955bf@arm.com> <3906faf1-abbd-9c28-ad55-ed3800f06352@codeaurora.org> <5b54c6e0-7d22-ecee-486f-31333f49f84a@codeaurora.org> <71ae9f41-50ff-742b-3e12-ca2ce84e0d3c@codeaurora.org> From: Sai Prakash Ranjan Message-ID: <1384cbbb-6e3e-f2e3-5ea4-8d0b237d64c7@codeaurora.org> Date: Fri, 25 Jan 2019 00:01:04 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190124_103125_862008_04F4C7AC X-CRM114-Status: GOOD ( 16.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Rajendra Nayak , Suzuki K Poulose , Alexander Shishkin , Linux Kernel Mailing List , linux-arm-msm , John Horley , Doug Anderson , Bjorn Andersson , David Brown , Rob Herring , Sibi Sankar , Vivek Gautam , Leo Yan , Andy Gross , Stephen Boyd , linux-arm-kernel Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Good day Mathieu, On 1/24/2019 9:37 PM, Mathieu Poirier wrote: > Good day Sai, > > On Wed, 23 Jan 2019 at 13:18, Sai Prakash Ranjan > wrote: >> >> Hi Mathieu, >> >> On 1/24/2019 12:44 AM, Mathieu Poirier wrote: >>> On Wed, 23 Jan 2019 at 05:12, Sai Prakash Ranjan >>> wrote: >>> >>> That depends on whether the ETMs have been modified at all, something >>> Suzuki has asked to be clarified. If ETMs have been modified then we >>> need to understand how they differ from the driver's implementation. >> >> We had asked hardware team for clarification regarding this. Let me >> poke them again. As for the driver, downstream implementation also >> uses the same driver, so I am not sure what do you mean by differing >> from the driver's implementation. > > The driver has been implemented in accordance to ARM's coresight > technical reference manual and expects the HW to behave in accordance > to that specification. Here we want to make sure the IP on your board > is conformant to the same specification. If not then the driver needs > to be made flexible to handle both kind IPs. > The HW does behave as per the specification. As discussed in reply to Suzuki, Coresight peripherals do use JEP106 ID of ARM for SDM845 and for MSM8996, the ID is of QCOM(0x70) since it was not based on any ARM derivative. And the etm4x driver handles it all well. Other values of PID registers are implementation defined and can be different from standard ARM cpu core types. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel