From: dbaryshkov@gmail.com (Dmitry Eremin-Solenikov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 09/10] arm: sa1100: switch to hwirq usage
Date: Sun, 15 Dec 2013 08:28:16 +0400 [thread overview]
Message-ID: <1387081697-21841-10-git-send-email-dbaryshkov@gmail.com> (raw)
In-Reply-To: <1387081697-21841-1-git-send-email-dbaryshkov@gmail.com>
Switch internally to using hardware irq numbers (hwirq). In case of GPIO
interrupts, hwirq is equal to GPIO number. In case of system interrupts,
hwirq is equal to interrupt number in the interrupt controller.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
---
arch/arm/mach-sa1100/irq.c | 41 ++++++++++++++++-------------------------
1 file changed, 16 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index 5c72062..43287a5 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -49,20 +49,11 @@ static int GPIO_IRQ_falling_edge;
static int GPIO_IRQ_mask = (1 << 11) - 1;
static int GPIO_IRQ_wake_mask;
-/*
- * To get the GPIO number from an IRQ number
- */
-#define GPIO_11_27_IRQ(i) ((i) - 21)
-#define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq))
-
static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
{
unsigned int mask;
- if (d->irq <= 10)
- mask = 1 << d->irq;
- else
- mask = GPIO11_27_MASK(d->irq);
+ mask = BIT(d->hwirq);
if (type == IRQ_TYPE_PROBE) {
if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
@@ -92,31 +83,31 @@ static int sa1100_gpio_type(struct irq_data *d, unsigned int type)
*/
static void sa1100_low_gpio_ack(struct irq_data *d)
{
- writel_relaxed((1 << d->irq), gpio_regbase + GEDR_OFFSET);
+ writel_relaxed(BIT(d->hwirq), gpio_regbase + GEDR_OFFSET);
}
static void sa1100_low_gpio_mask(struct irq_data *d)
{
unsigned int r = readl_relaxed(irq_regbase + ICMR_OFFSET);
- r &= ~BIT(d->irq);
+ r &= ~BIT(d->hwirq);
writel_relaxed(r, irq_regbase + ICMR_OFFSET);
}
static void sa1100_low_gpio_unmask(struct irq_data *d)
{
unsigned int r = readl_relaxed(irq_regbase + ICMR_OFFSET);
- r |= BIT(d->irq);
+ r |= BIT(d->hwirq);
writel_relaxed(r, irq_regbase + ICMR_OFFSET);
}
static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on)
{
if (on)
- GPIO_IRQ_wake_mask |= BIT(d->irq);
+ GPIO_IRQ_wake_mask |= BIT(d->hwirq);
else
- GPIO_IRQ_wake_mask &= ~BIT(d->irq);
+ GPIO_IRQ_wake_mask &= ~BIT(d->hwirq);
- return sa11x0_gpio_set_wake(d->irq, on);
+ return sa11x0_gpio_set_wake(d->hwirq, on);
}
static struct irq_chip sa1100_low_gpio_chip = {
@@ -183,14 +174,14 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
*/
static void sa1100_high_gpio_ack(struct irq_data *d)
{
- unsigned int mask = GPIO11_27_MASK(d->irq);
+ unsigned int mask = BIT(d->hwirq);
writel_relaxed(mask, gpio_regbase + GEDR_OFFSET);
}
static void sa1100_high_gpio_mask(struct irq_data *d)
{
- unsigned int mask = GPIO11_27_MASK(d->irq);
+ unsigned int mask = BIT(d->hwirq);
unsigned int r;
GPIO_IRQ_mask &= ~mask;
@@ -205,7 +196,7 @@ static void sa1100_high_gpio_mask(struct irq_data *d)
static void sa1100_high_gpio_unmask(struct irq_data *d)
{
- unsigned int mask = GPIO11_27_MASK(d->irq);
+ unsigned int mask = BIT(d->hwirq);
GPIO_IRQ_mask |= mask;
@@ -218,11 +209,11 @@ static void sa1100_high_gpio_unmask(struct irq_data *d)
static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on)
{
if (on)
- GPIO_IRQ_wake_mask |= GPIO11_27_MASK(d->irq);
+ GPIO_IRQ_wake_mask |= BIT(d->hwirq);
else
- GPIO_IRQ_wake_mask &= ~GPIO11_27_MASK(d->irq);
+ GPIO_IRQ_wake_mask &= ~BIT(d->hwirq);
- return sa11x0_gpio_set_wake(GPIO_11_27_IRQ(d->irq), on);
+ return sa11x0_gpio_set_wake(d->hwirq, on);
}
static struct irq_chip sa1100_high_gpio_chip = {
@@ -258,14 +249,14 @@ static struct irq_domain *sa1100_high_gpio_irqdomain;
static void sa1100_mask_irq(struct irq_data *d)
{
unsigned int r = readl_relaxed(irq_regbase + ICMR_OFFSET);
- r &= ~BIT(d->irq);
+ r &= ~BIT(d->hwirq);
writel_relaxed(r, irq_regbase + ICMR_OFFSET);
}
static void sa1100_unmask_irq(struct irq_data *d)
{
unsigned int r = readl_relaxed(irq_regbase + ICMR_OFFSET);
- r |= BIT(d->irq);
+ r |= BIT(d->hwirq);
writel_relaxed(r, irq_regbase + ICMR_OFFSET);
}
@@ -274,7 +265,7 @@ static void sa1100_unmask_irq(struct irq_data *d)
*/
static int sa1100_set_wake(struct irq_data *d, unsigned int on)
{
- return sa11x0_sc_set_wake(d->irq, on);
+ return sa11x0_sc_set_wake(d->hwirq, on);
}
static struct irq_chip sa1100_normal_chip = {
--
1.8.5.1
next prev parent reply other threads:[~2013-12-15 4:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-15 4:28 [PATCH v3 00/10] ARM: sa1100: improve irq handling Dmitry Eremin-Solenikov
2013-12-15 4:28 ` [PATCH v3 01/10] ARM: sa1100: switch to MULTI_IRQ_HANDLER Dmitry Eremin-Solenikov
2013-12-15 4:28 ` [PATCH v3 02/10] ARM: sa1100: drop entry-macro.S Dmitry Eremin-Solenikov
2013-12-15 4:28 ` [PATCH v3 03/10] ARM: sa1100: add platform functions to handle PWER settings Dmitry Eremin-Solenikov
2013-12-15 4:28 ` [PATCH v3 04/10] arm: sa1100: use new functions that hide PWER access Dmitry Eremin-Solenikov
2013-12-15 4:28 ` [PATCH v3 05/10] arm: sa1100: use ioremap'ped access instead of direct register access Dmitry Eremin-Solenikov
2013-12-15 4:28 ` [PATCH v3 06/10] ARM: sa1100: enable IRQ domains Dmitry Eremin-Solenikov
2013-12-15 4:28 ` [PATCH v3 07/10] arm: sa1100: introduce irqdomains support Dmitry Eremin-Solenikov
2013-12-15 4:28 ` [PATCH v3 08/10] arm: sa1100: merge IRQ 11 to "normal" irq domain Dmitry Eremin-Solenikov
2013-12-15 4:28 ` Dmitry Eremin-Solenikov [this message]
2013-12-15 4:28 ` [PATCH v3 10/10] ARM: locomo: don't clobber chip data for chained irq Dmitry Eremin-Solenikov
2013-12-20 9:25 ` [PATCH v3 00/10] ARM: sa1100: improve irq handling Linus Walleij
2013-12-20 11:15 ` Dmitry Eremin-Solenikov
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