* [PATCH V2 01/13] ARM: dts: imx6qdl-sabrelite: move pcie to imx6qdl-sabrelite.dtsi
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 1:12 ` [PATCH V2 02/13] ARM: dts: imx6qdl-sabrelite: move USDHC4 CD to pinctrl_usdhc4 Troy Kisky
` (11 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
PCIe is common to Quad, Dual, Dual Lite, and Solo variants
of the processor. So, move enabling from imx6q-sabrelite.dts
to imx6qdl-sabrelite.dtsi.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: new patch which can be squashed with
6bbb49ddfa8466a91a2ce1411a2ac969d0d0a614
ARM: dts: imx: sabrelite: add Dual Lite/Solo support
if desired.
---
arch/arm/boot/dts/imx6q-sabrelite.dts | 4 ----
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 4 ++++
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index 8128fb9..96e4688 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -19,10 +19,6 @@
compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
};
-&pcie {
- status = "okay";
-};
-
&sata {
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index c4aa504..5394e02 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -187,6 +187,10 @@
};
};
+&pcie {
+ status = "okay";
+};
+
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 02/13] ARM: dts: imx6qdl-sabrelite: move USDHC4 CD to pinctrl_usdhc4
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
2013-12-17 1:12 ` [PATCH V2 01/13] ARM: dts: imx6qdl-sabrelite: move pcie to imx6qdl-sabrelite.dtsi Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 1:12 ` [PATCH V2 03/13] ARM: dts: imx6qdl-sabrelite: move USDHC3 CD/WP to pinctrl_usdhc3 Troy Kisky
` (10 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves pin NANDF_D6 (CD) from pinctrl_hog to pinctrl_usdhc4.
It also explicitly sets the pad to 0x1b0b0, which is also the value
that it has before this patch if using mainline u-boot.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: New patch.. V1 patch to add comments was broken up into
multiple patches
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 5394e02..8bb910b 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,6 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
@@ -157,7 +156,10 @@
};
pinctrl_usdhc4: usdhc4grp {
- fsl,pins = <MX6QDL_USDHC4_PINGRP_D4>;
+ fsl,pins = <
+ MX6QDL_USDHC4_PINGRP_D4
+ MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
+ >;
};
};
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 03/13] ARM: dts: imx6qdl-sabrelite: move USDHC3 CD/WP to pinctrl_usdhc3
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
2013-12-17 1:12 ` [PATCH V2 01/13] ARM: dts: imx6qdl-sabrelite: move pcie to imx6qdl-sabrelite.dtsi Troy Kisky
2013-12-17 1:12 ` [PATCH V2 02/13] ARM: dts: imx6qdl-sabrelite: move USDHC4 CD to pinctrl_usdhc4 Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 1:12 ` [PATCH V2 04/13] ARM: dts: imx6qdl-sabrelite: move spi-nor CS to pinctrl_ecspi1 Troy Kisky
` (9 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves pin SD3_DAT5/4 (CD/WP) from pinctrl_hog to pinctrl_usdhc3.
It also explicitly sets the pad SD3_DAT5 to 0x1b0b0, which is also the value
that it has before this patch if using mainline u-boot.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: New patch.. V1 patch to add comments was broken up into
multiple patches
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 8bb910b..96c3902 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -117,8 +117,6 @@
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
>;
};
@@ -152,7 +150,11 @@
};
pinctrl_usdhc3: usdhc3grp {
- fsl,pins = <MX6QDL_USDHC3_PINGRP_D4>;
+ fsl,pins = <
+ MX6QDL_USDHC3_PINGRP_D4
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
+ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
+ >;
};
pinctrl_usdhc4: usdhc4grp {
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 04/13] ARM: dts: imx6qdl-sabrelite: move spi-nor CS to pinctrl_ecspi1
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (2 preceding siblings ...)
2013-12-17 1:12 ` [PATCH V2 03/13] ARM: dts: imx6qdl-sabrelite: move USDHC3 CD/WP to pinctrl_usdhc3 Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 1:12 ` [PATCH V2 05/13] ARM: dts: imx6qdl-sabrelite: move usbotg power enable to pinctrl_usbotg Troy Kisky
` (8 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves pin EIM_D19 (CS) from pinctrl_hog to pinctrl_ecspi1.
It also explicitly sets the pad to 0x000b1.
Before this patch, it has the value 0x100b1 if using mainline u-boot.
So this patch also removes hysteresis since the pad is always an output.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: New patch.. V1 patch to add comments was broken up into
multiple patches
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 96c3902..90d99bf 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,6 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
@@ -126,7 +125,10 @@
};
pinctrl_ecspi1: ecspi1grp {
- fsl,pins = <MX6QDL_ECSPI1_PINGRP1>;
+ fsl,pins = <
+ MX6QDL_ECSPI1_PINGRP1
+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
+ >;
};
pinctrl_enet: enetgrp {
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 05/13] ARM: dts: imx6qdl-sabrelite: move usbotg power enable to pinctrl_usbotg
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (3 preceding siblings ...)
2013-12-17 1:12 ` [PATCH V2 04/13] ARM: dts: imx6qdl-sabrelite: move spi-nor CS to pinctrl_ecspi1 Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 1:12 ` [PATCH V2 06/13] ARM: dts: imx6qdl-sabrelite: move phy reset to pinctrl_enet Troy Kisky
` (7 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves pin EIM_D22(power enable) from pinctrl_hog to pinctrl_usbotg.
It also explicitly sets the pad to 0x000b0, which is also the value
that it has before this patch if using mainline u-boot.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: New patch.. V1 patch to add comments was broken up into
multiple patches
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 90d99bf..2654ff1 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,6 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
>;
@@ -148,7 +147,11 @@
};
pinctrl_usbotg: usbotggrp {
- fsl,pins = <MX6QDL_USBOTG_PINGRP1>;
+ fsl,pins = <
+ MX6QDL_USBOTG_PINGRP1
+ /* power enable, high active */
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
+ >;
};
pinctrl_usdhc3: usdhc3grp {
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 06/13] ARM: dts: imx6qdl-sabrelite: move phy reset to pinctrl_enet
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (4 preceding siblings ...)
2013-12-17 1:12 ` [PATCH V2 05/13] ARM: dts: imx6qdl-sabrelite: move usbotg power enable to pinctrl_usbotg Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 1:12 ` [PATCH V2 07/13] ARM: dts: imx6qdl-sabrelite: explicitly set pad for SGTL5000 sys_mclk Troy Kisky
` (6 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves pin EIM_D23 (phy reset) from pinctrl_hog to pinctrl_enet.
It also explicitly sets the pad to 0x000b0.
Before this patch, it has the value 0x1b0b0 if using mainline u-boot.
So this patch also removes hysteresis and a 100K pullup since the pad
is always an output.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: New patch.. V1 patch to add comments was broken up into
multiple patches
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 2654ff1..ee3f5c0 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,6 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
>;
};
@@ -131,7 +130,11 @@
};
pinctrl_enet: enetgrp {
- fsl,pins = <MX6QDL_ENET_PINGRP1>;
+ fsl,pins = <
+ MX6QDL_ENET_PINGRP1
+ /* Phy reset */
+ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
+ >;
};
pinctrl_i2c1: i2c1grp {
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 07/13] ARM: dts: imx6qdl-sabrelite: explicitly set pad for SGTL5000 sys_mclk
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (5 preceding siblings ...)
2013-12-17 1:12 ` [PATCH V2 06/13] ARM: dts: imx6qdl-sabrelite: move phy reset to pinctrl_enet Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 1:12 ` [PATCH V2 08/13] ARM: dts: imx6qdl-sabrelite: add gpio-keys Troy Kisky
` (5 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
Explicitly sets the pad GPIO_0 (sys_mclk) to 0x030b0.
Before this patch, it has the value 0x130b0 if using mainline u-boot.
So this patch also removes hysteresis. The 100k pulldown remains so
that a disabled clock will be low.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: New patch.. V1 patch to add comments was broken up into
multiple patches
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index ee3f5c0..29f0b40 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -114,7 +114,8 @@
imx6q-sabrelite {
pinctrl_hog: hoggrp {
fsl,pins = <
- MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
+ /* SGTL5000 sys_mclk */
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
>;
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 08/13] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (6 preceding siblings ...)
2013-12-17 1:12 ` [PATCH V2 07/13] ARM: dts: imx6qdl-sabrelite: explicitly set pad for SGTL5000 sys_mclk Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 13:46 ` Shawn Guo
2013-12-17 1:12 ` [PATCH V2 09/13] ARM: dts: imx6qdl-sabrelite: add pwms for backlights Troy Kisky
` (4 subsequent siblings)
12 siblings, 1 reply; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
Add power, menu, home, back, volume up, and volume down
buttons.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: add #include <dt-bindings/input/input.h>
to substitute KEY_POWER for 116
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 54 ++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 29f0b40..36ffbb2 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -9,6 +9,8 @@
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
/ {
memory {
@@ -49,6 +51,46 @@
};
};
+ gpio-keys {
+ compatible = "gpio-keys";
+ power {
+ label = "Power Button";
+ gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_POWER>;
+ gpio-key,wakeup;
+ };
+
+ menu {
+ label = "Menu";
+ gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_MENU>;
+ };
+
+ home {
+ label = "Home";
+ gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_HOME>;
+ };
+
+ back {
+ label = "Back";
+ gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_BACK>;
+ };
+
+ volume-up {
+ label = "Volume Up";
+ gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEUP>;
+ };
+
+ volume-down {
+ label = "Volume Down";
+ gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_VOLUMEDOWN>;
+ };
+ };
+
sound {
compatible = "fsl,imx6q-sabrelite-sgtl5000",
"fsl,imx-audio-sgtl5000";
@@ -116,6 +158,18 @@
fsl,pins = <
/* SGTL5000 sys_mclk */
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
+ /* Power Button */
+ MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
+ /* Menu Button */
+ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
+ /* Home Button */
+ MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
+ /* Back Button */
+ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
+ /* Volume Up Button */
+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
+ /* Volume Down Button */
+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
>;
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 08/13] ARM: dts: imx6qdl-sabrelite: add gpio-keys
2013-12-17 1:12 ` [PATCH V2 08/13] ARM: dts: imx6qdl-sabrelite: add gpio-keys Troy Kisky
@ 2013-12-17 13:46 ` Shawn Guo
0 siblings, 0 replies; 17+ messages in thread
From: Shawn Guo @ 2013-12-17 13:46 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 16, 2013 at 06:12:58PM -0700, Troy Kisky wrote:
> Add power, menu, home, back, volume up, and volume down
> buttons.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>
> ---
> v2: add #include <dt-bindings/input/input.h>
> to substitute KEY_POWER for 116
> ---
> arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 54 ++++++++++++++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> index 29f0b40..36ffbb2 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> @@ -9,6 +9,8 @@
> * http://www.opensource.org/licenses/gpl-license.html
> * http://www.gnu.org/copyleft/gpl.html
> */
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
>
> / {
> memory {
> @@ -49,6 +51,46 @@
> };
> };
>
> + gpio-keys {
> + compatible = "gpio-keys";
> + power {
> + label = "Power Button";
> + gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_POWER>;
> + gpio-key,wakeup;
> + };
> +
> + menu {
> + label = "Menu";
> + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_MENU>;
> + };
> +
> + home {
> + label = "Home";
> + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_HOME>;
> + };
> +
> + back {
> + label = "Back";
> + gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_BACK>;
> + };
> +
> + volume-up {
> + label = "Volume Up";
> + gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEUP>;
> + };
> +
> + volume-down {
> + label = "Volume Down";
> + gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_VOLUMEDOWN>;
> + };
> + };
> +
> sound {
> compatible = "fsl,imx6q-sabrelite-sgtl5000",
> "fsl,imx-audio-sgtl5000";
> @@ -116,6 +158,18 @@
> fsl,pins = <
> /* SGTL5000 sys_mclk */
> MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
> + /* Power Button */
> + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
> + /* Menu Button */
> + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
> + /* Home Button */
> + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
> + /* Back Button */
> + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
> + /* Volume Up Button */
> + MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
> + /* Volume Down Button */
> + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
Why don't you create a pingrp for them and add a pinctrl phandle in
gpio-keys node pointing to it?
Shawn
> >;
> };
>
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH V2 09/13] ARM: dts: imx6qdl-sabrelite: add pwms for backlights
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (7 preceding siblings ...)
2013-12-17 1:12 ` [PATCH V2 08/13] ARM: dts: imx6qdl-sabrelite: add gpio-keys Troy Kisky
@ 2013-12-17 1:12 ` Troy Kisky
2013-12-17 1:13 ` [PATCH V2 10/13] ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy Troy Kisky
` (3 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:12 UTC (permalink / raw)
To: linux-arm-kernel
add pwm1 for lcd backlight
add pwm4 for lvds backlight
add pwm3 for ov5640 mipi clock
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: no change
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 54 ++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 36ffbb2..723259f 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -104,6 +104,24 @@
mux-int-port = <1>;
mux-ext-port = <4>;
};
+
+ backlight_lcd {
+ compatible = "pwm-backlight";
+ pwms = <&pwm1 0 5000000>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <7>;
+ power-supply = <®_3p3v>;
+ status = "okay";
+ };
+
+ backlight_lvds {
+ compatible = "pwm-backlight";
+ pwms = <&pwm4 0 5000000>;
+ brightness-levels = <0 4 8 16 32 64 128 255>;
+ default-brightness-level = <7>;
+ power-supply = <®_3p3v>;
+ status = "okay";
+ };
};
&audmux {
@@ -196,6 +214,24 @@
fsl,pins = <MX6QDL_I2C1_PINGRP1>;
};
+ pinctrl_pwm1: pwm1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
+ >;
+ };
+
+ pinctrl_pwm3: pwm3grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
+ >;
+ };
+
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <MX6QDL_UART1_PINGRP2>;
};
@@ -258,6 +294,24 @@
status = "okay";
};
+&pwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1>;
+ status = "okay";
+};
+
+&pwm3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm3>;
+ status = "okay";
+};
+
+&pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+ status = "okay";
+};
+
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 10/13] ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (8 preceding siblings ...)
2013-12-17 1:12 ` [PATCH V2 09/13] ARM: dts: imx6qdl-sabrelite: add pwms for backlights Troy Kisky
@ 2013-12-17 1:13 ` Troy Kisky
2013-12-17 1:13 ` [PATCH V2 11/13] ARM: dts: imx6qdl-sabrelite: fix ENET group Troy Kisky
` (2 subsequent siblings)
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:13 UTC (permalink / raw)
To: linux-arm-kernel
Set the data delays to min, and clock delays to max
because the traces are equal length on pcb.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
---
v2: no change
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 723259f..532a7e0 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -149,6 +149,18 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 0>;
+ txen-skew-ps = <0>;
+ txc-skew-ps = <3000>;
+ rxdv-skew-ps = <0>;
+ rxc-skew-ps = <3000>;
+ rxd0-skew-ps = <0>;
+ rxd1-skew-ps = <0>;
+ rxd2-skew-ps = <0>;
+ rxd3-skew-ps = <0>;
+ txd0-skew-ps = <0>;
+ txd1-skew-ps = <0>;
+ txd2-skew-ps = <0>;
+ txd3-skew-ps = <0>;
status = "okay";
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 11/13] ARM: dts: imx6qdl-sabrelite: fix ENET group
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (9 preceding siblings ...)
2013-12-17 1:13 ` [PATCH V2 10/13] ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy Troy Kisky
@ 2013-12-17 1:13 ` Troy Kisky
2013-12-17 1:13 ` [PATCH V2 12/13] ARM: dts: imx6qdl-sabrelite: Add over-current pin to usbotg Troy Kisky
2013-12-17 1:13 ` [PATCH V2 13/13] ARM: dts: imx: add nitrogen6x board Troy Kisky
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:13 UTC (permalink / raw)
To: linux-arm-kernel
GPIO16 is used for I2C3, not ENET_REF_CLK.
Replace MX6QDL_ENET_PINGRP1 with explicit list.
Also, remove pull-ups from tx pins, and ENET_MDIO
which has an external pull-up.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
---
v2: minor change to commit message
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 532a7e0..f1d8b24 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -216,7 +216,21 @@
pinctrl_enet: enetgrp {
fsl,pins = <
- MX6QDL_ENET_PINGRP1
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
/* Phy reset */
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
>;
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 12/13] ARM: dts: imx6qdl-sabrelite: Add over-current pin to usbotg
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (10 preceding siblings ...)
2013-12-17 1:13 ` [PATCH V2 11/13] ARM: dts: imx6qdl-sabrelite: fix ENET group Troy Kisky
@ 2013-12-17 1:13 ` Troy Kisky
2013-12-17 1:13 ` [PATCH V2 13/13] ARM: dts: imx: add nitrogen6x board Troy Kisky
12 siblings, 0 replies; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:13 UTC (permalink / raw)
To: linux-arm-kernel
KEY_COL4 is over-current for usbotg on Sabre Lite.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
---
v2: no change
---
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index f1d8b24..b2711ae 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -268,7 +268,8 @@
pinctrl_usbotg: usbotggrp {
fsl,pins = <
- MX6QDL_USBOTG_PINGRP1
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+ MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
/* power enable, high active */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
>;
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 13/13] ARM: dts: imx: add nitrogen6x board
2013-12-17 1:12 [PATCH V2 00/13] Update Sabre Lite Troy Kisky
` (11 preceding siblings ...)
2013-12-17 1:13 ` [PATCH V2 12/13] ARM: dts: imx6qdl-sabrelite: Add over-current pin to usbotg Troy Kisky
@ 2013-12-17 1:13 ` Troy Kisky
2013-12-17 13:48 ` Shawn Guo
12 siblings, 1 reply; 17+ messages in thread
From: Troy Kisky @ 2013-12-17 1:13 UTC (permalink / raw)
To: linux-arm-kernel
Add file imx6q-nitrogen6x.dts,
imx6dl-nitrogen6x.dts,
imx6qdl-nitrogen6x.dtsi
And add board to makefile.
Eric Nelson created a web page to show the
differences between Nitrogen6x and Sabre Lite boards.
http://boundarydevices.com/differences-sabre-lite-nitrogen6x
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
v2: rebase only
---
arch/arm/boot/dts/Makefile | 2 ++
arch/arm/boot/dts/imx6dl-nitrogen6x.dts | 22 ++++++++++++++++++
arch/arm/boot/dts/imx6q-nitrogen6x.dts | 26 ++++++++++++++++++++++
...6qdl-sabrelite.dtsi => imx6qdl-nitrogen6x.dtsi} | 17 +++++++-------
4 files changed, 58 insertions(+), 9 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6dl-nitrogen6x.dts
create mode 100644 arch/arm/boot/dts/imx6q-nitrogen6x.dts
copy arch/arm/boot/dts/{imx6qdl-sabrelite.dtsi => imx6qdl-nitrogen6x.dtsi} (95%)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index c55a22d..16f0c5c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -150,6 +150,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
imx6dl-gw54xx.dtb \
+ imx6dl-nitrogen6x.dtb \
imx6dl-sabreauto.dtb \
imx6dl-sabrelite.dtb \
imx6dl-sabresd.dtb \
@@ -162,6 +163,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
imx6q-gw53xx.dtb \
imx6q-gw5400-a.dtb \
imx6q-gw54xx.dtb \
+ imx6q-nitrogen6x.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-sabreauto.dtb \
imx6q-sabrelite.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-nitrogen6x.dts b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
new file mode 100644
index 0000000..89d32f3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Boundary Devices, Inc.
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include "imx6qdl-nitrogen6x.dtsi"
+
+/ {
+ model = "Freescale i.MX6 DualLite Nitrogen6x Board";
+ compatible = "fsl,imx6dl-nitrogen6x", "fsl,imx6dl";
+
+};
diff --git a/arch/arm/boot/dts/imx6q-nitrogen6x.dts b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
new file mode 100644
index 0000000..5790172
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2013 Boundary Devices, Inc.
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6q.dtsi"
+#include "imx6qdl-nitrogen6x.dtsi"
+
+/ {
+ model = "Freescale i.MX6 Quad Nitrogen6x Board";
+ compatible = "fsl,imx6q-nitrogen6x", "fsl,imx6q";
+
+};
+
+&sata {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
similarity index 95%
copy from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
copy to arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index b2711ae..65c9a9b 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -1,4 +1,5 @@
/*
+ * Copyright 2013 Boundary Devices, Inc.
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
@@ -92,9 +93,9 @@
};
sound {
- compatible = "fsl,imx6q-sabrelite-sgtl5000",
+ compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
"fsl,imx-audio-sgtl5000";
- model = "imx6q-sabrelite-sgtl5000";
+ model = "imx6q-nitrogen6x-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&codec>;
audio-routing =
@@ -102,7 +103,7 @@
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
- mux-ext-port = <4>;
+ mux-ext-port = <3>;
};
backlight_lcd {
@@ -148,7 +149,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
- phy-reset-gpios = <&gpio3 23 0>;
+ phy-reset-gpios = <&gpio1 27 0>;
txen-skew-ps = <0>;
txc-skew-ps = <3000>;
rxdv-skew-ps = <0>;
@@ -183,7 +184,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
- imx6q-sabrelite {
+ imx6q-nitrogen6x {
pinctrl_hog: hoggrp {
fsl,pins = <
/* SGTL5000 sys_mclk */
@@ -204,7 +205,7 @@
};
pinctrl_audmux: audmuxgrp {
- fsl,pins = <MX6QDL_AUDMUX_PINGRP1>;
+ fsl,pins = <MX6QDL_AUDMUX_PINGRP2>;
};
pinctrl_ecspi1: ecspi1grp {
@@ -232,7 +233,7 @@
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
/* Phy reset */
- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
+ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
>;
};
@@ -279,7 +280,6 @@
fsl,pins = <
MX6QDL_USDHC3_PINGRP_D4
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
>;
};
@@ -372,7 +372,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 0 0>;
- wp-gpios = <&gpio7 1 0>;
vmmc-supply = <®_3p3v>;
status = "okay";
};
--
1.8.1.2
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH V2 13/13] ARM: dts: imx: add nitrogen6x board
2013-12-17 1:13 ` [PATCH V2 13/13] ARM: dts: imx: add nitrogen6x board Troy Kisky
@ 2013-12-17 13:48 ` Shawn Guo
2013-12-17 18:49 ` Troy Kisky
0 siblings, 1 reply; 17+ messages in thread
From: Shawn Guo @ 2013-12-17 13:48 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 16, 2013 at 06:13:03PM -0700, Troy Kisky wrote:
> Add file imx6q-nitrogen6x.dts,
> imx6dl-nitrogen6x.dts,
> imx6qdl-nitrogen6x.dtsi
>
> And add board to makefile.
>
> Eric Nelson created a web page to show the
> differences between Nitrogen6x and Sabre Lite boards.
> http://boundarydevices.com/differences-sabre-lite-nitrogen6x
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>
> ---
> v2: rebase only
> ---
> arch/arm/boot/dts/Makefile | 2 ++
> arch/arm/boot/dts/imx6dl-nitrogen6x.dts | 22 ++++++++++++++++++
> arch/arm/boot/dts/imx6q-nitrogen6x.dts | 26 ++++++++++++++++++++++
> ...6qdl-sabrelite.dtsi => imx6qdl-nitrogen6x.dtsi} | 17 +++++++-------
> 4 files changed, 58 insertions(+), 9 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6dl-nitrogen6x.dts
> create mode 100644 arch/arm/boot/dts/imx6q-nitrogen6x.dts
> copy arch/arm/boot/dts/{imx6qdl-sabrelite.dtsi => imx6qdl-nitrogen6x.dtsi} (95%)
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index c55a22d..16f0c5c 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -150,6 +150,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> imx6dl-gw52xx.dtb \
> imx6dl-gw53xx.dtb \
> imx6dl-gw54xx.dtb \
> + imx6dl-nitrogen6x.dtb \
> imx6dl-sabreauto.dtb \
> imx6dl-sabrelite.dtb \
> imx6dl-sabresd.dtb \
> @@ -162,6 +163,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
> imx6q-gw53xx.dtb \
> imx6q-gw5400-a.dtb \
> imx6q-gw54xx.dtb \
> + imx6q-nitrogen6x.dtb \
> imx6q-phytec-pbab01.dtb \
> imx6q-sabreauto.dtb \
> imx6q-sabrelite.dtb \
> diff --git a/arch/arm/boot/dts/imx6dl-nitrogen6x.dts b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
> new file mode 100644
> index 0000000..89d32f3
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
> @@ -0,0 +1,22 @@
> +/*
> + * Copyright 2013 Boundary Devices, Inc.
> + * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2011 Linaro Ltd.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/dts-v1/;
> +#include "imx6dl.dtsi"
> +#include "imx6qdl-nitrogen6x.dtsi"
> +
> +/ {
> + model = "Freescale i.MX6 DualLite Nitrogen6x Board";
> + compatible = "fsl,imx6dl-nitrogen6x", "fsl,imx6dl";
> +
Unnecessary blank line.
> +};
> diff --git a/arch/arm/boot/dts/imx6q-nitrogen6x.dts b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
> new file mode 100644
> index 0000000..5790172
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6q-nitrogen6x.dts
> @@ -0,0 +1,26 @@
> +/*
> + * Copyright 2013 Boundary Devices, Inc.
> + * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2011 Linaro Ltd.
> + *
> + * The code contained herein is licensed under the GNU General Public
> + * License. You may obtain a copy of the GNU General Public License
> + * Version 2 or later at the following locations:
> + *
> + * http://www.opensource.org/licenses/gpl-license.html
> + * http://www.gnu.org/copyleft/gpl.html
> + */
> +
> +/dts-v1/;
> +#include "imx6q.dtsi"
> +#include "imx6qdl-nitrogen6x.dtsi"
> +
> +/ {
> + model = "Freescale i.MX6 Quad Nitrogen6x Board";
> + compatible = "fsl,imx6q-nitrogen6x", "fsl,imx6q";
> +
Ditto
I fixed them up and applied the whole series expect patch #8, which I
have a comment on.
Shawn
> +};
> +
> +&sata {
> + status = "okay";
> +};
> diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
> similarity index 95%
> copy from arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> copy to arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
> index b2711ae..65c9a9b 100644
> --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
> @@ -1,4 +1,5 @@
> /*
> + * Copyright 2013 Boundary Devices, Inc.
> * Copyright 2011 Freescale Semiconductor, Inc.
> * Copyright 2011 Linaro Ltd.
> *
> @@ -92,9 +93,9 @@
> };
>
> sound {
> - compatible = "fsl,imx6q-sabrelite-sgtl5000",
> + compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
> "fsl,imx-audio-sgtl5000";
> - model = "imx6q-sabrelite-sgtl5000";
> + model = "imx6q-nitrogen6x-sgtl5000";
> ssi-controller = <&ssi1>;
> audio-codec = <&codec>;
> audio-routing =
> @@ -102,7 +103,7 @@
> "Mic Jack", "Mic Bias",
> "Headphone Jack", "HP_OUT";
> mux-int-port = <1>;
> - mux-ext-port = <4>;
> + mux-ext-port = <3>;
> };
>
> backlight_lcd {
> @@ -148,7 +149,7 @@
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_enet>;
> phy-mode = "rgmii";
> - phy-reset-gpios = <&gpio3 23 0>;
> + phy-reset-gpios = <&gpio1 27 0>;
> txen-skew-ps = <0>;
> txc-skew-ps = <3000>;
> rxdv-skew-ps = <0>;
> @@ -183,7 +184,7 @@
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_hog>;
>
> - imx6q-sabrelite {
> + imx6q-nitrogen6x {
> pinctrl_hog: hoggrp {
> fsl,pins = <
> /* SGTL5000 sys_mclk */
> @@ -204,7 +205,7 @@
> };
>
> pinctrl_audmux: audmuxgrp {
> - fsl,pins = <MX6QDL_AUDMUX_PINGRP1>;
> + fsl,pins = <MX6QDL_AUDMUX_PINGRP2>;
> };
>
> pinctrl_ecspi1: ecspi1grp {
> @@ -232,7 +233,7 @@
> MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> /* Phy reset */
> - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
> + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
> >;
> };
>
> @@ -279,7 +280,6 @@
> fsl,pins = <
> MX6QDL_USDHC3_PINGRP_D4
> MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
> - MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
> >;
> };
>
> @@ -372,7 +372,6 @@
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usdhc3>;
> cd-gpios = <&gpio7 0 0>;
> - wp-gpios = <&gpio7 1 0>;
> vmmc-supply = <®_3p3v>;
> status = "okay";
> };
> --
> 1.8.1.2
>
^ permalink raw reply [flat|nested] 17+ messages in thread