* [PATCH 1/5] pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6
2014-01-03 2:59 [PATCH 0/5] *** pinctrl: sirf: a bundle of fixes for pin groups *** Barry Song
@ 2014-01-03 2:59 ` Barry Song
2014-01-08 9:49 ` Linus Walleij
2014-01-03 2:59 ` [PATCH 2/5] ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin " Barry Song
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Barry Song @ 2014-01-03 2:59 UTC (permalink / raw)
To: linux-arm-kernel
From: Qipan Li <Qipan.Li@csr.com>
commit af614b2301f0e304 adds lost USP-based UART pin groups for prima2,
but missed usp1_uart_nostreamctrl group for atlas6, this patch fixes it.
this makes USP(Universal Serial Ports) port1 can work as uart without
stream ctrl.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
drivers/pinctrl/sirf/pinctrl-atlas6.c | 24 ++++++++++++++++++++++++
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/drivers/pinctrl/sirf/pinctrl-atlas6.c b/drivers/pinctrl/sirf/pinctrl-atlas6.c
index 8ab7898..2b9f320 100644
--- a/drivers/pinctrl/sirf/pinctrl-atlas6.c
+++ b/drivers/pinctrl/sirf/pinctrl-atlas6.c
@@ -562,6 +562,23 @@ static const struct sirfsoc_padmux usp1_padmux = {
static const unsigned usp1_pins[] = { 15, 43, 44, 45, 46 };
+static const struct sirfsoc_muxmask usp1_uart_nostreamctrl_muxmask[] = {
+ {
+ .group = 1,
+ .mask = BIT(12) | BIT(13),
+ },
+};
+
+static const struct sirfsoc_padmux usp1_uart_nostreamctrl_padmux = {
+ .muxmask_counts = ARRAY_SIZE(usp1_uart_nostreamctrl_muxmask),
+ .muxmask = usp1_uart_nostreamctrl_muxmask,
+ .ctrlreg = SIRFSOC_RSC_PIN_MUX,
+ .funcmask = BIT(16),
+ .funcval = BIT(16),
+};
+
+static const unsigned usp1_uart_nostreamctrl_pins[] = { 44, 45 };
+
static const struct sirfsoc_muxmask nand_muxmask[] = {
{
.group = 2,
@@ -889,6 +906,8 @@ static const struct sirfsoc_pin_group sirfsoc_pin_groups[] = {
SIRFSOC_PIN_GROUP("usp0_uart_nostreamctrl_grp",
usp0_uart_nostreamctrl_pins),
SIRFSOC_PIN_GROUP("usp1grp", usp1_pins),
+ SIRFSOC_PIN_GROUP("usp1_uart_nostreamctrl_grp",
+ usp1_uart_nostreamctrl_pins),
SIRFSOC_PIN_GROUP("i2c0grp", i2c0_pins),
SIRFSOC_PIN_GROUP("i2c1grp", i2c1_pins),
SIRFSOC_PIN_GROUP("pwm0grp", pwm0_pins),
@@ -935,6 +954,8 @@ static const char * const usp0_uart_nostreamctrl_grp[] = {
"usp0_uart_nostreamctrl_grp" };
static const char * const usp0grp[] = { "usp0grp" };
static const char * const usp1grp[] = { "usp1grp" };
+static const char * const usp1_uart_nostreamctrl_grp[] = {
+ "usp1_uart_nostreamctrl_grp" };
static const char * const i2c0grp[] = { "i2c0grp" };
static const char * const i2c1grp[] = { "i2c1grp" };
static const char * const pwm0grp[] = { "pwm0grp" };
@@ -983,6 +1004,9 @@ static const struct sirfsoc_pmx_func sirfsoc_pmx_functions[] = {
usp0_uart_nostreamctrl_grp,
usp0_uart_nostreamctrl_padmux),
SIRFSOC_PMX_FUNCTION("usp1", usp1grp, usp1_padmux),
+ SIRFSOC_PMX_FUNCTION("usp1_uart_nostreamctrl",
+ usp1_uart_nostreamctrl_grp,
+ usp1_uart_nostreamctrl_padmux),
SIRFSOC_PMX_FUNCTION("i2c0", i2c0grp, i2c0_padmux),
SIRFSOC_PMX_FUNCTION("i2c1", i2c1grp, i2c1_padmux),
SIRFSOC_PMX_FUNCTION("pwm0", pwm0grp, pwm0_padmux),
--
1.7.5.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/5] ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
2014-01-03 2:59 [PATCH 0/5] *** pinctrl: sirf: a bundle of fixes for pin groups *** Barry Song
2014-01-03 2:59 ` [PATCH 1/5] pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6 Barry Song
@ 2014-01-03 2:59 ` Barry Song
2014-01-08 9:49 ` Linus Walleij
2014-01-03 2:59 ` [PATCH 3/5] pinctrl: sirf: fix the pins of sdmmc5 connected with TriG Barry Song
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Barry Song @ 2014-01-03 2:59 UTC (permalink / raw)
To: linux-arm-kernel
From: Qipan Li <Qipan.Li@csr.com>
this patch adds lost usp1_uart_nostreamctrl pin group for atlas6, which
matches with the change in drivers/pinctrl/sirf/pinctrl-atlas6.c.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
arch/arm/boot/dts/atlas6.dtsi | 6 ++++++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 978bab4..f289bf1 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -546,6 +546,12 @@
sirf,function = "usp1";
};
};
+ usp1_uart_nostreamctrl_pins_a: usp1 at 1 {
+ usp1 {
+ sirf,pins = "usp1_uart_nostreamctrl_grp";
+ sirf,function = "usp1_uart_nostreamctrl";
+ };
+ };
usb0_upli_drvbus_pins_a: usb0_upli_drvbus at 0 {
usb0_upli_drvbus {
sirf,pins = "usb0_upli_drvbusgrp";
--
1.7.5.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/5] ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
2014-01-03 2:59 ` [PATCH 2/5] ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin " Barry Song
@ 2014-01-08 9:49 ` Linus Walleij
2014-01-09 5:17 ` Barry Song
0 siblings, 1 reply; 12+ messages in thread
From: Linus Walleij @ 2014-01-08 9:49 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jan 3, 2014 at 3:59 AM, Barry Song <21cnbao@gmail.com> wrote:
> From: Qipan Li <Qipan.Li@csr.com>
>
> this patch adds lost usp1_uart_nostreamctrl pin group for atlas6, which
> matches with the change in drivers/pinctrl/sirf/pinctrl-atlas6.c.
>
> Signed-off-by: Qipan Li <Qipan.Li@csr.com>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>
Please funnel this patch through ARM SoC or similar sirf tree.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/5] ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
2014-01-08 9:49 ` Linus Walleij
@ 2014-01-09 5:17 ` Barry Song
0 siblings, 0 replies; 12+ messages in thread
From: Barry Song @ 2014-01-09 5:17 UTC (permalink / raw)
To: linux-arm-kernel
2014/1/8 Linus Walleij <linus.walleij@linaro.org>:
> On Fri, Jan 3, 2014 at 3:59 AM, Barry Song <21cnbao@gmail.com> wrote:
>
>> From: Qipan Li <Qipan.Li@csr.com>
>>
>> this patch adds lost usp1_uart_nostreamctrl pin group for atlas6, which
>> matches with the change in drivers/pinctrl/sirf/pinctrl-atlas6.c.
>>
>> Signed-off-by: Qipan Li <Qipan.Li@csr.com>
>> Signed-off-by: Barry Song <Baohua.Song@csr.com>
>
> Please funnel this patch through ARM SoC or similar sirf tree.
ok. i'll send a pull request including these two pinmux dts changes
and several other dts changes for 3.14.
>
> Yours,
> Linus Walleij
-barry
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/5] pinctrl: sirf: fix the pins of sdmmc5 connected with TriG
2014-01-03 2:59 [PATCH 0/5] *** pinctrl: sirf: a bundle of fixes for pin groups *** Barry Song
2014-01-03 2:59 ` [PATCH 1/5] pinctrl: sirf: add lost usp1_uart_nostreamctrl group for atlas6 Barry Song
2014-01-03 2:59 ` [PATCH 2/5] ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin " Barry Song
@ 2014-01-03 2:59 ` Barry Song
2014-01-08 9:50 ` Linus Walleij
2014-01-03 2:59 ` [PATCH 4/5] pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync Barry Song
2014-01-03 2:59 ` [PATCH 5/5] ARM: dts: SiRF: " Barry Song
4 siblings, 1 reply; 12+ messages in thread
From: Barry Song @ 2014-01-03 2:59 UTC (permalink / raw)
To: linux-arm-kernel
From: Bin Shi <Bin.Shi@csr.com>
sdmmc5 has only 3 pins CMD, CLK, DATA which are connected with CSR
TriG RF multi-GNSS. The hardware connection is like:
DATA -- GPS_SGN
CLK -- GPS_RF_CLK
CMD -- GPS_MAG
here we drop redundant pins in sdmmc5 group.
Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
drivers/pinctrl/sirf/pinctrl-prima2.c | 8 +-------
1 files changed, 1 insertions(+), 7 deletions(-)
diff --git a/drivers/pinctrl/sirf/pinctrl-prima2.c b/drivers/pinctrl/sirf/pinctrl-prima2.c
index 050777b..9704641 100644
--- a/drivers/pinctrl/sirf/pinctrl-prima2.c
+++ b/drivers/pinctrl/sirf/pinctrl-prima2.c
@@ -467,12 +467,6 @@ static const struct sirfsoc_muxmask sdmmc5_muxmask[] = {
{
.group = 0,
.mask = BIT(24) | BIT(25) | BIT(26),
- }, {
- .group = 1,
- .mask = BIT(29),
- }, {
- .group = 2,
- .mask = BIT(0) | BIT(1),
},
};
@@ -484,7 +478,7 @@ static const struct sirfsoc_padmux sdmmc5_padmux = {
.funcval = BIT(13) | BIT(14),
};
-static const unsigned sdmmc5_pins[] = { 24, 25, 26, 61, 64, 65 };
+static const unsigned sdmmc5_pins[] = { 24, 25, 26 };
static const struct sirfsoc_muxmask usp0_muxmask[] = {
{
--
1.7.5.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 4/5] pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync
2014-01-03 2:59 [PATCH 0/5] *** pinctrl: sirf: a bundle of fixes for pin groups *** Barry Song
` (2 preceding siblings ...)
2014-01-03 2:59 ` [PATCH 3/5] pinctrl: sirf: fix the pins of sdmmc5 connected with TriG Barry Song
@ 2014-01-03 2:59 ` Barry Song
2014-01-08 9:51 ` Linus Walleij
2014-01-03 2:59 ` [PATCH 5/5] ARM: dts: SiRF: " Barry Song
4 siblings, 1 reply; 12+ messages in thread
From: Barry Song @ 2014-01-03 2:59 UTC (permalink / raw)
To: linux-arm-kernel
From: Rongjun Ying <Rongjun.Ying@csr.com>
USP0 has multiple functions, and has RX and TX frame sync signals,
for some scenarios like audio PCM, we don't need both of them.
so here we add two possibilities for USP0 only holding one of TX
and RX frame sync.
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Barry.Song@csr.com>
---
drivers/pinctrl/sirf/pinctrl-prima2.c | 40 +++++++++++++++++++++++++++++++++
1 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/drivers/pinctrl/sirf/pinctrl-prima2.c b/drivers/pinctrl/sirf/pinctrl-prima2.c
index 9704641..37b4265 100644
--- a/drivers/pinctrl/sirf/pinctrl-prima2.c
+++ b/drivers/pinctrl/sirf/pinctrl-prima2.c
@@ -497,6 +497,40 @@ static const struct sirfsoc_padmux usp0_padmux = {
static const unsigned usp0_pins[] = { 51, 52, 53, 54, 55 };
+static const struct sirfsoc_muxmask usp0_only_utfs_muxmask[] = {
+ {
+ .group = 1,
+ .mask = BIT(19) | BIT(20) | BIT(21) | BIT(22),
+ },
+};
+
+static const struct sirfsoc_padmux usp0_only_utfs_padmux = {
+ .muxmask_counts = ARRAY_SIZE(usp0_only_utfs_muxmask),
+ .muxmask = usp0_only_utfs_muxmask,
+ .ctrlreg = SIRFSOC_RSC_PIN_MUX,
+ .funcmask = BIT(1) | BIT(2) | BIT(6),
+ .funcval = 0,
+};
+
+static const unsigned usp0_only_utfs_pins[] = { 51, 52, 53, 54 };
+
+static const struct sirfsoc_muxmask usp0_only_urfs_muxmask[] = {
+ {
+ .group = 1,
+ .mask = BIT(19) | BIT(20) | BIT(21) | BIT(23),
+ },
+};
+
+static const struct sirfsoc_padmux usp0_only_urfs_padmux = {
+ .muxmask_counts = ARRAY_SIZE(usp0_only_urfs_muxmask),
+ .muxmask = usp0_only_urfs_muxmask,
+ .ctrlreg = SIRFSOC_RSC_PIN_MUX,
+ .funcmask = BIT(1) | BIT(2) | BIT(9),
+ .funcval = 0,
+};
+
+static const unsigned usp0_only_urfs_pins[] = { 51, 52, 53, 55 };
+
static const struct sirfsoc_muxmask usp0_uart_nostreamctrl_muxmask[] = {
{
.group = 1,
@@ -853,6 +887,8 @@ static const struct sirfsoc_pin_group sirfsoc_pin_groups[] = {
SIRFSOC_PIN_GROUP("usp0grp", usp0_pins),
SIRFSOC_PIN_GROUP("usp0_uart_nostreamctrl_grp",
usp0_uart_nostreamctrl_pins),
+ SIRFSOC_PIN_GROUP("usp0_only_utfs_grp", usp0_only_utfs_pins),
+ SIRFSOC_PIN_GROUP("usp0_only_urfs_grp", usp0_only_urfs_pins),
SIRFSOC_PIN_GROUP("usp1grp", usp1_pins),
SIRFSOC_PIN_GROUP("usp1_uart_nostreamctrl_grp",
usp1_uart_nostreamctrl_pins),
@@ -901,6 +937,8 @@ static const char * const uart2_nostreamctrlgrp[] = { "uart2_nostreamctrlgrp" };
static const char * const usp0grp[] = { "usp0grp" };
static const char * const usp0_uart_nostreamctrl_grp[] =
{ "usp0_uart_nostreamctrl_grp" };
+static const char * const usp0_only_utfs_grp[] = { "usp0_only_utfs_grp" };
+static const char * const usp0_only_urfs_grp[] = { "usp0_only_urfs_grp" };
static const char * const usp1grp[] = { "usp1grp" };
static const char * const usp1_uart_nostreamctrl_grp[] =
{ "usp1_uart_nostreamctrl_grp" };
@@ -949,6 +987,8 @@ static const struct sirfsoc_pmx_func sirfsoc_pmx_functions[] = {
SIRFSOC_PMX_FUNCTION("usp0", usp0grp, usp0_padmux),
SIRFSOC_PMX_FUNCTION("usp0_uart_nostreamctrl",
usp0_uart_nostreamctrl_grp, usp0_uart_nostreamctrl_padmux),
+ SIRFSOC_PMX_FUNCTION("usp0_only_utfs", usp0_only_utfs_grp, usp0_only_utfs_padmux),
+ SIRFSOC_PMX_FUNCTION("usp0_only_urfs", usp0_only_urfs_grp, usp0_only_urfs_padmux),
SIRFSOC_PMX_FUNCTION("usp1", usp1grp, usp1_padmux),
SIRFSOC_PMX_FUNCTION("usp1_uart_nostreamctrl",
usp1_uart_nostreamctrl_grp, usp1_uart_nostreamctrl_padmux),
--
1.7.5.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 5/5] ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
2014-01-03 2:59 [PATCH 0/5] *** pinctrl: sirf: a bundle of fixes for pin groups *** Barry Song
` (3 preceding siblings ...)
2014-01-03 2:59 ` [PATCH 4/5] pinctrl: sirf: add pin group for USP0 with only RX or TX frame sync Barry Song
@ 2014-01-03 2:59 ` Barry Song
2014-01-08 9:52 ` Linus Walleij
4 siblings, 1 reply; 12+ messages in thread
From: Barry Song @ 2014-01-03 2:59 UTC (permalink / raw)
To: linux-arm-kernel
From: Rongjun Ying <Rongjun.Ying@csr.com>
add pin groups for USP0 only holding one of TX and RX frame sync. this
patch matches with the change in drivers/pinctrl/sirf.
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Barry.Song@csr.com>
---
arch/arm/boot/dts/prima2.dtsi | 12 ++++++++++++
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index daee5894..e0b8cd6 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -540,6 +540,18 @@
"usp0_uart_nostreamctrl";
};
};
+ usp0_only_utfs_pins_a: usp0 at 2 {
+ usp0 {
+ sirf,pins = "usp0_only_utfs_grp";
+ sirf,function = "usp0_only_utfs";
+ };
+ };
+ usp0_only_urfs_pins_a: usp0 at 3 {
+ usp0 {
+ sirf,pins = "usp0_only_urfs_grp";
+ sirf,function = "usp0_only_urfs";
+ };
+ };
usp1_pins_a: usp1 at 0 {
usp1 {
sirf,pins = "usp1grp";
--
1.7.5.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 5/5] ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
2014-01-03 2:59 ` [PATCH 5/5] ARM: dts: SiRF: " Barry Song
@ 2014-01-08 9:52 ` Linus Walleij
0 siblings, 0 replies; 12+ messages in thread
From: Linus Walleij @ 2014-01-08 9:52 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jan 3, 2014 at 3:59 AM, Barry Song <21cnbao@gmail.com> wrote:
> From: Rongjun Ying <Rongjun.Ying@csr.com>
>
> add pin groups for USP0 only holding one of TX and RX frame sync. this
> patch matches with the change in drivers/pinctrl/sirf.
>
> Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
> Signed-off-by: Barry Song <Barry.Song@csr.com>
Please carry this patch through ARM SoC or similar Sirf tree.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 12+ messages in thread