From: b32955@freescale.com (Huang Shijie)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] mtd: gpmi: add subpage read support
Date: Fri, 3 Jan 2014 11:01:42 +0800 [thread overview]
Message-ID: <1388718102-26097-4-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <a>
1) Why add the subpage read support?
The page size of the nand chip becomes larger and larger, the imx6 has to
supports the 16K page or even bigger page. But sometimes, the upper layer only
needs a small part of the page, such as 512 bytes or less.
For example, ubiattach may only read 64 bytes per page.
2) We only enable the subpage read support when it meets the conditions:
<1> the chip is imx6 (or later chips) which can supports large nand page.
<2> the size of ECC parity is byte aligned.
If the size of ECC parity is not byte aligned, the calling of NAND_CMD_RNDOUT
will fail.
3) What does this patch do?
This patch will fake a virtual small page for the subpage read, and call the
gpmi_ecc_read_page() to do the real work.
In order to fake a virtual small page, the patch changes the BCH registers and
the bch_geometry{}. After the subpage read finished, we will restore them back.
4) Performace:
4.1) Tested with Toshiba TC58NVG2S0F(4096 + 224) with the following command:
#ubiattach /dev/ubi_ctrl -m 4
The detail information of /dev/mtd4 shows below:
--------------------------------------------------------------
#mtdinfo /dev/mtd4
mtd4
Name: test
Type: nand
Eraseblock size: 262144 bytes, 256.0 KiB
Amount of eraseblocks: 1856 (486539264 bytes, 464.0 MiB)
Minimum input/output unit size: 4096 bytes
Sub-page size: 4096 bytes
OOB size: 224 bytes
Character device major/minor: 90:8
Bad blocks are allowed: true
Device is writable: true
--------------------------------------------------------------
4.2) Before this patch:
--------------------------------------------------------------
[ 94.530495] UBI: attaching mtd4 to ubi0
[ 98.928850] UBI: scanning is finished
[ 98.953594] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0
[ 98.958562] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes
[ 98.964076] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096
[ 98.969518] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192
[ 98.975128] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0
[ 98.979843] UBI: user volume: 1, internal volumes: 1, max. volumes count: 128
[ 98.985878] UBI: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 2024916145
[ 98.993635] UBI: available PEBs: 0, total reserved PEBs: 1856, PEBs reserved for bad PEB handling: 40
[ 99.001807] UBI: background thread "ubi_bgt0d" started, PID 831
--------------------------------------------------------------
The attach time is about 98.9 - 94.5 = 4.4s
4.3) After this patch:
--------------------------------------------------------------
[ 286.464906] UBI: attaching mtd4 to ubi0
[ 289.186129] UBI: scanning is finished
[ 289.211416] UBI: attached mtd4 (name "test", size 464 MiB) to ubi0
[ 289.216360] UBI: PEB size: 262144 bytes (256 KiB), LEB size: 253952 bytes
[ 289.221858] UBI: min./max. I/O unit sizes: 4096/4096, sub-page size 4096
[ 289.227293] UBI: VID header offset: 4096 (aligned 4096), data offset: 8192
[ 289.232878] UBI: good PEBs: 1856, bad PEBs: 0, corrupted PEBs: 0
[ 289.237628] UBI: user volume: 0, internal volumes: 1, max. volumes count: 128
[ 289.243553] UBI: max/mean erase counter: 1/1, WL threshold: 4096, image sequence number: 2024916145
[ 289.251348] UBI: available PEBs: 1812, total reserved PEBs: 44, PEBs reserved for bad PEB handling: 40
[ 289.259417] UBI: background thread "ubi_bgt0d" started, PID 847
--------------------------------------------------------------
The attach time is about 289.18 - 286.46 = 2.7s
4.4) The conclusion:
We achieve (4.4 - 2.7) / 4.4 = 38.6% faster in the ubiattach.
Signed-off-by: Huang Shijie <b32955@freescale.com>
---
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 96 ++++++++++++++++++++++++++++++++
1 files changed, 96 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index c92df74..2ab7a9f 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -27,6 +27,7 @@
#include <linux/of_device.h>
#include <linux/of_mtd.h>
#include "gpmi-nand.h"
+#include "bch-regs.h"
/* Resource names for the GPMI NAND driver. */
#define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
@@ -1087,6 +1088,90 @@ static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
return max_bitflips;
}
+/* Fake a virtual small page for the subpage read */
+static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
+ uint32_t offs, uint32_t len, uint8_t *buf, int page)
+{
+ struct gpmi_nand_data *this = chip->priv;
+ void __iomem *bch_regs = this->resources.bch_regs;
+ struct bch_geometry old_geo = this->bch_geometry;
+ struct bch_geometry *geo = &this->bch_geometry;
+ int size = chip->ecc.size; /* ECC chunk size */
+ int meta, n, page_size;
+ u32 r1_old, r2_old, r1_new, r2_new;
+ unsigned int max_bitflips;
+ int first, last, marker_pos;
+ int ecc_parity_size;
+ int col = 0;
+
+ /* The size of ECC parity */
+ ecc_parity_size = geo->gf_len * geo->ecc_strength / 8;
+
+ /* Align it with the chunk size */
+ first = offs / size;
+ last = (offs + len - 1) / size;
+
+ /*
+ * Find the chunk which contains the Block Marker. If this chunk is
+ * in the range of [first, last], we have to read out the whole page.
+ * Why? since we had swapped the data at the position of Block Marker
+ * to the metadata which is bound with the chunk 0.
+ */
+ marker_pos = geo->block_mark_byte_offset / size;
+ if (last >= marker_pos && first <= marker_pos) {
+ dev_dbg(this->dev, "page:%d, first:%d, last:%d, marker at:%d\n",
+ page, first, last, marker_pos);
+ return gpmi_ecc_read_page(mtd, chip, buf, 0, page);
+ }
+
+ meta = geo->metadata_size;
+ if (first) {
+ col = meta + (size + ecc_parity_size) * first;
+ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, col, -1);
+
+ meta = 0;
+ buf = buf + first * size;
+ }
+
+ /* Save the old environment */
+ r1_old = r1_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT0);
+ r2_old = r2_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT1);
+
+ /* change the BCH registers and bch_geometry{} */
+ n = last - first + 1;
+ page_size = meta + (size + ecc_parity_size) * n;
+
+ r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS |
+ BM_BCH_FLASH0LAYOUT0_META_SIZE);
+ r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1)
+ | BF_BCH_FLASH0LAYOUT0_META_SIZE(meta);
+ writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0);
+
+ r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE;
+ r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size);
+ writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1);
+
+ geo->ecc_chunk_count = n;
+ geo->payload_size = n * size;
+ geo->page_size = page_size;
+ geo->auxiliary_status_offset = ALIGN(meta, 4);
+
+ dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n",
+ page, offs, len, col, first, n, page_size);
+
+ /* Read the subpage now */
+ this->swap_block_mark = false;
+ max_bitflips = gpmi_ecc_read_page(mtd, chip, buf, 0, page);
+
+ /* Restore */
+ writel(r1_old, bch_regs + HW_BCH_FLASH0LAYOUT0);
+ writel(r2_old, bch_regs + HW_BCH_FLASH0LAYOUT1);
+ this->bch_geometry = old_geo;
+ this->swap_block_mark = true;
+
+ return max_bitflips;
+}
+
static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, int oob_required)
{
@@ -1604,6 +1689,17 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
ecc->layout = &gpmi_hw_ecclayout;
/*
+ * We only enable the subpage read when:
+ * (1) the chip is imx6, and
+ * (2) the size of the ECC parity is byte aligned.
+ */
+ if (GPMI_IS_MX6Q(this) &&
+ ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) {
+ ecc->read_subpage = gpmi_ecc_read_subpage;
+ chip->options |= NAND_SUBPAGE_READ;
+ }
+
+ /*
* Can we enable the extra features? such as EDO or Sync mode.
*
* We do not check the return value now. That's means if we fail in
--
1.7.2.rc3
next prev parent reply other threads:[~2014-01-03 3:01 UTC|newest]
Thread overview: 97+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <a>
2011-11-22 15:54 ` [PATCH v7 0/3] ARM: mxs: add recording support for saif Dong Aisheng
2011-11-24 7:36 ` Shawn Guo
2011-11-24 7:46 ` Shawn Guo
2011-11-24 7:41 ` Uwe Kleine-König
2011-11-24 7:49 ` Wolfram Sang
2011-11-24 8:23 ` Shawn Guo
2011-11-24 10:46 ` Wolfram Sang
2011-11-22 15:54 ` [PATCH v7 1/3] ARM: mxs: add saif clkmux functions Dong Aisheng
2011-11-22 15:54 ` [PATCH v7 2/3] ARM: mx28evk: add platform data for saif Dong Aisheng
2011-11-22 15:54 ` [PATCH v7 3/3] ARM: mx28evk: set a initial clock rate " Dong Aisheng
2012-03-13 12:33 ` [PATCH 1/5 v4] i2c/gpio: add DT support Jean-Christophe PLAGNIOL-VILLARD
2012-03-13 14:08 ` Wolfram Sang
2012-03-13 16:47 ` Jean-Christophe PLAGNIOL-VILLARD
2012-03-13 19:46 ` Wolfram Sang
2012-03-15 15:56 ` [PATCH 1/5 v5] " Jean-Christophe PLAGNIOL-VILLARD
2012-03-13 12:33 ` [PATCH 2/5 v4] ARM: at91: sam9g20 add i2c " Jean-Christophe PLAGNIOL-VILLARD
2012-03-13 12:33 ` [PATCH 3/5 v4] ARM: at91: usb_a9g20 add DT i2c support Jean-Christophe PLAGNIOL-VILLARD
2012-03-13 12:33 ` [PATCH 4/5 v4] ARM: at91: sam9g45 add i2c DT support Jean-Christophe PLAGNIOL-VILLARD
2012-03-13 12:33 ` [PATCH 5/5 v4] ARM: at91: sam9x5 " Jean-Christophe PLAGNIOL-VILLARD
2013-08-13 13:31 ` [PATCH V2 00/35] CPUFreq: Implement light weight ->target(): for 3.13 Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 01/35] cpufreq: Implement light weight ->target_index() routine Viresh Kumar
2013-08-18 10:41 ` amit daniel kachhap
2013-08-19 4:37 ` Viresh Kumar
2013-08-19 6:16 ` amit daniel kachhap
2013-08-19 6:19 ` Viresh Kumar
2013-08-19 6:46 ` amit daniel kachhap
2013-08-19 6:49 ` Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 02/35] cpufreq: remove CONFIG_CPU_FREQ_TABLE Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 03/35] cpufreq: acpi: Covert to light weight ->target_index() routine Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 04/35] cpufreq: arm_big_little: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 05/35] cpufreq: at32ap: " Viresh Kumar
2013-08-14 8:00 ` Hans-Christian Egtvedt
2013-08-13 13:32 ` [PATCH V2 06/35] cpufreq: blackfin: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 07/35] cpufreq: cpu0: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 08/35] cpufreq: cris: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 09/35] cpufreq: davinci: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 10/35] cpufreq: dbx500: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 11/35] cpufreq: e_powersaver: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 12/35] cpufreq: elanfreq: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 13/35] cpufreq: exynos: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 14/35] cpufreq: ia64: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 15/35] cpufreq: imx6q: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 16/35] cpufreq: kirkwood: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 17/35] cpufreq: longhaul: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 18/35] cpufreq: loongson2: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 19/35] cpufreq: maple: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 20/35] cpufreq: omap: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 21/35] cpufreq: p4: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 22/35] cpufreq: pasemi: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 23/35] cpufreq: pmac32: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 24/35] cpufreq: powernow: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 25/35] cpufreq: ppc: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 26/35] cpufreq: pxa: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 27/35] cpufreq: s3c2416: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 28/35] cpufreq: s3c64xx: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 29/35] cpufreq: s5pv210: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 30/35] cpufreq: sa11x0: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 31/35] cpufreq: sc520: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 32/35] cpufreq: sparc: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 33/35] cpufreq: SPEAr: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 34/35] cpufreq: speedstep: " Viresh Kumar
2013-08-13 13:32 ` [PATCH V2 35/35] cpufreq: tegra: " Viresh Kumar
2013-08-13 13:46 ` [PATCH V2 00/35] CPUFreq: Implement light weight ->target(): for 3.13 Viresh Kumar
2013-08-14 5:29 ` Viresh Kumar
2014-01-03 3:01 ` [PATCH 0/3] mtd: gpmi: add subpage read support Huang Shijie
2014-02-21 6:51 ` Huang Shijie
2014-03-07 7:27 ` Brian Norris
2014-03-07 7:32 ` Huang Shijie
2014-03-07 7:34 ` Brian Norris
2014-01-03 3:01 ` [PATCH 1/3] mtd: nand: add "page" argument for read_subpage hook Huang Shijie
2014-01-03 3:01 ` [PATCH 2/3] mtd: gpmi: do not use the mtd->writesize Huang Shijie
2014-01-03 3:01 ` Huang Shijie [this message]
2014-04-23 10:16 ` [PATCH v1 0/7] mtd: spi-nor: Add the DDR quad read support Huang Shijie
2014-04-23 10:16 ` [PATCH v1 1/7] mtd: spi-nor: fix the wrong dummy value Huang Shijie
2014-04-23 19:41 ` Marek Vasut
2014-04-24 4:50 ` Huang Shijie
2014-04-24 13:45 ` Marek Vasut
2014-04-23 10:16 ` [PATCH v1 2/7] mtd: spi-nor: add DDR quad read support Huang Shijie
2014-04-23 19:45 ` Marek Vasut
2014-04-24 4:53 ` Huang Shijie
2014-04-24 13:43 ` Marek Vasut
2014-04-24 14:26 ` Huang Shijie
2014-04-23 10:16 ` [PATCH v1 3/7] Documentation: mtd: add a new document for SPI NOR flash Huang Shijie
2014-04-23 10:16 ` [PATCH v1 4/7] Documentation: fsl-quadspi: update the document Huang Shijie
2014-04-23 10:16 ` [PATCH v1 5/7] mtd: fsl-quadspi: get the dummy cycles for DDR Quad read from the DT property Huang Shijie
2014-04-23 19:48 ` Marek Vasut
2014-04-24 4:58 ` Huang Shijie
2014-04-24 13:41 ` Marek Vasut
2014-04-24 14:27 ` Huang Shijie
2014-04-23 10:16 ` [PATCH v1 6/7] mtd: fsl-quadspi: use the information stored in spi-nor{} Huang Shijie
2014-04-23 10:16 ` [PATCH v1 7/7] mtd: fsl-quadspi: add the DDR quad read support Huang Shijie
2024-12-01 23:46 ` [PATCH] arm64: dts: rockchip: enable rng on all rk356x Peter Robinson
2024-12-02 3:55 ` Dragan Simic
2024-12-02 10:40 ` Marcin Juszkiewicz
2024-12-02 12:01 ` Diederik de Haas
2024-12-02 14:50 ` Dragan Simic
2024-12-02 15:32 ` Heiko Stübner
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