From: lee.jones@linaro.org (Lee Jones)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 08/35] mtd: st_spi_fsm: Provide device look-up table
Date: Tue, 18 Feb 2014 14:55:35 +0000 [thread overview]
Message-ID: <1392735362-1245-9-git-send-email-lee.jones@linaro.org> (raw)
In-Reply-To: <1392735362-1245-1-git-send-email-lee.jones@linaro.org>
Supply a lookup table of all the devices we intend to support. This table
is used to store device information such as; a human readable device name,
their JEDEC ID (plus the extended version), sector size and amount, a bit
store of a device's capabilities, its maximum running frequency and
possible use of a per-device configuration call-back.
Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
drivers/mtd/devices/st_spi_fsm.c | 136 +++++++++++++++++++++++++++++++++++++++
1 file changed, 136 insertions(+)
diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c
index 2bfea2d..bc5ed352 100644
--- a/drivers/mtd/devices/st_spi_fsm.c
+++ b/drivers/mtd/devices/st_spi_fsm.c
@@ -221,6 +221,142 @@ struct stfsm_seq {
uint32_t seq_cfg;
} __packed __aligned(4);
+/* SPI Flash Device Table */
+struct flash_info {
+ char *name;
+ /*
+ * JEDEC id zero means "no ID" (most older chips); otherwise it has
+ * a high byte of zero plus three data bytes: the manufacturer id,
+ * then a two byte device id.
+ */
+ u32 jedec_id;
+ u16 ext_id;
+ /*
+ * The size listed here is what works with FLASH_CMD_SE, which isn't
+ * necessarily called a "sector" by the vendor.
+ */
+ unsigned sector_size;
+ u16 n_sectors;
+ u32 flags;
+ /*
+ * Note, where FAST_READ is supported, freq_max specifies the
+ * FAST_READ frequency, not the READ frequency.
+ */
+ u32 max_freq;
+ int (*config)(struct stfsm *);
+};
+
+static struct flash_info flash_types[] = {
+ /*
+ * ST Microelectronics/Numonyx --
+ * (newer production versions may have feature updates
+ * (eg faster operating frequency)
+ */
+#define M25P_FLAG (FLASH_FLAG_READ_WRITE | FLASH_FLAG_READ_FAST)
+ { "m25p40", 0x202013, 0, 64 * 1024, 8, M25P_FLAG, 25, NULL },
+ { "m25p80", 0x202014, 0, 64 * 1024, 16, M25P_FLAG, 25, NULL },
+ { "m25p16", 0x202015, 0, 64 * 1024, 32, M25P_FLAG, 25, NULL },
+ { "m25p32", 0x202016, 0, 64 * 1024, 64, M25P_FLAG, 50, NULL },
+ { "m25p64", 0x202017, 0, 64 * 1024, 128, M25P_FLAG, 50, NULL },
+ { "m25p128", 0x202018, 0, 256 * 1024, 64, M25P_FLAG, 50, NULL },
+
+#define M25PX_FLAG (FLASH_FLAG_READ_WRITE | \
+ FLASH_FLAG_READ_FAST | \
+ FLASH_FLAG_READ_1_1_2 | \
+ FLASH_FLAG_WRITE_1_1_2)
+ { "m25px32", 0x207116, 0, 64 * 1024, 64, M25PX_FLAG, 75, NULL },
+ { "m25px64", 0x207117, 0, 64 * 1024, 128, M25PX_FLAG, 75, NULL },
+
+#define MX25_FLAG (FLASH_FLAG_READ_WRITE | \
+ FLASH_FLAG_READ_FAST | \
+ FLASH_FLAG_READ_1_1_2 | \
+ FLASH_FLAG_READ_1_2_2 | \
+ FLASH_FLAG_READ_1_1_4 | \
+ FLASH_FLAG_READ_1_4_4 | \
+ FLASH_FLAG_SE_4K | \
+ FLASH_FLAG_SE_32K)
+ { "mx25l25635e", 0xc22019, 0, 64*1024, 512,
+ (MX25_FLAG | FLASH_FLAG_32BIT_ADDR | FLASH_FLAG_RESET), 70, NULL }
+
+#define N25Q_FLAG (FLASH_FLAG_READ_WRITE | \
+ FLASH_FLAG_READ_FAST | \
+ FLASH_FLAG_READ_1_1_2 | \
+ FLASH_FLAG_READ_1_2_2 | \
+ FLASH_FLAG_READ_1_1_4 | \
+ FLASH_FLAG_READ_1_4_4 | \
+ FLASH_FLAG_WRITE_1_1_2 | \
+ FLASH_FLAG_WRITE_1_2_2 | \
+ FLASH_FLAG_WRITE_1_1_4 | \
+ FLASH_FLAG_WRITE_1_4_4)
+ { "n25q128", 0x20ba18, 0, 64 * 1024, 256, N25Q_FLAG, 108, NULL },
+ { "n25q256", 0x20ba19, 0, 64 * 1024, 512,
+ N25Q_FLAG | FLASH_FLAG_32BIT_ADDR, 108, NULL },
+
+ /*
+ * Spansion S25FLxxxP
+ * - 256KiB and 64KiB sector variants (identified by ext. JEDEC)
+ */
+#define S25FLXXXP_FLAG (FLASH_FLAG_READ_WRITE | \
+ FLASH_FLAG_READ_1_1_2 | \
+ FLASH_FLAG_READ_1_2_2 | \
+ FLASH_FLAG_READ_1_1_4 | \
+ FLASH_FLAG_READ_1_4_4 | \
+ FLASH_FLAG_WRITE_1_1_4 | \
+ FLASH_FLAG_READ_FAST)
+ { "s25fl129p0", 0x012018, 0x4d00, 256 * 1024, 64, S25FLXXXP_FLAG, 80,
+ NULL },
+ { "s25fl129p1", 0x012018, 0x4d01, 64 * 1024, 256, S25FLXXXP_FLAG, 80,
+ NULL },
+
+ /*
+ * Spansion S25FLxxxS
+ * - 256KiB and 64KiB sector variants (identified by ext. JEDEC)
+ * - RESET# signal supported by die but not bristled out on all
+ * package types. The package type is a function of board design,
+ * so this information is captured in the board's flags.
+ * - Supports 'DYB' sector protection. Depending on variant, sectors
+ * may default to locked state on power-on.
+ */
+#define S25FLXXXS_FLAG (S25FLXXXP_FLAG | \
+ FLASH_FLAG_RESET | \
+ FLASH_FLAG_DYB_LOCKING)
+ { "s25fl128s0", 0x012018, 0x0300, 256 * 1024, 64, S25FLXXXS_FLAG, 80,
+ NULL },
+ { "s25fl128s1", 0x012018, 0x0301, 64 * 1024, 256, S25FLXXXS_FLAG, 80,
+ NULL },
+ { "s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128,
+ S25FLXXXS_FLAG | FLASH_FLAG_32BIT_ADDR, 80, NULL },
+ { "s25fl256s1", 0x010219, 0x4d01, 64 * 1024, 512,
+ S25FLXXXS_FLAG | FLASH_FLAG_32BIT_ADDR, 80, NULL },
+
+ /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
+#define W25X_FLAG (FLASH_FLAG_READ_WRITE | \
+ FLASH_FLAG_READ_FAST | \
+ FLASH_FLAG_READ_1_1_2 | \
+ FLASH_FLAG_WRITE_1_1_2)
+ { "w25x40", 0xef3013, 0, 64 * 1024, 8, W25X_FLAG, 75, NULL },
+ { "w25x80", 0xef3014, 0, 64 * 1024, 16, W25X_FLAG, 75, NULL },
+ { "w25x16", 0xef3015, 0, 64 * 1024, 32, W25X_FLAG, 75, NULL },
+ { "w25x32", 0xef3016, 0, 64 * 1024, 64, W25X_FLAG, 75, NULL },
+ { "w25x64", 0xef3017, 0, 64 * 1024, 128, W25X_FLAG, 75, NULL },
+
+ /* Winbond -- w25q "blocks" are 64K, "sectors" are 4KiB */
+#define W25Q_FLAG (FLASH_FLAG_READ_WRITE | \
+ FLASH_FLAG_READ_FAST | \
+ FLASH_FLAG_READ_1_1_2 | \
+ FLASH_FLAG_READ_1_2_2 | \
+ FLASH_FLAG_READ_1_1_4 | \
+ FLASH_FLAG_READ_1_4_4 | \
+ FLASH_FLAG_WRITE_1_1_4)
+ { "w25q80", 0xef4014, 0, 64 * 1024, 16, W25Q_FLAG, 80, NULL },
+ { "w25q16", 0xef4015, 0, 64 * 1024, 32, W25Q_FLAG, 80, NULL },
+ { "w25q32", 0xef4016, 0, 64 * 1024, 64, W25Q_FLAG, 80, NULL },
+ { "w25q64", 0xef4017, 0, 64 * 1024, 128, W25Q_FLAG, 80, NULL },
+
+ /* Sentinel */
+ { NULL, 0x000000, 0, 0, 0, 0, 0, NULL },
+};
+
static struct stfsm_seq stfsm_seq_read_jedec = {
.data_size = TRANSFER_SIZE(8),
.seq_opc[0] = (SEQ_OPC_PADS_1 |
--
1.8.3.2
next prev parent reply other threads:[~2014-02-18 14:55 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-18 14:55 [PATCH v5 00/35] mtd: st_spi_fsm: Add new driver Lee Jones
2014-02-18 14:55 ` [PATCH 01/35] mtd: st_spi_fsm: Allocate resources and register with MTD framework Lee Jones
2014-03-09 5:33 ` Brian Norris
2014-03-11 8:23 ` [PATCH v6 " Lee Jones
2014-03-20 7:10 ` Brian Norris
2014-02-18 14:55 ` [PATCH 02/35] mtd: st_spi_fsm: Supply all register address and bit logic defines Lee Jones
2014-02-18 14:55 ` [PATCH 03/35] mtd: st_spi_fsm: Initialise and configure the FSM for normal working conditions Lee Jones
2014-02-18 14:55 ` [PATCH 04/35] mtd: st_spi_fsm: Supply framework for device requests Lee Jones
2014-02-18 14:55 ` [PATCH 05/35] mtd: st_spi_fsm: Supply a method to read from the FSM's FIFO Lee Jones
2014-02-18 14:55 ` [PATCH 06/35] mtd: st_spi_fsm: Add support for JEDEC ID extraction Lee Jones
2014-02-18 14:55 ` [PATCH 07/35] mtd: devices: Provide header for shared OPCODEs and SFDP commands Lee Jones
2014-02-18 14:55 ` Lee Jones [this message]
2014-02-18 14:55 ` [PATCH 09/35] mtd: st_spi_fsm: Dynamically setup flash device based on JEDEC ID Lee Jones
2014-02-18 14:55 ` [PATCH 10/35] mtd: st_spi_fsm: Search for preferred FSM message sequence configurations Lee Jones
2014-02-18 14:55 ` [PATCH 11/35] mtd: st_spi_fsm: Use device size to determine address width Lee Jones
2014-03-20 7:30 ` Brian Norris
2014-02-18 14:55 ` [PATCH 12/35] mtd: st_spi_fsm: Prepare the read/write FSM message sequence(s) Lee Jones
2014-02-18 14:55 ` [PATCH 13/35] mtd: st_spi_fsm: Add device-tree binding documentation Lee Jones
2014-02-18 14:55 ` [PATCH 14/35] mtd: st_spi_fsm: Fetch boot-device from mode pins Lee Jones
2014-02-18 14:55 ` [PATCH 15/35] mtd: st_spi_fsm: Provide the erase one sector sequence Lee Jones
2014-02-18 14:55 ` [PATCH 16/35] mtd: st_spi_fsm: Provide the sequence for enabling 32bit addressing mode Lee Jones
2014-02-18 14:55 ` [PATCH 17/35] mtd: st_spi_fsm: Prepare read/write sequences according to configuration Lee Jones
2014-02-18 14:55 ` [PATCH 18/35] mtd: st_spi_fsm: Add a check to if the chip can handle an SoC reset Lee Jones
2014-02-18 14:55 ` [PATCH 19/35] mtd: st_spi_fsm: Provide a method to put the chip into 32bit addressing mode Lee Jones
2014-02-18 14:55 ` [PATCH 20/35] mtd: st_spi_fsm: Update the flash Volatile Configuration Register Lee Jones
2014-02-18 14:55 ` [PATCH 21/35] mtd: st_spi_fsm: Provide the default read/write configurations Lee Jones
2014-02-18 14:55 ` [PATCH 22/35] mtd: st_spi_fsm: Supply the N25Qxxx specific read configurations Lee Jones
2014-02-18 14:55 ` [PATCH 23/35] mtd: st_spi_fsm: Supply the N25Qxxx chip specific configuration call-back Lee Jones
2014-02-18 14:55 ` [PATCH 24/35] mtd: st_spi_fsm: Prepare default sequences for read/write/erase Lee Jones
2014-02-18 14:55 ` [PATCH 25/35] mtd: st_spi_fsm: Add the ability to read from a Serial Flash device Lee Jones
2014-03-20 7:55 ` Brian Norris
2014-02-18 14:55 ` [PATCH 26/35] mtd: st_spi_fsm: Write to Flash via the FSM FIFO Lee Jones
2014-02-18 14:55 ` [PATCH 27/35] mtd: st_spi_fsm: Supply a busy wait for post-write status Lee Jones
2014-03-20 7:27 ` Brian Norris
2014-02-18 14:55 ` [PATCH 28/35] mtd: st_spi_fsm: Erase partly or as a whole a Serial Flash device Lee Jones
2014-02-18 14:55 ` [PATCH 29/35] mtd: st_spi_fsm: Add the ability to read the FSM's status Lee Jones
2014-02-18 14:55 ` [PATCH 30/35] mtd: st_spi_fsm: Add the ability to write to FSM's status register Lee Jones
2014-02-18 14:55 ` [PATCH 31/35] mtd: st_spi_fsm: Supply the MX25xxx chip specific configuration call-back Lee Jones
2014-02-18 14:55 ` [PATCH 32/35] mtd: st_spi_fsm: Supply the S25FLxxx " Lee Jones
2014-02-18 14:56 ` [PATCH 33/35] mtd: st_spi_fsm: Supply the W25Qxxx " Lee Jones
2014-02-18 14:56 ` [PATCH 34/35] mtd: st_spi_fsm: Move runtime configurable msg sequences into device's struct Lee Jones
2014-02-18 14:56 ` [PATCH 35/35] ARM: STi: Add support for the FSM Serial Flash Controller Lee Jones
2014-03-20 8:06 ` [PATCH v5 00/35] mtd: st_spi_fsm: Add new driver Brian Norris
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