[PATCH V3 00/12] CCF support for Renesas r7s72100

[PATCH V3 00/12] CCF support for Renesas r7s72100

[Wolfram Sang]

This series moves the r7s72100 platfrom from the legacy clock implementation to
the common clock framework.

This series has been tested with the renesas-devel-v3.14-rc5-20140307v2 tag.
If you want to boot into a console, you have a runtime dependency [1].

Patches 1-5 is the minimal set to activate CCF and get the board booting into a
console. Patches 6-8 add SCIF support, 9+10 I2C support, and 11+12 SPI support.

Changes since V2:

Patches 1+3 got updates, patch 12 was not send out last time due to sendmail error.

Patch 1 should probably go via clock tree (it has no dependencies). The rest
via shmobile. Please apply.

   Wolfram

PS: A tree can be found here with this series only:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/r7s-ccf

And here with a quick hack to make the system bootable:

git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/r7s-ccf-bootable

[1] http://lkml.org/lkml/2014/2/20/205 ([PATCH V7 0/3] clocksource: Consolidate SH and ARM mach-shmobile Kconfig bits)


Wolfram Sang (12):
  clk: shmobile: add CPG driver for rz-platforms
  ARM: shmobile: r7s72100: document MSTP clock support
  ARM: shmobile: r7s72100: add essential clock nodes to dtsi
  ARM: shmobile: r7s72100: genmai: populate nodes for external clocks
  ARM: shmobile: r7s72100: use workaround for non DT-clocks
  ARM: shmobile: r7s72100: add scif nodes to dtsi
  ARM: shmobile: r7s72100: genmai: activate scif2 for console output
  ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy
    support
  ARM: shmobile: r7s72100: add i2c clocks to dtsi
  ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock
    support
  ARM: shmobile: r7s72100: add spi clocks to dtsi
  ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock
    support

 .../bindings/clock/renesas,cpg-mstp-clocks.txt     |   1 +
 .../bindings/clock/renesas,rz-cpg-clocks.txt       |  29 +++
 arch/arm/boot/dts/r7s72100-genmai-reference.dts    |  12 ++
 arch/arm/boot/dts/r7s72100.dtsi                    | 223 ++++++++++++++++++++-
 arch/arm/mach-shmobile/board-genmai-reference.c    |  14 +-
 arch/arm/mach-shmobile/board-genmai.c              |  44 ++++
 arch/arm/mach-shmobile/clock-r7s72100.c            |   9 -
 arch/arm/mach-shmobile/setup-r7s72100.c            |  43 ----
 drivers/clk/shmobile/Makefile                      |   1 +
 drivers/clk/shmobile/clk-rz.c                      | 103 ++++++++++
 include/dt-bindings/clock/r7s72100-clock.h         |  40 ++++
 11 files changed, 464 insertions(+), 55 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
 create mode 100644 drivers/clk/shmobile/clk-rz.c
 create mode 100644 include/dt-bindings/clock/r7s72100-clock.h

-- 
1.9.0

[PATCH V3 01/12] clk: shmobile: add CPG driver for rz-platforms

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---

Changes since V2:

* Document the input clocks for r7s72100
* revamp and simplify the error paths of the driver

Changes since V1:
* added docs
* preparation for usb_x1 support by documenting two input clocks
* static-consted frqcr_tab
* bail out if num_clks == 0
* cosmetic fixes

Mike: if you are fine with this driver, it would be good if you could apply it.
Then, we can deal with the orthogonal dependencies in mach-shmobile seperately
and know that the driver is already in place when the rest gets resolved.
Thanks!

 .../bindings/clock/renesas,rz-cpg-clocks.txt       |  29 ++++++
 drivers/clk/shmobile/Makefile                      |   1 +
 drivers/clk/shmobile/clk-rz.c                      | 103 +++++++++++++++++++++
 3 files changed, 133 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
 create mode 100644 drivers/clk/shmobile/clk-rz.c

diff --git a/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
new file mode 100644
index 000000000000..98a257492522
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
@@ -0,0 +1,29 @@
+* Renesas RZ Clock Pulse Generator (CPG)
+
+The CPG generates core clocks for the RZ SoCs. It includes the PLL, variable
+CPU and GPU clocks, and several fixed ratio dividers.
+
+Required Properties:
+
+  - compatible: Must be one of
+    - "renesas,r7s72100-cpg-clocks" for the r7s72100 CPG
+    - "renesas,rz-cpg-clocks" for the generic RZ CPG
+  - reg: Base address and length of the memory resource used by the CPG
+  - clocks: References to possible parent clocks. Order must match clock modes
+    in the datasheet. For the r7s72100, this is extal, usb_x1.
+  - #clock-cells: Must be 1
+  - clock-output-names: The names of the clocks. Supported clocks are "pll",
+    "i", and "g"
+
+
+Example
+-------
+
+	cpg_clocks: cpg_clocks at fcfe0000 {
+		#clock-cells = <1>;
+		compatible = "renesas,r7s72100-cpg-clocks",
+			     "renesas,rz-cpg-clocks";
+		reg = <0xfcfe0000 0x18>;
+		clocks = <&extal_clk>, <&usb_x1_clk>;
+		clock-output-names = "pll", "i", "g";
+	};
diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
index 9ecef140dba7..5404cb931ebf 100644
--- a/drivers/clk/shmobile/Makefile
+++ b/drivers/clk/shmobile/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o
+obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
 obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
 obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-div6.o
diff --git a/drivers/clk/shmobile/clk-rz.c b/drivers/clk/shmobile/clk-rz.c
new file mode 100644
index 000000000000..7e68e8630962
--- /dev/null
+++ b/drivers/clk/shmobile/clk-rz.c
@@ -0,0 +1,103 @@
+/*
+ * rz Core CPG Clocks
+ *
+ * Copyright (C) 2013 Ideas On Board SPRL
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+
+struct rz_cpg {
+	struct clk_onecell_data data;
+	void __iomem *reg;
+};
+
+#define CPG_FRQCR	0x10
+#define CPG_FRQCR2	0x14
+
+/* -----------------------------------------------------------------------------
+ * Initialization
+ */
+
+static struct clk * __init
+rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *name)
+{
+	u32 val;
+	unsigned mult;
+	static const unsigned frqcr_tab[4] = { 3, 2, 0, 1 };
+
+	if (strcmp(name, "pll") == 0) {
+		/* FIXME: cpg_mode should be read from GPIO. But no GPIO support yet */
+		unsigned cpg_mode = 0; /* hardcoded to EXTAL for now */
+		const char *parent_name = of_clk_get_parent_name(np, cpg_mode);
+
+		mult = cpg_mode ? (32 / 4) : 30;
+
+		return clk_register_fixed_factor(NULL, name, parent_name, 0, mult, 1);
+	}
+
+	/* If mapping regs failed, skip non-pll clocks. System will boot anyhow */
+	if (!cpg->reg)
+		return ERR_PTR(-ENXIO);
+
+	/* FIXME:"i" and "g" are variable clocks with non-integer dividers (e.g. 2/3)
+	 * and the constraint that always g <= i. To get the rz platform started,
+	 * let them run@fixed current speed and implement the details later.
+	 */
+	if (strcmp(name, "i") == 0)
+		val = (clk_readl(cpg->reg + CPG_FRQCR) >> 8) & 3;
+	else if (strcmp(name, "g") == 0)
+		val = clk_readl(cpg->reg + CPG_FRQCR2) & 3;
+	else
+		return ERR_PTR(-EINVAL);
+
+	mult = frqcr_tab[val];
+	return clk_register_fixed_factor(NULL, name, "pll", 0, mult, 3);
+}
+
+static void __init rz_cpg_clocks_init(struct device_node *np)
+{
+	struct rz_cpg *cpg;
+	struct clk **clks;
+	unsigned i;
+	int num_clks;
+
+	num_clks = of_property_count_strings(np, "clock-output-names");
+	if (WARN(num_clks <= 0, "can't count CPG clocks\n"))
+		return;
+
+	cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
+	clks = kzalloc(num_clks * sizeof(*clks), GFP_KERNEL);
+	BUG_ON(!cpg || !clks);
+
+	cpg->data.clks = clks;
+	cpg->data.clk_num = num_clks;
+
+	cpg->reg = of_iomap(np, 0);
+
+	for (i = 0; i < num_clks; ++i) {
+		const char *name;
+		struct clk *clk;
+
+		of_property_read_string_index(np, "clock-output-names", i, &name);
+
+		clk = rz_cpg_register_clock(np, cpg, name);
+		if (IS_ERR(clk))
+			pr_err("%s: failed to register %s %s clock (%ld)\n",
+			       __func__, np->name, name, PTR_ERR(clk));
+		else
+			cpg->data.clks[i] = clk;
+	}
+
+	of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
+}
+CLK_OF_DECLARE(rz_cpg_clks, "renesas,rz-cpg-clocks", rz_cpg_clocks_init);
-- 
1.9.0

[PATCH V3 02/12] ARM: shmobile: r7s72100: document MSTP clock support

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
index a6a352c2771e..395b2e8ecfd1 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
 Required Properties:
 
   - compatible: Must be one of the following
+    - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
-- 
1.9.0

[PATCH V3 03/12] ARM: shmobile: r7s72100: add essential clock nodes to dtsi

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Only essential clocks are added for now. Other clocks will be added when
needed.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---

Change since V2:

* Use macro to reference the PLL

Changes since V1:
* add usb_x1 clock
* reference usb_x1 to cpg
* improved wording
* #clock-cells consistently first property

 arch/arm/boot/dts/r7s72100.dtsi            | 86 +++++++++++++++++++++++++++++-
 include/dt-bindings/clock/r7s72100-clock.h | 27 ++++++++++
 2 files changed, 112 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/clock/r7s72100-clock.h

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index ee700717a34b..6af5c28c670e 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -1,13 +1,15 @@
 /*
  * Device Tree Source for the r7s72100 SoC
  *
- * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013-14 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/clock/r7s72100-clock.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
@@ -28,6 +30,88 @@
 		spi4 = &spi4;
 	};
 
+	clocks {
+		ranges;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* External clocks */
+		extal_clk: extal_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			/* If clk present, value must be set by board */
+			clock-frequency = <0>;
+			clock-output-names = "extal";
+		};
+
+		usb_x1_clk: usb_x1_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			/* If clk present, value must be set by board */
+			clock-frequency = <0>;
+			clock-output-names = "usb_x1";
+		};
+
+		/* Special CPG clocks */
+		cpg_clocks: cpg_clocks at fcfe0000 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-cpg-clocks",
+				     "renesas,rz-cpg-clocks";
+			reg = <0xfcfe0000 0x18>;
+			clocks = <&extal_clk>, <&usb_x1_clk>;
+			clock-output-names = "pll", "i", "g";
+		};
+
+		/* Fixed factor clocks */
+		b_clk: b_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <3>;
+			clock-output-names = "b";
+		};
+		p1_clk: p1_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <6>;
+			clock-output-names = "p1";
+		};
+		p0_clk: p0_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-factor-clock";
+			clocks = <&cpg_clocks R7S72100_CLK_PLL>;
+			clock-mult = <1>;
+			clock-div = <12>;
+			clock-output-names = "p0";
+		};
+
+		/* MSTP clocks */
+		mstp3_clks: mstp3_clks at fcfe0420 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0420 4>;
+			clocks = <&p0_clk>;
+			renesas,clock-indices = <R7S72100_CLK_MTU2>;
+			clock-output-names = "mtu2";
+		};
+
+		mstp4_clks: mstp4_clks at fcfe0424 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0424 4>;
+			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+				 <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
+			renesas,clock-indices = <
+				R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
+				R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
+			>;
+			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
+		};
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
new file mode 100644
index 000000000000..d0e2d91025c2
--- /dev/null
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
+#define __DT_BINDINGS_CLOCK_R7S72100_H__
+
+#define R7S72100_CLK_PLL	0
+
+/* MSTP3 */
+#define R7S72100_CLK_MTU2	3
+
+/* MSTP4 */
+#define R7S72100_CLK_SCIF0	7
+#define R7S72100_CLK_SCIF1	6
+#define R7S72100_CLK_SCIF2	5
+#define R7S72100_CLK_SCIF3	4
+#define R7S72100_CLK_SCIF4	3
+#define R7S72100_CLK_SCIF5	2
+#define R7S72100_CLK_SCIF6	1
+#define R7S72100_CLK_SCIF7	0
+
+#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
-- 
1.9.0

[PATCH V3 04/12] ARM: shmobile: r7s72100: genmai: populate nodes for external clocks

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 arch/arm/boot/dts/r7s72100-genmai-reference.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
index e664611a47c8..941e72ce7c82 100644
--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
@@ -30,6 +30,14 @@
 	};
 };
 
+&extal_clk {
+	clock-frequency = <13330000>;
+};
+
+&usb_x1_clk {
+	clock-frequency = <48000000>;
+};
+
 &i2c2 {
 	status = "okay";
 	clock-frequency = <400000>;
-- 
1.9.0

[PATCH V3 05/12] ARM: shmobile: r7s72100: use workaround for non DT-clocks

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

SCIF2 and MTU2 are not yet prepared for DT usage, so use the common
workaround via clkdev for now.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 arch/arm/mach-shmobile/board-genmai-reference.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
index 7630c1053e32..91dcdd0e026d 100644
--- a/arch/arm/mach-shmobile/board-genmai-reference.c
+++ b/arch/arm/mach-shmobile/board-genmai-reference.c
@@ -18,18 +18,29 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
-#include <linux/clk-provider.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
+#include <mach/clock.h>
 #include <mach/common.h>
 #include <mach/r7s72100.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
+#ifdef CONFIG_COMMON_CLK
+/*
+ * This is a really crude hack to provide clkdev support to platform
+ * devices until they get moved to DT.
+ */
+static const struct clk_name clk_names[] = {
+	{ "mtu2", NULL, "sh_mtu2.0" },
+	{ "scif2", NULL, "sh-sci.2" },
+};
+#endif
+
 static void __init genmai_add_standard_devices(void)
 {
 #ifdef CONFIG_COMMON_CLK
-	of_clk_init(NULL);
+	shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
 #else
 	r7s72100_clock_init();
 #endif
-- 
1.9.0

[PATCH V3 06/12] ARM: shmobile: r7s72100: add scif nodes to dtsi

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 arch/arm/boot/dts/r7s72100.dtsi | 104 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 104 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 6af5c28c670e..d49afe30c1d7 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -23,6 +23,14 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
+		serial0 = &scif0;
+		serial1 = &scif1;
+		serial2 = &scif2;
+		serial3 = &scif3;
+		serial4 = &scif4;
+		serial5 = &scif5;
+		serial6 = &scif6;
+		serial7 = &scif7;
 		spi0 = &spi0;
 		spi1 = &spi1;
 		spi2 = &spi2;
@@ -200,6 +208,102 @@
 		status = "disabled";
 	};
 
+	scif0: serial at e8007000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007000 64>;
+		interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 191 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 192 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 189 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif1: serial at e8007800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8007800 64>;
+		interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 195 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 196 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 193 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif2: serial at e8008000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008000 64>;
+		interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 199 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 200 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 197 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif3: serial at e8008800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8008800 64>;
+		interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 203 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 204 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 201 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif4: serial at e8009000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009000 64>;
+		interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 207 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 208 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 205 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif5: serial at e8009800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe8009800 64>;
+		interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 211 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 212 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 209 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif6: serial at e800a000 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a000 64>;
+		interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 215 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 216 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 213 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
+	scif7: serial at e800a800 {
+		compatible = "renesas,scif-r7s72100", "renesas,scif";
+		reg = <0xe800a800 64>;
+		interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 219 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 220 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 217 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
+		clock-names = "sci_ick";
+		status = "disabled";
+	};
+
 	spi0: spi at e800c800 {
 		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
 		reg = <0xe800c800 0x24>;
-- 
1.9.0

[PATCH V3 07/12] ARM: shmobile: r7s72100: genmai: activate scif2 for console output

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 arch/arm/boot/dts/r7s72100-genmai-reference.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100-genmai-reference.dts b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
index 941e72ce7c82..82901a2cd947 100644
--- a/arch/arm/boot/dts/r7s72100-genmai-reference.dts
+++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
@@ -48,3 +48,7 @@
 		pagesize = <64>;
 	};
 };
+
+&scif2 {
+	status = "okay";
+};
-- 
1.9.0

[PATCH V3 08/12] ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy support

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

We have now DT support for SCIF, so use the platform_device
initialization only for the legacy support.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 arch/arm/mach-shmobile/board-genmai-reference.c |  1 -
 arch/arm/mach-shmobile/board-genmai.c           | 44 +++++++++++++++++++++++++
 arch/arm/mach-shmobile/setup-r7s72100.c         | 43 ------------------------
 3 files changed, 44 insertions(+), 44 deletions(-)

diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
index 91dcdd0e026d..fde558b66d4e 100644
--- a/arch/arm/mach-shmobile/board-genmai-reference.c
+++ b/arch/arm/mach-shmobile/board-genmai-reference.c
@@ -33,7 +33,6 @@
  */
 static const struct clk_name clk_names[] = {
 	{ "mtu2", NULL, "sh_mtu2.0" },
-	{ "scif2", NULL, "sh-sci.2" },
 };
 #endif
 
diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
index 6c328d63b819..c94201ee8596 100644
--- a/arch/arm/mach-shmobile/board-genmai.c
+++ b/arch/arm/mach-shmobile/board-genmai.c
@@ -21,6 +21,7 @@
 
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/serial_sci.h>
 #include <linux/sh_eth.h>
 #include <linux/spi/rspi.h>
 #include <linux/spi/spi.h>
@@ -89,6 +90,40 @@ static const struct spi_board_info spi_info[] __initconst = {
 	},
 };
 
+/* SCIF */
+#define R7S72100_SCIF(index, baseaddr, irq)				\
+static const struct plat_sci_port scif##index##_platform_data = {	\
+	.type		= PORT_SCIF,					\
+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,		\
+	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |	\
+			  SCSCR_REIE,					\
+};									\
+									\
+static struct resource scif##index##_resources[] = {			\
+	DEFINE_RES_MEM(baseaddr, 0x100),				\
+	DEFINE_RES_IRQ(irq + 1),					\
+	DEFINE_RES_IRQ(irq + 2),					\
+	DEFINE_RES_IRQ(irq + 3),					\
+	DEFINE_RES_IRQ(irq),						\
+}									\
+
+R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
+R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
+R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
+R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
+R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
+R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
+R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
+R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
+
+#define r7s72100_register_scif(index)					       \
+	platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
+					  scif##index##_resources,	       \
+					  ARRAY_SIZE(scif##index##_resources), \
+					  &scif##index##_platform_data,	       \
+					  sizeof(scif##index##_platform_data))
+
 static void __init genmai_add_standard_devices(void)
 {
 	r7s72100_clock_init();
@@ -102,6 +137,15 @@ static void __init genmai_add_standard_devices(void)
 	r7s72100_register_rspi(3);
 	r7s72100_register_rspi(4);
 	spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
+
+	r7s72100_register_scif(0);
+	r7s72100_register_scif(1);
+	r7s72100_register_scif(2);
+	r7s72100_register_scif(3);
+	r7s72100_register_scif(4);
+	r7s72100_register_scif(5);
+	r7s72100_register_scif(6);
+	r7s72100_register_scif(7);
 }
 
 static const char * const genmai_boards_compat_dt[] __initconst = {
diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
index 2ed092241a13..7a063b60f7f6 100644
--- a/arch/arm/mach-shmobile/setup-r7s72100.c
+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
@@ -21,47 +21,12 @@
 #include <linux/irq.h>
 #include <linux/kernel.h>
 #include <linux/of_platform.h>
-#include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
 #include "common.h"
 #include "irqs.h"
 #include "r7s72100.h"
 #include <asm/mach/arch.h>
 
-#define R7S72100_SCIF(index, baseaddr, irq)				\
-static const struct plat_sci_port scif##index##_platform_data = {	\
-	.type		= PORT_SCIF,					\
-	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,		\
-	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
-	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |	\
-			  SCSCR_REIE,					\
-};									\
-									\
-static struct resource scif##index##_resources[] = {			\
-	DEFINE_RES_MEM(baseaddr, 0x100),				\
-	DEFINE_RES_IRQ(irq + 1),					\
-	DEFINE_RES_IRQ(irq + 2),					\
-	DEFINE_RES_IRQ(irq + 3),					\
-	DEFINE_RES_IRQ(irq),						\
-}									\
-
-R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
-R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
-R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
-R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
-R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
-R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
-R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
-R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
-
-#define r7s72100_register_scif(index)					       \
-	platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
-					  scif##index##_resources,	       \
-					  ARRAY_SIZE(scif##index##_resources), \
-					  &scif##index##_platform_data,	       \
-					  sizeof(scif##index##_platform_data))
-
-
 static struct sh_timer_config mtu2_0_platform_data __initdata = {
 	.name = "MTU2_0",
 	.timer_bit = 0,
@@ -83,14 +48,6 @@ static struct resource mtu2_0_resources[] __initdata = {
 
 void __init r7s72100_add_dt_devices(void)
 {
-	r7s72100_register_scif(0);
-	r7s72100_register_scif(1);
-	r7s72100_register_scif(2);
-	r7s72100_register_scif(3);
-	r7s72100_register_scif(4);
-	r7s72100_register_scif(5);
-	r7s72100_register_scif(6);
-	r7s72100_register_scif(7);
 	r7s72100_register_mtu2(0);
 }
 
-- 
1.9.0

[PATCH V3 09/12] ARM: shmobile: r7s72100: add i2c clocks to dtsi

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 arch/arm/boot/dts/r7s72100.dtsi            | 15 +++++++++++++++
 include/dt-bindings/clock/r7s72100-clock.h |  6 ++++++
 2 files changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index d49afe30c1d7..9f7a06dc5e30 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -118,6 +118,17 @@
 			>;
 			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
 		};
+
+		mstp9_clks: mstp9_clks at fcfe0438 {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe0438 4>;
+			clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
+			renesas,clock-indices = <
+				R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
+			>;
+			clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
+		};
 	};
 
 	cpus {
@@ -153,6 +164,7 @@
 			     <0 162 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 163 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 164 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
@@ -170,6 +182,7 @@
 			     <0 170 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 171 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 172 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
@@ -187,6 +200,7 @@
 			     <0 178 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 179 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 180 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
@@ -204,6 +218,7 @@
 			     <0 186 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 187 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 188 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
 		clock-frequency = <100000>;
 		status = "disabled";
 	};
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
index d0e2d91025c2..b412bb2c93b1 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -24,4 +24,10 @@
 #define R7S72100_CLK_SCIF6	1
 #define R7S72100_CLK_SCIF7	0
 
+/* MSTP9 */
+#define R7S72100_CLK_I2C0	7
+#define R7S72100_CLK_I2C1	6
+#define R7S72100_CLK_I2C2	5
+#define R7S72100_CLK_I2C3	4
+
 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
-- 
1.9.0

[PATCH V3 10/12] ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock support

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Not used anymore since we switched to CCF.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 arch/arm/mach-shmobile/clock-r7s72100.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index 7998ce3c8f0e..31148c1acc07 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -199,10 +199,6 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
 	CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
 	CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
-	CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
-	CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
-	CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
-	CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
 	CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
 	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
 
-- 
1.9.0

[PATCH V3 11/12] ARM: shmobile: r7s72100: add spi clocks to dtsi

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
---
 arch/arm/boot/dts/r7s72100.dtsi            | 18 ++++++++++++++++++
 include/dt-bindings/clock/r7s72100-clock.h |  7 +++++++
 2 files changed, 25 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 9f7a06dc5e30..3575c0f86eda 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -129,6 +129,19 @@
 			>;
 			clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
 		};
+
+		mstp10_clks: mstp10_clks at fcfe043c {
+			#clock-cells = <1>;
+			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+			reg = <0xfcfe043c 4>;
+			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
+				 <&p1_clk>;
+			renesas,clock-indices = <
+				R7S72100_CLK_SPI0 R7S72100_CLK_SPI1 R7S72100_CLK_SPI2 R7S72100_CLK_SPI3
+				R7S72100_CLK_SPI4
+			>;
+			clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
+		};
 	};
 
 	cpus {
@@ -326,6 +339,7 @@
 			     <0 239 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 240 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -339,6 +353,7 @@
 			     <0 242 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 243 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -352,6 +367,7 @@
 			     <0 245 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 246 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -365,6 +381,7 @@
 			     <0 248 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 249 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -378,6 +395,7 @@
 			     <0 251 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 252 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "error", "rx", "tx";
+		clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
 		num-cs = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
index b412bb2c93b1..5cb969fa4931 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -30,4 +30,11 @@
 #define R7S72100_CLK_I2C2	5
 #define R7S72100_CLK_I2C3	4
 
+/* MSTP10 */
+#define R7S72100_CLK_SPI0	7
+#define R7S72100_CLK_SPI1	6
+#define R7S72100_CLK_SPI2	5
+#define R7S72100_CLK_SPI3	4
+#define R7S72100_CLK_SPI4	3
+
 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
-- 
1.9.0

[PATCH V3 12/12] ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock support

[Wolfram Sang]

From: Wolfram Sang <wsa@sang-engineering.com>

Not used anymore since we switched to CCF.

Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
---
 arch/arm/mach-shmobile/clock-r7s72100.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
index 31148c1acc07..b60543ec442b 100644
--- a/arch/arm/mach-shmobile/clock-r7s72100.c
+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
@@ -194,11 +194,6 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
 	CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
 	CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
-	CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
-	CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
-	CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
-	CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
-	CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
 	CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
 	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
 
-- 
1.9.0

[PATCH V3 06/12] ARM: shmobile: r7s72100: add scif nodes to dtsi

[Laurent Pinchart]

Hi Wolfram,

Thank you for the patch.

On Friday 07 March 2014 17:00:42 Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> ---
>  arch/arm/boot/dts/r7s72100.dtsi | 104 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 104 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r7s72100.dtsi
> b/arch/arm/boot/dts/r7s72100.dtsi index 6af5c28c670e..d49afe30c1d7 100644
> --- a/arch/arm/boot/dts/r7s72100.dtsi
> +++ b/arch/arm/boot/dts/r7s72100.dtsi
> @@ -23,6 +23,14 @@
>  		i2c1 = &i2c1;
>  		i2c2 = &i2c2;
>  		i2c3 = &i2c3;
> +		serial0 = &scif0;
> +		serial1 = &scif1;
> +		serial2 = &scif2;
> +		serial3 = &scif3;
> +		serial4 = &scif4;
> +		serial5 = &scif5;
> +		serial6 = &scif6;
> +		serial7 = &scif7;

As port usages is board specific, shouldn't this be moved to the board .dts 
file, with only serial0 = &scif2 ?

>  		spi0 = &spi0;
>  		spi1 = &spi1;
>  		spi2 = &spi2;
> @@ -200,6 +208,102 @@
>  		status = "disabled";
>  	};
> 
> +	scif0: serial at e8007000 {
> +		compatible = "renesas,scif-r7s72100", "renesas,scif";
> +		reg = <0xe8007000 64>;
> +		interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 191 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 192 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 189 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
> +		clock-names = "sci_ick";
> +		status = "disabled";
> +	};
> +
> +	scif1: serial at e8007800 {
> +		compatible = "renesas,scif-r7s72100", "renesas,scif";
> +		reg = <0xe8007800 64>;
> +		interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 195 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 196 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 193 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
> +		clock-names = "sci_ick";
> +		status = "disabled";
> +	};
> +
> +	scif2: serial at e8008000 {
> +		compatible = "renesas,scif-r7s72100", "renesas,scif";
> +		reg = <0xe8008000 64>;
> +		interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 199 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 200 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 197 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
> +		clock-names = "sci_ick";
> +		status = "disabled";
> +	};
> +
> +	scif3: serial at e8008800 {
> +		compatible = "renesas,scif-r7s72100", "renesas,scif";
> +		reg = <0xe8008800 64>;
> +		interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 203 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 204 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 201 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
> +		clock-names = "sci_ick";
> +		status = "disabled";
> +	};
> +
> +	scif4: serial at e8009000 {
> +		compatible = "renesas,scif-r7s72100", "renesas,scif";
> +		reg = <0xe8009000 64>;
> +		interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 207 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 208 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 205 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
> +		clock-names = "sci_ick";
> +		status = "disabled";
> +	};
> +
> +	scif5: serial at e8009800 {
> +		compatible = "renesas,scif-r7s72100", "renesas,scif";
> +		reg = <0xe8009800 64>;
> +		interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 211 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 212 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 209 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
> +		clock-names = "sci_ick";
> +		status = "disabled";
> +	};
> +
> +	scif6: serial at e800a000 {
> +		compatible = "renesas,scif-r7s72100", "renesas,scif";
> +		reg = <0xe800a000 64>;
> +		interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 215 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 216 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 213 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
> +		clock-names = "sci_ick";
> +		status = "disabled";
> +	};
> +
> +	scif7: serial at e800a800 {
> +		compatible = "renesas,scif-r7s72100", "renesas,scif";
> +		reg = <0xe800a800 64>;
> +		interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 219 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 220 IRQ_TYPE_LEVEL_HIGH>,
> +			     <0 217 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
> +		clock-names = "sci_ick";
> +		status = "disabled";
> +	};
> +
>  	spi0: spi at e800c800 {
>  		compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
>  		reg = <0xe800c800 0x24>;

-- 
Regards,

Laurent Pinchart

[PATCH V3 00/12] CCF support for Renesas r7s72100

[Laurent Pinchart]

Hi Wolfram,

Thank you for the patches.

Beside the comment to patch 06/12, I would have moved patches 06/12 to 08/12 
to the beginning of the series, in order to avoid adding a clock workaround 
for the serial clock only to remove it a couple of patches later.

Oh, and one might ask you to fix the 80 columns checkpatch warnings for patch 
01/12 :-) 

On Friday 07 March 2014 17:00:36 Wolfram Sang wrote:
> This series moves the r7s72100 platfrom from the legacy clock implementation
> to the common clock framework.
> 
> This series has been tested with the renesas-devel-v3.14-rc5-20140307v2 tag.
> If you want to boot into a console, you have a runtime dependency [1].
> 
> Patches 1-5 is the minimal set to activate CCF and get the board booting
> into a console. Patches 6-8 add SCIF support, 9+10 I2C support, and 11+12
> SPI support.
> 
> Changes since V2:
> 
> Patches 1+3 got updates, patch 12 was not send out last time due to sendmail
> error.
> 
> Patch 1 should probably go via clock tree (it has no dependencies). The rest
> via shmobile. Please apply.
> 
>    Wolfram
> 
> PS: A tree can be found here with this series only:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git renesas/r7s-ccf
> 
> And here with a quick hack to make the system bootable:
> 
> git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git
> renesas/r7s-ccf-bootable
> 
> [1] http://lkml.org/lkml/2014/2/20/205 ([PATCH V7 0/3] clocksource:
> Consolidate SH and ARM mach-shmobile Kconfig bits)
> 
> 
> Wolfram Sang (12):
>   clk: shmobile: add CPG driver for rz-platforms
>   ARM: shmobile: r7s72100: document MSTP clock support
>   ARM: shmobile: r7s72100: add essential clock nodes to dtsi
>   ARM: shmobile: r7s72100: genmai: populate nodes for external clocks
>   ARM: shmobile: r7s72100: use workaround for non DT-clocks
>   ARM: shmobile: r7s72100: add scif nodes to dtsi
>   ARM: shmobile: r7s72100: genmai: activate scif2 for console output
>   ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy
>     support
>   ARM: shmobile: r7s72100: add i2c clocks to dtsi
>   ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock
>     support
>   ARM: shmobile: r7s72100: add spi clocks to dtsi
>   ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock
>     support
> 
>  .../bindings/clock/renesas,cpg-mstp-clocks.txt     |   1 +
>  .../bindings/clock/renesas,rz-cpg-clocks.txt       |  29 +++
>  arch/arm/boot/dts/r7s72100-genmai-reference.dts    |  12 ++
>  arch/arm/boot/dts/r7s72100.dtsi                    | 223
> ++++++++++++++++++++- arch/arm/mach-shmobile/board-genmai-reference.c    | 
> 14 +-
>  arch/arm/mach-shmobile/board-genmai.c              |  44 ++++
>  arch/arm/mach-shmobile/clock-r7s72100.c            |   9 -
>  arch/arm/mach-shmobile/setup-r7s72100.c            |  43 ----
>  drivers/clk/shmobile/Makefile                      |   1 +
>  drivers/clk/shmobile/clk-rz.c                      | 103 ++++++++++
>  include/dt-bindings/clock/r7s72100-clock.h         |  40 ++++
>  11 files changed, 464 insertions(+), 55 deletions(-)
>  create mode 100644
> Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt create
> mode 100644 drivers/clk/shmobile/clk-rz.c
>  create mode 100644 include/dt-bindings/clock/r7s72100-clock.h

-- 
Regards,

Laurent Pinchart

[PATCH V3 03/12] ARM: shmobile: r7s72100: add essential clock nodes to dtsi

[Ben Dooks]

On 07/03/14 16:00, Wolfram Sang wrote:
> From: Wolfram Sang <wsa@sang-engineering.com>
>

> +		/* MSTP clocks */
> +		mstp3_clks: mstp3_clks at fcfe0420 {
> +			#clock-cells = <1>;
> +			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
> +			reg = <0xfcfe0420 4>;
> +			clocks = <&p0_clk>;
> +			renesas,clock-indices = <R7S72100_CLK_MTU2>;
> +			clock-output-names = "mtu2";
> +		};
> +
> +		mstp4_clks: mstp4_clks at fcfe0424 {
> +			#clock-cells = <1>;
> +			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
> +			reg = <0xfcfe0424 4>;
> +			clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
> +				 <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
> +			renesas,clock-indices = <
> +				R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
> +				R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
> +			>;
> +			clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";

FYI: I'm pushing a patch through to make clock-indices a standard
DT property that will allow the of_clk_get_name() function to
work properly. With this, the renesas,clock-indices will be
replaced with the clock-indices.
-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genies

[PATCH V3 06/12] ARM: shmobile: r7s72100: add scif nodes to dtsi

[Wolfram Sang]

> > diff --git a/arch/arm/boot/dts/r7s72100.dtsi
> > b/arch/arm/boot/dts/r7s72100.dtsi index 6af5c28c670e..d49afe30c1d7 100644
> > --- a/arch/arm/boot/dts/r7s72100.dtsi
> > +++ b/arch/arm/boot/dts/r7s72100.dtsi
> > @@ -23,6 +23,14 @@
> >  		i2c1 = &i2c1;
> >  		i2c2 = &i2c2;
> >  		i2c3 = &i2c3;
> > +		serial0 = &scif0;
> > +		serial1 = &scif1;
> > +		serial2 = &scif2;
> > +		serial3 = &scif3;
> > +		serial4 = &scif4;
> > +		serial5 = &scif5;
> > +		serial6 = &scif6;
> > +		serial7 = &scif7;
> 
> As port usages is board specific, shouldn't this be moved to the board .dts 
> file, with only serial0 = &scif2 ?

Nope, the intention of these aliases is to have a consistent numbering
of SCIF cores, similar to platform.dev_id.

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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Wolfram Sang]

Hi Laurent,

> Beside the comment to patch 06/12, I would have moved patches 06/12 to 08/12 
> to the beginning of the series, in order to avoid adding a clock workaround 
> for the serial clock only to remove it a couple of patches later.

That would have saved only 2 lines since we need the workaround anyhow
(MTU2) and would break the incremental approach of this series somewhat.
I'd like to keep it.

> Oh, and one might ask you to fix the 80 columns checkpatch warnings for patch 
> 01/12 :-) 

Broken intentionally for the sake of readability :)

Thanks,

   Wolfram

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[PATCH V3 03/12] ARM: shmobile: r7s72100: add essential clock nodes to dtsi

[Wolfram Sang]

> FYI: I'm pushing a patch through to make clock-indices a standard
> DT property that will allow the of_clk_get_name() function to
> work properly. With this, the renesas,clock-indices will be
> replaced with the clock-indices.

Great, I'll keep an eye on it!

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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Laurent Pinchart]

Hi Wolfram,

On Friday 07 March 2014 17:29:47 Wolfram Sang wrote:
> Hi Laurent,
> 
> > Beside the comment to patch 06/12, I would have moved patches 06/12 to
> > 08/12 to the beginning of the series, in order to avoid adding a clock
> > workaround for the serial clock only to remove it a couple of patches
> > later.
> 
> That would have saved only 2 lines since we need the workaround anyhow
> (MTU2) and would break the incremental approach of this series somewhat.
> I'd like to keep it.

It would have saved one patch. If Simon needs to apply CCF support separately 
I'm fine with that approach, but if both changes are applied at the same time 
the SCIF patches could go in first.

> > Oh, and one might ask you to fix the 80 columns checkpatch warnings for
> > patch 01/12 :-)
> 
> Broken intentionally for the sake of readability :)

-- 
Regards,

Laurent Pinchart
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[PATCH V3 06/12] ARM: shmobile: r7s72100: add scif nodes to dtsi

[Laurent Pinchart]

Hi Wolfram,

On Friday 07 March 2014 17:25:10 Wolfram Sang wrote:
> > > diff --git a/arch/arm/boot/dts/r7s72100.dtsi
> > > b/arch/arm/boot/dts/r7s72100.dtsi index 6af5c28c670e..d49afe30c1d7
> > > 100644
> > > --- a/arch/arm/boot/dts/r7s72100.dtsi
> > > +++ b/arch/arm/boot/dts/r7s72100.dtsi
> > > @@ -23,6 +23,14 @@
> > >  		i2c1 = &i2c1;
> > >  		i2c2 = &i2c2;
> > >  		i2c3 = &i2c3;
> > > +		serial0 = &scif0;
> > > +		serial1 = &scif1;
> > > +		serial2 = &scif2;
> > > +		serial3 = &scif3;
> > > +		serial4 = &scif4;
> > > +		serial5 = &scif5;
> > > +		serial6 = &scif6;
> > > +		serial7 = &scif7;
> > 
> > As port usages is board specific, shouldn't this be moved to the board
> > .dts file, with only serial0 = &scif2 ?
> 
> Nope, the intention of these aliases is to have a consistent numbering
> of SCIF cores, similar to platform.dev_id.

But do we want that ? Isn't it better from a user point of view to have ttySC0 
regardless of whether scif2 or scif3 is used when the board has a single 
serial port only ?

-- 
Regards,

Laurent Pinchart
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[PATCH V3 06/12] ARM: shmobile: r7s72100: add scif nodes to dtsi

[Wolfram Sang]

> > > As port usages is board specific, shouldn't this be moved to the board
> > > .dts file, with only serial0 = &scif2 ?
> > 
> > Nope, the intention of these aliases is to have a consistent numbering
> > of SCIF cores, similar to platform.dev_id.
> 
> But do we want that ? Isn't it better from a user point of view to have ttySC0 
> regardless of whether scif2 or scif3 is used when the board has a single 
> serial port only ?

Some prefer this, some that. The current standard pattern is what I implemented.
I think consistency makes sense for my series. If you like to prefer another
pattern, please start a discussion at the devicetree list.

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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Wolfram Sang]

> > That would have saved only 2 lines since we need the workaround anyhow
> > (MTU2) and would break the incremental approach of this series somewhat.
> > I'd like to keep it.
> 
> It would have saved one patch. If Simon needs to apply CCF support separately 
> I'm fine with that approach, but if both changes are applied at the same time 
> the SCIF patches could go in first.

Which one would be saved? We need to workaround anyhow (patch 5) and
some scif cleanup besides the workaround is needed, too (patch 7). No?

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[PATCH V3 06/12] ARM: shmobile: r7s72100: add scif nodes to dtsi

[Wolfram Sang]

> When you say standard pattern, do you mean the practice followed by most .dts 
> in mainline, or is there an actual document that recommends this pattern ?

I mean the first. There might be the latter, don't know.

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[PATCH V3 06/12] ARM: shmobile: r7s72100: add scif nodes to dtsi

[Laurent Pinchart]

Hi Wolfram,

On Friday 07 March 2014 17:44:27 Wolfram Sang wrote:
> > > > As port usages is board specific, shouldn't this be moved to the board
> > > > .dts file, with only serial0 = &scif2 ?
> > > 
> > > Nope, the intention of these aliases is to have a consistent numbering
> > > of SCIF cores, similar to platform.dev_id.
> > 
> > But do we want that ? Isn't it better from a user point of view to have
> > ttySC0 regardless of whether scif2 or scif3 is used when the board has a
> > single serial port only ?
> 
> Some prefer this, some that. The current standard pattern is what I
> implemented. I think consistency makes sense for my series. If you like to
> prefer another pattern, please start a discussion at the devicetree list.

When you say standard pattern, do you mean the practice followed by most .dts 
in mainline, or is there an actual document that recommends this pattern ?

-- 
Regards,

Laurent Pinchart
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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Laurent Pinchart]

On Friday 07 March 2014 17:47:41 Wolfram Sang wrote:
> > > That would have saved only 2 lines since we need the workaround anyhow
> > > (MTU2) and would break the incremental approach of this series somewhat.
> > > I'd like to keep it.
> > 
> > It would have saved one patch. If Simon needs to apply CCF support
> > separately I'm fine with that approach, but if both changes are applied
> > at the same time the SCIF patches could go in first.
> 
> Which one would be saved? We need to workaround anyhow (patch 5) and
> some scif cleanup besides the workaround is needed, too (patch 7). No?

Indeed, I got it wrong. We can leave it as-is then.

-- 
Regards,

Laurent Pinchart
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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Wolfram Sang]

> Indeed, I got it wrong. We can leave it as-is then.

Great. So I guess, this series can be applied now?

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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Laurent Pinchart]

Hi Wolfram,

On Monday 10 March 2014 08:27:19 Wolfram Sang wrote:
> > Indeed, I got it wrong. We can leave it as-is then.
> 
> Great. So I guess, this series can be applied now?

There's just the issue of serial port aliases left. I've started a discussion 
about that on the DT mailing list (you've been CC'ed).

-- 
Regards,

Laurent Pinchart
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[PATCH V3 01/12] clk: shmobile: add CPG driver for rz-platforms

[Mike Turquette]

Quoting Wolfram Sang (2014-03-07 08:00:37)
> From: Wolfram Sang <wsa@sang-engineering.com>
> 
> Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
> ---
> 
> Changes since V2:
> 
> * Document the input clocks for r7s72100
> * revamp and simplify the error paths of the driver
> 
> Changes since V1:
> * added docs
> * preparation for usb_x1 support by documenting two input clocks
> * static-consted frqcr_tab
> * bail out if num_clks == 0
> * cosmetic fixes
> 
> Mike: if you are fine with this driver, it would be good if you could apply it.
> Then, we can deal with the orthogonal dependencies in mach-shmobile seperately
> and know that the driver is already in place when the rest gets resolved.
> Thanks!

Taken into clk-next.

Regards,
Mike

> 
>  .../bindings/clock/renesas,rz-cpg-clocks.txt       |  29 ++++++
>  drivers/clk/shmobile/Makefile                      |   1 +
>  drivers/clk/shmobile/clk-rz.c                      | 103 +++++++++++++++++++++
>  3 files changed, 133 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
>  create mode 100644 drivers/clk/shmobile/clk-rz.c
> 
> diff --git a/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
> new file mode 100644
> index 000000000000..98a257492522
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,rz-cpg-clocks.txt
> @@ -0,0 +1,29 @@
> +* Renesas RZ Clock Pulse Generator (CPG)
> +
> +The CPG generates core clocks for the RZ SoCs. It includes the PLL, variable
> +CPU and GPU clocks, and several fixed ratio dividers.
> +
> +Required Properties:
> +
> +  - compatible: Must be one of
> +    - "renesas,r7s72100-cpg-clocks" for the r7s72100 CPG
> +    - "renesas,rz-cpg-clocks" for the generic RZ CPG
> +  - reg: Base address and length of the memory resource used by the CPG
> +  - clocks: References to possible parent clocks. Order must match clock modes
> +    in the datasheet. For the r7s72100, this is extal, usb_x1.
> +  - #clock-cells: Must be 1
> +  - clock-output-names: The names of the clocks. Supported clocks are "pll",
> +    "i", and "g"
> +
> +
> +Example
> +-------
> +
> +       cpg_clocks: cpg_clocks at fcfe0000 {
> +               #clock-cells = <1>;
> +               compatible = "renesas,r7s72100-cpg-clocks",
> +                            "renesas,rz-cpg-clocks";
> +               reg = <0xfcfe0000 0x18>;
> +               clocks = <&extal_clk>, <&usb_x1_clk>;
> +               clock-output-names = "pll", "i", "g";
> +       };
> diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
> index 9ecef140dba7..5404cb931ebf 100644
> --- a/drivers/clk/shmobile/Makefile
> +++ b/drivers/clk/shmobile/Makefile
> @@ -1,4 +1,5 @@
>  obj-$(CONFIG_ARCH_EMEV2)               += clk-emev2.o
> +obj-$(CONFIG_ARCH_R7S72100)            += clk-rz.o
>  obj-$(CONFIG_ARCH_R8A7790)             += clk-rcar-gen2.o
>  obj-$(CONFIG_ARCH_R8A7791)             += clk-rcar-gen2.o
>  obj-$(CONFIG_ARCH_SHMOBILE_MULTI)      += clk-div6.o
> diff --git a/drivers/clk/shmobile/clk-rz.c b/drivers/clk/shmobile/clk-rz.c
> new file mode 100644
> index 000000000000..7e68e8630962
> --- /dev/null
> +++ b/drivers/clk/shmobile/clk-rz.c
> @@ -0,0 +1,103 @@
> +/*
> + * rz Core CPG Clocks
> + *
> + * Copyright (C) 2013 Ideas On Board SPRL
> + * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; version 2 of the License.
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/init.h>
> +#include <linux/kernel.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/slab.h>
> +
> +struct rz_cpg {
> +       struct clk_onecell_data data;
> +       void __iomem *reg;
> +};
> +
> +#define CPG_FRQCR      0x10
> +#define CPG_FRQCR2     0x14
> +
> +/* -----------------------------------------------------------------------------
> + * Initialization
> + */
> +
> +static struct clk * __init
> +rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *name)
> +{
> +       u32 val;
> +       unsigned mult;
> +       static const unsigned frqcr_tab[4] = { 3, 2, 0, 1 };
> +
> +       if (strcmp(name, "pll") == 0) {
> +               /* FIXME: cpg_mode should be read from GPIO. But no GPIO support yet */
> +               unsigned cpg_mode = 0; /* hardcoded to EXTAL for now */
> +               const char *parent_name = of_clk_get_parent_name(np, cpg_mode);
> +
> +               mult = cpg_mode ? (32 / 4) : 30;
> +
> +               return clk_register_fixed_factor(NULL, name, parent_name, 0, mult, 1);
> +       }
> +
> +       /* If mapping regs failed, skip non-pll clocks. System will boot anyhow */
> +       if (!cpg->reg)
> +               return ERR_PTR(-ENXIO);
> +
> +       /* FIXME:"i" and "g" are variable clocks with non-integer dividers (e.g. 2/3)
> +        * and the constraint that always g <= i. To get the rz platform started,
> +        * let them run at fixed current speed and implement the details later.
> +        */
> +       if (strcmp(name, "i") == 0)
> +               val = (clk_readl(cpg->reg + CPG_FRQCR) >> 8) & 3;
> +       else if (strcmp(name, "g") == 0)
> +               val = clk_readl(cpg->reg + CPG_FRQCR2) & 3;
> +       else
> +               return ERR_PTR(-EINVAL);
> +
> +       mult = frqcr_tab[val];
> +       return clk_register_fixed_factor(NULL, name, "pll", 0, mult, 3);
> +}
> +
> +static void __init rz_cpg_clocks_init(struct device_node *np)
> +{
> +       struct rz_cpg *cpg;
> +       struct clk **clks;
> +       unsigned i;
> +       int num_clks;
> +
> +       num_clks = of_property_count_strings(np, "clock-output-names");
> +       if (WARN(num_clks <= 0, "can't count CPG clocks\n"))
> +               return;
> +
> +       cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
> +       clks = kzalloc(num_clks * sizeof(*clks), GFP_KERNEL);
> +       BUG_ON(!cpg || !clks);
> +
> +       cpg->data.clks = clks;
> +       cpg->data.clk_num = num_clks;
> +
> +       cpg->reg = of_iomap(np, 0);
> +
> +       for (i = 0; i < num_clks; ++i) {
> +               const char *name;
> +               struct clk *clk;
> +
> +               of_property_read_string_index(np, "clock-output-names", i, &name);
> +
> +               clk = rz_cpg_register_clock(np, cpg, name);
> +               if (IS_ERR(clk))
> +                       pr_err("%s: failed to register %s %s clock (%ld)\n",
> +                              __func__, np->name, name, PTR_ERR(clk));
> +               else
> +                       cpg->data.clks[i] = clk;
> +       }
> +
> +       of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
> +}
> +CLK_OF_DECLARE(rz_cpg_clks, "renesas,rz-cpg-clocks", rz_cpg_clocks_init);
> -- 
> 1.9.0
> 

[PATCH V3 00/12] CCF support for Renesas r7s72100

[Wolfram Sang]

On Mon, Mar 10, 2014 at 12:59:05PM +0100, Laurent Pinchart wrote:
> Hi Wolfram,
> 
> On Monday 10 March 2014 08:27:19 Wolfram Sang wrote:
> > > Indeed, I got it wrong. We can leave it as-is then.
> > 
> > Great. So I guess, this series can be applied now?
> 
> There's just the issue of serial port aliases left. I've started a discussion 
> about that on the DT mailing list (you've been CC'ed).

So, how to proceed with this series?

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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Laurent Pinchart]

Hi Wolfram,

On Thursday 27 March 2014 07:46:43 Wolfram Sang wrote:
> On Mon, Mar 10, 2014 at 12:59:05PM +0100, Laurent Pinchart wrote:
> > On Monday 10 March 2014 08:27:19 Wolfram Sang wrote:
> > > > Indeed, I got it wrong. We can leave it as-is then.
> > > 
> > > Great. So I guess, this series can be applied now?
> > 
> > There's just the issue of serial port aliases left. I've started a
> > discussion about that on the DT mailing list (you've been CC'ed).
> 
> So, how to proceed with this series?

Could you please ping the DT maintainers to revive the discussion ?

-- 
Regards,

Laurent Pinchart
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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Wolfram Sang]

> > > > > Indeed, I got it wrong. We can leave it as-is then.
> > > > 
> > > > Great. So I guess, this series can be applied now?
> > > 
> > > There's just the issue of serial port aliases left. I've started a
> > > discussion about that on the DT mailing list (you've been CC'ed).
> > 
> > So, how to proceed with this series?
> 
> Could you please ping the DT maintainers to revive the discussion ?

I don't think I am the right person to ping, because I don't know what
you are precisely looking for from them.

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[PATCH V3 00/12] CCF support for Renesas r7s72100

[Laurent Pinchart]

On Thursday 27 March 2014 12:36:33 Wolfram Sang wrote:
> > > > > > Indeed, I got it wrong. We can leave it as-is then.
> > > > > 
> > > > > Great. So I guess, this series can be applied now?
> > > > 
> > > > There's just the issue of serial port aliases left. I've started a
> > > > discussion about that on the DT mailing list (you've been CC'ed).
> > > 
> > > So, how to proceed with this series?
> > 
> > Could you please ping the DT maintainers to revive the discussion ?
> 
> I don't think I am the right person to ping, because I don't know what
> you are precisely looking for from them.

I've pinged them.

-- 
Regards,

Laurent Pinchart
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