[PATCH] ARM: dts: msm8974: Move arch-timer out of soc node

[PATCH] ARM: dts: msm8974: Move arch-timer out of soc node

[Stephen Boyd]

The architected timer is not a register addressable piece of
hardware. Instead it's accessed through cp15 accessors. Move it
to the root of the devicetree to reflect this.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
 arch/arm/boot/dts/qcom-msm8974.dtsi | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 9d79b98f18bb..d3fe0c21c6f4 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -52,6 +52,15 @@
 		};
 	};
 
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 2 0xf08>,
+			     <1 3 0xf08>,
+			     <1 4 0xf08>,
+			     <1 1 0xf08>;
+		clock-frequency = <19200000>;
+	};
+
 	soc: soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -66,15 +75,6 @@
 			      <0xf9002000 0x1000>;
 		};
 
-		timer {
-			compatible = "arm,armv7-timer";
-			interrupts = <1 2 0xf08>,
-				     <1 3 0xf08>,
-				     <1 4 0xf08>,
-				     <1 1 0xf08>;
-			clock-frequency = <19200000>;
-		};
-
 		timer at f9020000 {
 			#address-cells = <1>;
 			#size-cells = <1>;
-- 
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hosted by The Linux Foundation

[PATCH] ARM: dts: msm8974: Move arch-timer out of soc node

[Christopher Covington]

Hi Stephen,

On 03/11/2014 05:24 PM, Stephen Boyd wrote:
> The architected timer is not a register addressable piece of
> hardware. Instead it's accessed through cp15 accessors. Move it
> to the root of the devicetree to reflect this.

I find this confusing, perhaps due to overloading of the word "register".
Aren't CP15's a class of coprocessor _registers_? Could it perhaps be clearer
to talk about memory-mapped versus CP15-mapped timers?

Is "soc" documented somewhere or is it just a name for a container? Assuming
the latter, it's not obvious to me why being a child of a system on chip node
would imply having memory mapped registers.

Thanks,
Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.

[PATCH] ARM: dts: msm8974: Move arch-timer out of soc node

[Kumar Gala]

On Mar 17, 2014, at 12:31 PM, Christopher Covington <cov@codeaurora.org> wrote:

> Hi Stephen,
> 
> On 03/11/2014 05:24 PM, Stephen Boyd wrote:
>> The architected timer is not a register addressable piece of
>> hardware. Instead it's accessed through cp15 accessors. Move it
>> to the root of the devicetree to reflect this.
> 
> I find this confusing, perhaps due to overloading of the word "register".
> Aren't CP15's a class of coprocessor _registers_? Could it perhaps be clearer
> to talk about memory-mapped versus CP15-mapped timers?
> 
> Is "soc" documented somewhere or is it just a name for a container? Assuming
> the latter, it's not obvious to me why being a child of a system on chip node
> would imply having memory mapped registers.

?soc? is a container, since its compatible = "simple-bus?, this implies memory mapped register access for nodes inside of it.

- k
-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

[PATCH] ARM: dts: msm8974: Move arch-timer out of soc node

[Christopher Covington]

Hi Kumar,

On 03/17/2014 01:33 PM, Kumar Gala wrote:
> 
> On Mar 17, 2014, at 12:31 PM, Christopher Covington <cov@codeaurora.org> wrote:
> 
>> Hi Stephen,
>>
>> On 03/11/2014 05:24 PM, Stephen Boyd wrote:
>>> The architected timer is not a register addressable piece of
>>> hardware. Instead it's accessed through cp15 accessors. Move it
>>> to the root of the devicetree to reflect this.
>>
>> I find this confusing, perhaps due to overloading of the word "register".
>> Aren't CP15's a class of coprocessor _registers_? Could it perhaps be clearer
>> to talk about memory-mapped versus CP15-mapped timers?
>>
>> Is "soc" documented somewhere or is it just a name for a container? Assuming
>> the latter, it's not obvious to me why being a child of a system on chip node
>> would imply having memory mapped registers.
> 
> ?soc? is a container, since its compatible = "simple-bus?, this implies
> memory mapped register access for nodes inside of it.

That makes sense. Thanks for explaining it.

Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.