From: tixy@linaro.org (Jon Medhurst (Tixy))
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ARM: kprobes: Disallow instructions with PC and register specified shift
Date: Tue, 25 Mar 2014 12:51:13 +0000 [thread overview]
Message-ID: <1395751873.3478.60.camel@linaro1.home> (raw)
In-Reply-To: <53308C48.3070509@linaro.org>
On Mon, 2014-03-24 at 15:49 -0400, David Long wrote:
> On 03/11/14 12:54, Jon Medhurst wrote:
> > ARM data processing instructions which have a register specified shift
> > are defined as UNPREDICTABLE if PC is used for any register, not just
> > the shift value as the code was previous assuming. This issue manifests
> > on A15 devices as either test case failures or undefined instructions
> > aborts.
> >
> > Reported-by: David Long <dave.long@linaro.org>
> > Signed-off-by: Jon Medhurst <tixy@linaro.org>
> > ---
> > arch/arm/kernel/kprobes-test-arm.c | 25 +++++++++++++------------
> > arch/arm/kernel/probes-arm.c | 6 +++---
> > 2 files changed, 16 insertions(+), 15 deletions(-)
> >
> > diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
> > index 87839de..8a7428b 100644
> > --- a/arch/arm/kernel/kprobes-test-arm.c
> > +++ b/arch/arm/kernel/kprobes-test-arm.c
> > @@ -73,12 +73,9 @@ void kprobe_arm_test_cases(void)
> > TEST_RRR( op "lt" s " r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\
> > TEST_RR( op "gt" s " r12, r13" ", r",14,val, ", ror r",14,7,"")\
> > TEST_RR( op "le" s " r14, r",0, val, ", r13" ", lsl r",14,8,"")\
> > - TEST_RR( op s " r12, pc" ", r",14,val, ", ror r",14,7,"")\
> > - TEST_RR( op s " r14, r",0, val, ", pc" ", lsl r",14,8,"")\
> > TEST_R( op "eq" s " r0, r",11,VAL1,", #0xf5") \
> > TEST_R( op "ne" s " r11, r",0, VAL1,", #0xf5000000") \
> > - TEST_R( op s " r7, r",8, VAL2,", #0x000af000") \
> > - TEST( op s " r4, pc" ", #0x00005a00")
>
> The last two lines above confuse me. Can you explain why those needed
> to be removed? Is there somehow a shift involved with those instructions?
>
> The rest looked OK to me. I'm omitting it for the sake of brevity.
The next line in the patch was
+ TEST_R( op s " r7, r",8, VAL2,", #0x000af000")
so the change actually only removed the last test case. However, as you
say, this doesn't involve a shift by a register and so shouldn't have
been removed by this patch, I'll fix that. Thanks for spotting the
error.
--
Tixy
next prev parent reply other threads:[~2014-03-25 12:51 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-11 16:54 [PATCH 0/3] Fixes for kprobes test issues Jon Medhurst
2014-03-11 16:54 ` [PATCH 1/3] ARM: kprobes: Prevent known test failures stopping other tests running Jon Medhurst
2014-03-24 15:18 ` David Long
2014-03-24 16:49 ` Jon Medhurst (Tixy)
2014-03-24 16:56 ` Russell King - ARM Linux
2014-03-24 18:34 ` David Long
2014-03-25 14:02 ` Russell King - ARM Linux
2014-03-25 14:08 ` David Long
2014-03-25 14:20 ` Jon Medhurst (Tixy)
2014-03-11 16:54 ` [PATCH 2/3] ARM: kprobes: Disallow instructions with PC and register specified shift Jon Medhurst
2014-03-24 19:49 ` David Long
2014-03-25 12:51 ` Jon Medhurst (Tixy) [this message]
2014-03-11 16:54 ` [PATCH 3/3] ARM: kprobes: Fix test code compilation errors for ARMv4 targets Jon Medhurst
2014-03-25 13:27 ` David Long
2014-03-25 13:42 ` Arnd Bergmann
2014-03-25 14:54 ` Jon Medhurst (Tixy)
2014-03-25 15:17 ` Arnd Bergmann
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