From mboxrd@z Thu Jan 1 00:00:00 1970 From: p.zabel@pengutronix.de (Philipp Zabel) Date: Mon, 14 Apr 2014 17:37:26 +0200 Subject: [PATCH 04/10] ARM: dts: pfla02: PHY reset is active-low In-Reply-To: <1397489852-1669-1-git-send-email-p.zabel@pengutronix.de> References: <1397489852-1669-1-git-send-email-p.zabel@pengutronix.de> Message-ID: <1397489852-1669-4-git-send-email-p.zabel@pengutronix.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Note that the fec driver code currently hard-codes an active-low reset, regardless of the flags in the device tree. Signed-off-by: Philipp Zabel --- arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi index 7138937..6936177 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi @@ -9,6 +9,8 @@ * http://www.gnu.org/copyleft/gpl.html */ +#include + / { model = "Phytec phyFLEX-i.MX6 Ouad"; compatible = "phytec,imx6q-pfla02", "fsl,imx6q"; @@ -289,7 +291,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; - phy-reset-gpios = <&gpio3 23 0>; + phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; status = "disabled"; }; -- 1.9.1