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From: archit@ti.com (Archit Taneja)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC 3/4] ARM: dts: Add dss_deshdcp clock node under dra7-ctrl-core
Date: Wed, 16 Apr 2014 18:44:22 +0530	[thread overview]
Message-ID: <1397654063-8055-3-git-send-email-archit@ti.com> (raw)
In-Reply-To: <1397654063-8055-1-git-send-email-archit@ti.com>

The DESHDCP clock is required only by the DES-HDCP block within HDMI in DSS.
However, if the clock isn't set before DSS clock domian is enabled, the clock
domain never comes out of idle state.

The DESHDCP clock is enabled/disabled at the DSS boundary by the bit
DSS_DESHDCP_CLKEN in CTRL_CORE_CONTROL_IO_2.

Add dss_deshdcp gate-clock node under dra7-ctrl-core. There are separate bit
fields for enabling and disabling the clock. We just map the enable bit since
this clock doesn't cause any impact if left enabled.

Signed-off-by: Archit Taneja <archit@ti.com>
---
 arch/arm/boot/dts/dra7xx-clocks.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index e96da9a..78d309c 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -2007,6 +2007,16 @@
 	};
 };
 
+&ctrl_core_clocks {
+	dss_deshdcp_clk: dss_deshdcp_clk {
+		#clock-cells = <0>;
+		compatible = "ti,gate-clock";
+		clocks = <&l3_iclk_div>;
+		ti,bit-shift = <0>;
+		reg = <0x0558>;
+	};
+};
+
 &cm_core_clockdomains {
 	coreaon_clkdm: coreaon_clkdm {
 		compatible = "ti,clockdomain";
-- 
1.8.3.2

  parent reply	other threads:[~2014-04-16 13:14 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-16 13:14 [RFC 1/4] ARM: OMAP2+: Add CTRL_MODULE_CORE as a master clock provider for DRA7 Archit Taneja
2014-04-16 13:14 ` [RFC 2/4] ARM: dts: Add ctrl-core DT node " Archit Taneja
2014-04-18 17:18   ` Tony Lindgren
2014-04-21  5:15     ` Archit Taneja
2014-04-21 15:10       ` Tony Lindgren
2014-05-06  5:22         ` Archit Taneja
2014-05-06 14:26           ` Tony Lindgren
2014-05-08  6:02             ` Archit Taneja
2014-05-08  7:53               ` Tero Kristo
2014-05-08  8:16                 ` Archit Taneja
2014-04-16 13:14 ` Archit Taneja [this message]
2014-04-16 13:14 ` [RFC 4/4] CLK: TI: Enable dss_deshdcp clock in dra7xx_clk_init Archit Taneja
2014-05-08  1:19 ` [RFC 1/4] ARM: OMAP2+: Add CTRL_MODULE_CORE as a master clock provider for DRA7 Paul Walmsley

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