[PATCH 0/3] arm64: Default to non-coherent DMA ops

[PATCH 0/3] arm64: Default to non-coherent DMA ops

[Catalin Marinas]

Following recent discussions and patch from Ritesh, I'm planning to
align the default DMA ops with 32-bit arm and make them non-coherent. In
addition, we need to make sure that devices marked explicitly as
coherent use the correct dma ops. Until Santosh's DMA patches get
reviewed/merged, the temporary solution is bus notifiers which check the
"dma-coherent" property and set the right dma ops.

Catalin Marinas (2):
  arm64: Use bus notifiers to set per-device coherent DMA ops
  arm64: Mark the Applied Micro X-Gene SATA controller as DMA coherent

Ritesh Harjani (1):
  arm64: Make default dma_ops to be noncoherent

 .../devicetree/bindings/ata/apm-xgene.txt          |  3 ++
 arch/arm64/boot/dts/apm-storm.dtsi                 |  3 ++
 arch/arm64/kernel/setup.c                          |  2 +-
 arch/arm64/mm/dma-mapping.c                        | 35 ++++++++++++++++++++--
 4 files changed, 40 insertions(+), 3 deletions(-)

[PATCH 1/3] arm64: Make default dma_ops to be noncoherent

[Catalin Marinas]

From: Ritesh Harjani <ritesh.harjani@gmail.com>

Currently arm64 dma_ops is by default made coherent which makes it
opposite in default policy from arm.

Make default dma_ops to be noncoherent (same as arm), as currently there
aren't any dma-capable drivers which assumes coherent ops

Signed-off-by: Ritesh Harjani <ritesh.harjani@gmail.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/mm/dma-mapping.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 0ba347e59f06..1f65963a9c04 100644
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -311,7 +311,7 @@ static int __init swiotlb_late_init(void)
 {
 	size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
 
-	dma_ops = &coherent_swiotlb_dma_ops;
+	dma_ops = &noncoherent_swiotlb_dma_ops;
 
 	return swiotlb_late_init_with_default_size(swiotlb_size);
 }

[PATCH 2/3] arm64: Use bus notifiers to set per-device coherent DMA ops

[Catalin Marinas]

Recently, the default DMA ops have been changed to non-coherent for
alignment with 32-bit ARM platforms (and DT files). This patch adds bus
notifiers to be able to set the coherent DMA ops (with no cache
maintenance) for devices explicitly marked as coherent via the
"dma-coherent" DT property.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---
 arch/arm64/kernel/setup.c   |  2 +-
 arch/arm64/mm/dma-mapping.c | 33 ++++++++++++++++++++++++++++++++-
 2 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 720853f70b6b..b89e4914b7e4 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -397,7 +397,7 @@ static int __init arm64_device_init(void)
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 	return 0;
 }
-arch_initcall(arm64_device_init);
+arch_initcall_sync(arm64_device_init);
 
 static DEFINE_PER_CPU(struct cpu, cpu_data);
 
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 1f65963a9c04..c851eb44dc50 100644
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -22,8 +22,11 @@
 #include <linux/slab.h>
 #include <linux/dma-mapping.h>
 #include <linux/dma-contiguous.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
 #include <linux/vmalloc.h>
 #include <linux/swiotlb.h>
+#include <linux/amba/bus.h>
 
 #include <asm/cacheflush.h>
 
@@ -305,17 +308,45 @@ struct dma_map_ops coherent_swiotlb_dma_ops = {
 };
 EXPORT_SYMBOL(coherent_swiotlb_dma_ops);
 
+static int dma_bus_notifier(struct notifier_block *nb,
+			    unsigned long event, void *_dev)
+{
+	struct device *dev = _dev;
+
+	if (event != BUS_NOTIFY_ADD_DEVICE)
+		return NOTIFY_DONE;
+
+	if (of_property_read_bool(dev->of_node, "dma-coherent"))
+		set_dma_ops(dev, &coherent_swiotlb_dma_ops);
+
+	return NOTIFY_OK;
+}
+
+static struct notifier_block platform_bus_nb = {
+	.notifier_call = dma_bus_notifier,
+};
+
+static struct notifier_block amba_bus_nb = {
+	.notifier_call = dma_bus_notifier,
+};
+
 extern int swiotlb_late_init_with_default_size(size_t default_size);
 
 static int __init swiotlb_late_init(void)
 {
 	size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
 
+	/*
+	 * These must be registered before of_platform_populate().
+	 */
+	bus_register_notifier(&platform_bus_type, &platform_bus_nb);
+	bus_register_notifier(&amba_bustype, &amba_bus_nb);
+
 	dma_ops = &noncoherent_swiotlb_dma_ops;
 
 	return swiotlb_late_init_with_default_size(swiotlb_size);
 }
-subsys_initcall(swiotlb_late_init);
+arch_initcall(swiotlb_late_init);
 
 #define PREALLOC_DMA_DEBUG_ENTRIES	4096
 

[PATCH 3/3] arm64: Mark the Applied Micro X-Gene SATA controller as DMA coherent

[Catalin Marinas]

Since the default DMA ops for arm64 are non-coherent, mark the X-Gene
controller explicitly as dma-coherent to avoid additional cache
maintenance.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Loc Ho <lho@apm.com>
---
 Documentation/devicetree/bindings/ata/apm-xgene.txt | 3 +++
 arch/arm64/boot/dts/apm-storm.dtsi                  | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt
index 7bcfbf59810e..a668f0e7d001 100644
--- a/Documentation/devicetree/bindings/ata/apm-xgene.txt
+++ b/Documentation/devicetree/bindings/ata/apm-xgene.txt
@@ -24,6 +24,7 @@ Required properties:
   * "sata-phy" for the SATA 6.0Gbps PHY
 
 Optional properties:
+- dma-coherent		: Present if dma operations are coherent
 - status		: Shall be "ok" if enabled or "disabled" if disabled.
 			  Default is "ok".
 
@@ -55,6 +56,7 @@ Example:
 			      <0x0 0x1f22e000 0x0 0x1000>,
 			      <0x0 0x1f227000 0x0 0x1000>;
 			interrupts = <0x0 0x87 0x4>;
+			dma-coherent;
 			status = "ok";
 			clocks = <&sataclk 0>;
 			phys = <&phy2 0>;
@@ -69,6 +71,7 @@ Example:
 			      <0x0 0x1f23e000 0x0 0x1000>,
 			      <0x0 0x1f237000 0x0 0x1000>;
 			interrupts = <0x0 0x88 0x4>;
+			dma-coherent;
 			status = "ok";
 			clocks = <&sataclk 0>;
 			phys = <&phy3 0>;
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi
index 93f4b2dd9248..f8c40a66e65d 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -307,6 +307,7 @@
 			      <0x0 0x1f21e000 0x0 0x1000>,
 			      <0x0 0x1f217000 0x0 0x1000>;
 			interrupts = <0x0 0x86 0x4>;
+			dma-coherent;
 			status = "disabled";
 			clocks = <&sata01clk 0>;
 			phys = <&phy1 0>;
@@ -321,6 +322,7 @@
 			      <0x0 0x1f22e000 0x0 0x1000>,
 			      <0x0 0x1f227000 0x0 0x1000>;
 			interrupts = <0x0 0x87 0x4>;
+			dma-coherent;
 			status = "ok";
 			clocks = <&sata23clk 0>;
 			phys = <&phy2 0>;
@@ -334,6 +336,7 @@
 			      <0x0 0x1f23d000 0x0 0x1000>,
 			      <0x0 0x1f23e000 0x0 0x1000>;
 			interrupts = <0x0 0x88 0x4>;
+			dma-coherent;
 			status = "ok";
 			clocks = <&sata45clk 0>;
 			phys = <&phy3 0>;

[PATCH 0/3] arm64: Default to non-coherent DMA ops

[Rob Herring]

On Fri, Apr 25, 2014 at 12:34 PM, Catalin Marinas
<catalin.marinas@arm.com> wrote:
> Following recent discussions and patch from Ritesh, I'm planning to
> align the default DMA ops with 32-bit arm and make them non-coherent. In
> addition, we need to make sure that devices marked explicitly as
> coherent use the correct dma ops. Until Santosh's DMA patches get
> reviewed/merged, the temporary solution is bus notifiers which check the
> "dma-coherent" property and set the right dma ops.

Is this for 3.15? If not, don't you think Santosh's patches will be
ready for 3.16. I need to take another look, but I'm pretty much happy
with them. My only issue really is whether we want to spread the use
of dma-coherent. Will did call my cute little property a hack, but I
have yet to see anything better.

Rob

[PATCH 0/3] arm64: Default to non-coherent DMA ops

[Catalin Marinas]

On 25 Apr 2014, at 19:19, Rob Herring <robherring2@gmail.com> wrote:
> On Fri, Apr 25, 2014 at 12:34 PM, Catalin Marinas
> <catalin.marinas@arm.com> wrote:
>> Following recent discussions and patch from Ritesh, I'm planning to
>> align the default DMA ops with 32-bit arm and make them non-coherent. In
>> addition, we need to make sure that devices marked explicitly as
>> coherent use the correct dma ops. Until Santosh's DMA patches get
>> reviewed/merged, the temporary solution is bus notifiers which check the
>> "dma-coherent" property and set the right dma ops.
> 
> Is this for 3.15? If not, don't you think Santosh's patches will be
> ready for 3.16.

I initially only wanted to push the default non-coherent patch in 3.15
(first in this series) before more people assume the DMA is coherent.
But since the xgene sata driver is already merged and expects coherent
DMA, I came up with this workaround (inspired by highbank ;)). It?s
not that the first patch breaks its functionality, it just makes it
slower.

> I need to take another look, but I'm pretty much happy
> with them. My only issue really is whether we want to spread the use
> of dma-coherent. Will did call my cute little property a hack, but I
> have yet to see anything better.

I agree, it?s the best we have so far. Maybe at some point we get
proper system topology description and we can treat ?dma-coherent?
as legacy property (but still support it). For arm64 we?ll soon need
to also describe whether iommu ops are needed and that?s no longer a
simple property.

Catalin