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From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/5] ARM: mvebu: conditionalize Armada 375 SMP workaround
Date: Mon,  5 May 2014 16:20:30 +0200	[thread overview]
Message-ID: <1399299631-30825-5-git-send-email-thomas.petazzoni@free-electrons.com> (raw)
In-Reply-To: <1399299631-30825-1-git-send-email-thomas.petazzoni@free-electrons.com>

The Armada 375 SMP workaround only needs to be applied to the Z1
revision of the SoC. The A0 and later revisions have been fixed, and
no longer need this workaround.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/arm/mach-mvebu/platsmp-a9.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-mvebu/platsmp-a9.c b/arch/arm/mach-mvebu/platsmp-a9.c
index 04d0b18..6038c1d 100644
--- a/arch/arm/mach-mvebu/platsmp-a9.c
+++ b/arch/arm/mach-mvebu/platsmp-a9.c
@@ -20,6 +20,7 @@
 #include <asm/smp_scu.h>
 #include <asm/smp_plat.h>
 #include "common.h"
+#include "mvebu-soc-id.h"
 #include "pmsu.h"
 
 #define CRYPT0_ENG_ID   41
@@ -53,8 +54,6 @@ static int __cpuinit mvebu_cortex_a9_boot_secondary(unsigned int cpu,
 {
 	int ret, hw_cpu;
 
-	pr_info("Booting CPU %d\n", cpu);
-
 	/*
 	 * Write the address of secondary startup into the system-wide
 	 * flags register. The boot monitor waits until it receives a
@@ -63,11 +62,19 @@ static int __cpuinit mvebu_cortex_a9_boot_secondary(unsigned int cpu,
 	 */
 	hw_cpu = cpu_logical_map(cpu);
 
-	if (of_machine_is_compatible("marvell,armada375"))
+	if (of_machine_is_compatible("marvell,armada375")) {
+		u32 dev, rev;
+
+		if (mvebu_get_soc_id(&dev, &rev) == 0 &&
+		    rev == ARMADA_375_Z1_REV)
+			armada_375_smp_cpu1_enable_wa();
+
 		mvebu_system_controller_set_cpu_boot_addr(mvebu_cortex_a9_secondary_startup);
-	else
+	}
+	else {
 		mvebu_pmsu_set_cpu_boot_addr(hw_cpu,
 					     mvebu_cortex_a9_secondary_startup);
+	}
 
 	smp_wmb();
 	ret = mvebu_cpu_reset_deassert(hw_cpu);
@@ -80,14 +87,7 @@ static int __cpuinit mvebu_cortex_a9_boot_secondary(unsigned int cpu,
 	return 0;
 }
 
-static void __init mvebu_cortex_a9_smp_prepare_cpus(unsigned int max_cpus)
-{
-	if (of_machine_is_compatible("marvell,armada375"))
-		armada_375_smp_cpu1_enable_wa();
-}
-
 static struct smp_operations mvebu_cortex_a9_smp_ops __initdata = {
-	.smp_prepare_cpus	= mvebu_cortex_a9_smp_prepare_cpus,
 	.smp_boot_secondary	= mvebu_cortex_a9_boot_secondary,
 #ifdef CONFIG_HOTPLUG_CPU
 	.cpu_die		= armada_xp_cpu_die,
-- 
1.9.2

  parent reply	other threads:[~2014-05-05 14:20 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-05 14:20 [PATCH 0/5] ARM: mvebu: fixes and improvements for 375 support Thomas Petazzoni
2014-05-05 14:20 ` [PATCH 1/5] ARM: mvebu: fix thermal quirk SoC revision check Thomas Petazzoni
2014-05-05 14:32   ` Ezequiel Garcia
2014-05-05 14:20 ` [PATCH 2/5] ARM: mvebu: initialize mvebu-soc-id earlier Thomas Petazzoni
2014-05-05 14:20 ` [PATCH 3/5] ARM: mvebu: add Armada 375 A0 revision definition Thomas Petazzoni
2014-05-05 14:20 ` Thomas Petazzoni [this message]
2014-05-05 14:20 ` [PATCH 5/5] ARM: mvebu: conditionalize Armada 375 coherency workaround Thomas Petazzoni

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