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* [PATCH] irqchip: brcmstb-l2: Level-2 interrupts are edge sensitive
@ 2014-06-09 18:05 Florian Fainelli
  2014-06-12 19:13 ` Florian Fainelli
  2014-06-21  2:09 ` Jason Cooper
  0 siblings, 2 replies; 6+ messages in thread
From: Florian Fainelli @ 2014-06-09 18:05 UTC (permalink / raw)
  To: linux-arm-kernel

The driver was configuring the interrupt handler for the Level-2
interrupts to be "level" triggered while they are in fact "edge"
triggered. Fix this by using the correct handler.

Reported-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/irqchip/irq-brcmstb-l2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-brcmstb-l2.c b/drivers/irqchip/irq-brcmstb-l2.c
index 8ee2a36d5840..c15c840987d2 100644
--- a/drivers/irqchip/irq-brcmstb-l2.c
+++ b/drivers/irqchip/irq-brcmstb-l2.c
@@ -150,7 +150,7 @@ int __init brcmstb_l2_intc_of_init(struct device_node *np,
 
 	/* Allocate a single Generic IRQ chip for this node */
 	ret = irq_alloc_domain_generic_chips(data->domain, 32, 1,
-				np->full_name, handle_level_irq, clr, 0, 0);
+				np->full_name, handle_edge_irq, clr, 0, 0);
 	if (ret) {
 		pr_err("failed to allocate generic irq chip\n");
 		goto out_free_domain;
-- 
1.9.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2014-06-21  2:09 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-06-09 18:05 [PATCH] irqchip: brcmstb-l2: Level-2 interrupts are edge sensitive Florian Fainelli
2014-06-12 19:13 ` Florian Fainelli
2014-06-20 18:26   ` Florian Fainelli
2014-06-20 18:48     ` Jason Cooper
2014-06-20 22:09     ` Thomas Gleixner
2014-06-21  2:09 ` Jason Cooper

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