* [PATCH 2/3] ata: Add Qualcomm ARM SoC AHCI SATA host controller driver
2014-06-12 19:13 [PATCH 1/3] ahci-platform: Bump max number of clocks to 5 Kumar Gala
@ 2014-06-12 19:13 ` Kumar Gala
2014-06-12 19:50 ` Stephen Boyd
2014-06-13 14:38 ` Stanimir Varbanov
2014-06-12 19:13 ` [PATCH 3/3] ata: qcom: Add device tree bindings information Kumar Gala
1 sibling, 2 replies; 7+ messages in thread
From: Kumar Gala @ 2014-06-12 19:13 UTC (permalink / raw)
To: linux-arm-kernel
Add support for the Qualcomm AHCI SATA controller that exists on several
SoC and specifically the IPQ806x family of chips. The IPQ806x SATA support
requires the associated IPQ806x SATA PHY Driver to be enabled as well.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
---
drivers/ata/Kconfig | 10 ++++++
drivers/ata/Makefile | 1 +
drivers/ata/ahci_qcom.c | 86 +++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 97 insertions(+)
create mode 100644 drivers/ata/ahci_qcom.c
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 7671dba..aa88648 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -132,6 +132,16 @@ config AHCI_MVEBU
If unsure, say N.
+config AHCI_QCOM
+ tristate "Qualcomm AHCI SATA support"
+ depends on ARCH_QCOM
+ help
+ This option enables support for AHCI SATA controller
+ integrated into Qualcomm ARM SoC chipsets. For more
+ information please refer to http://www.qualcomm.com/chipsets.
+
+ If unsure, say N.
+
config AHCI_SUNXI
tristate "Allwinner sunxi AHCI SATA support"
depends on ARCH_SUNXI
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 5a02aee..15401e9 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o
obj-$(CONFIG_AHCI_DA850) += ahci_da850.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o libahci.o libahci_platform.o
+obj-$(CONFIG_AHCI_QCOM) += ahci_qcom.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_SUNXI) += ahci_sunxi.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_ST) += ahci_st.o libahci.o libahci_platform.o
obj-$(CONFIG_AHCI_XGENE) += ahci_xgene.o libahci.o libahci_platform.o
diff --git a/drivers/ata/ahci_qcom.c b/drivers/ata/ahci_qcom.c
new file mode 100644
index 0000000..7a4fd30
--- /dev/null
+++ b/drivers/ata/ahci_qcom.c
@@ -0,0 +1,86 @@
+/*
+ * Qualcomm ARM SoC AHCI SATA platform driver
+ *
+ * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
+ *
+ * Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pm.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/libata.h>
+#include <linux/ahci_platform.h>
+#include "ahci.h"
+
+static const struct ata_port_info qcom_ahci_port_info = {
+ .flags = AHCI_FLAG_COMMON,
+ .pio_mask = ATA_PIO4,
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &ahci_platform_ops,
+};
+
+static int qcom_ahci_probe(struct platform_device *pdev)
+{
+ struct ahci_host_priv *hpriv;
+ struct clk *rxoob_clk;
+ int rc;
+
+ hpriv = ahci_platform_get_resources(pdev);
+ if (IS_ERR(hpriv))
+ return PTR_ERR(hpriv);
+
+ /* Try and set the rxoob clk to 100Mhz */
+ rxoob_clk = of_clk_get_by_name(pdev->dev.of_node, "rxoob");
+ if (IS_ERR(rxoob_clk))
+ return PTR_ERR(rxoob_clk);
+
+ rc = clk_set_rate(rxoob_clk, 100000000);
+ if (rc)
+ return rc;
+
+ rc = ahci_platform_enable_resources(hpriv);
+ if (rc)
+ return rc;
+
+ rc = ahci_platform_init_host(pdev, hpriv, &qcom_ahci_port_info, 0, 0);
+ if (rc)
+ goto disable_resources;
+
+ return 0;
+disable_resources:
+ ahci_platform_disable_resources(hpriv);
+ return rc;
+}
+
+static const struct of_device_id qcom_ahci_of_match[] = {
+ { .compatible = "qcom,msm-ahci", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, qcom_ahci_of_match);
+
+static struct platform_driver qcom_ahci_driver = {
+ .probe = qcom_ahci_probe,
+ .remove = ata_platform_remove_one,
+ .driver = {
+ .name = "qcom_ahci_qcom",
+ .owner = THIS_MODULE,
+ .of_match_table = qcom_ahci_of_match,
+ },
+};
+module_platform_driver(qcom_ahci_driver);
+
+MODULE_DESCRIPTION("Qualcomm AHCI SATA platform driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("ahci:qcom");
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/3] ata: qcom: Add device tree bindings information
2014-06-12 19:13 [PATCH 1/3] ahci-platform: Bump max number of clocks to 5 Kumar Gala
2014-06-12 19:13 ` [PATCH 2/3] ata: Add Qualcomm ARM SoC AHCI SATA host controller driver Kumar Gala
@ 2014-06-12 19:13 ` Kumar Gala
1 sibling, 0 replies; 7+ messages in thread
From: Kumar Gala @ 2014-06-12 19:13 UTC (permalink / raw)
To: linux-arm-kernel
Add device tree binding for Qualcomm AHCI SATA controller and specifically
the sata controller on the IPQ806x family of SoCs.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
---
.../devicetree/bindings/ata/qcom-sata.txt | 40 ++++++++++++++++++++++
1 file changed, 40 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ata/qcom-sata.txt
diff --git a/Documentation/devicetree/bindings/ata/qcom-sata.txt b/Documentation/devicetree/bindings/ata/qcom-sata.txt
new file mode 100644
index 0000000..5e74e41
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/qcom-sata.txt
@@ -0,0 +1,40 @@
+* Qualcomm AHCI SATA Controller
+
+SATA nodes are defined to describe on-chip Serial ATA controllers.
+Each SATA controller should have its own node.
+
+Required properties:
+- compatible : compatible list, contains "qcom,msm-ahci"
+- interrupts : <interrupt mapping for SATA IRQ>
+- reg : <registers mapping>
+- phys : Must contain exactly one entry as specified
+ in phy-bindings.txt
+- phy-names : Must be "sata-phy"
+
+Required properties for "qcom,ipq806x-ahci" compatible:
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Shall be:
+ "slave_iface" - Fabric port AHB clock for SATA
+ "iface" - AHB clock
+ "core" - core clock
+ "rxoob" - RX out-of-band clock
+ "pmalive" - Power Module Alive clock
+
+Example:
+ sata at 29000000 {
+ compatible = "qcom,ipq806x-ahci", "qcom,msm-ahci";
+ reg = <0x29000000 0x180>;
+
+ interrupts = <0 209 0x0>;
+
+ clocks = <&gcc SFAB_SATA_S_H_CLK>,
+ <&gcc SATA_H_CLK>,
+ <&gcc SATA_A_CLK>,
+ <&gcc SATA_RXOOB_CLK>,
+ <&gcc SATA_PMALIVE_CLK>;
+ clock-names = "slave_iface", "iface", "core",
+ "rxoob", "pmalive";
+
+ phys = <&sata_phy>;
+ phy-names = "sata-phy";
+ };
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation
^ permalink raw reply related [flat|nested] 7+ messages in thread