From mboxrd@z Thu Jan 1 00:00:00 1970 From: mperttunen@nvidia.com (Mikko Perttunen) Date: Wed, 18 Jun 2014 17:23:21 +0300 Subject: [PATCH v2 2/7] ARM: tegra: Add SATA controller to Tegra124 device tree In-Reply-To: <1403101406-15439-1-git-send-email-mperttunen@nvidia.com> References: <1403101406-15439-1-git-send-email-mperttunen@nvidia.com> Message-ID: <1403101406-15439-3-git-send-email-mperttunen@nvidia.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This adds the integrated AHCI-compliant Serial ATA controller present in Tegra124 systems-on-chip to the Tegra124 device tree. Signed-off-by: Mikko Perttunen --- v2: - added clock-names property - changed 0 -> GIC_SPI arch/arm/boot/dts/tegra124.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 6fa06d2..63a2bfa 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -734,6 +734,31 @@ status = "disabled"; }; + sata at 0,70020000 { + compatible = "nvidia,tegra124-ahci"; + + reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ + <0x0 0x70020000 0x0 0x7000>; /* SATA */ + + interrupts = ; + + clocks = <&tegra_car TEGRA124_CLK_SATA>, + <&tegra_car TEGRA124_CLK_SATA_OOB>, + <&tegra_car TEGRA124_CLK_CML1>, + <&tegra_car TEGRA124_CLK_PLL_E>; + clock-names = "sata", "sata-oob", "cml1", "pll_e"; + + resets = <&tegra_car 124>, + <&tegra_car 123>, + <&tegra_car 129>; + reset-names = "sata", "sata-oob", "sata-cold"; + + phys = <&padctl TEGRA_XUSB_PADCTL_SATA>; + phy-names = "sata-phy"; + + status = "disabled"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; -- 1.8.1.5