From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 09/20] KVM: ARM: vgic: abstract MISR decoding
Date: Thu, 19 Jun 2014 10:19:32 +0100 [thread overview]
Message-ID: <1403169583-13668-10-git-send-email-marc.zyngier@arm.com> (raw)
In-Reply-To: <1403169583-13668-1-git-send-email-marc.zyngier@arm.com>
Instead of directly dealing with the GICH_MISR bits, move the code to
its own function and use a couple of public flags to represent the
actual state.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
include/kvm/arm_vgic.h | 4 ++++
virt/kvm/arm/vgic.c | 26 +++++++++++++++++++++++---
2 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index ccb9b59..4857508 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -87,6 +87,7 @@ struct vgic_ops {
void (*sync_lr_elrsr)(struct kvm_vcpu *, int, struct vgic_lr);
u64 (*get_elrsr)(const struct kvm_vcpu *vcpu);
u64 (*get_eisr)(const struct kvm_vcpu *vcpu);
+ u32 (*get_interrupt_status)(const struct kvm_vcpu *vcpu);
};
struct vgic_dist {
@@ -165,6 +166,9 @@ struct vgic_cpu {
#define LR_EMPTY 0xff
+#define INT_STATUS_EOI (1 << 0)
+#define INT_STATUS_UNDERFLOW (1 << 1)
+
struct kvm;
struct kvm_vcpu;
struct kvm_run;
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 0d9701c..9491c22 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -1034,12 +1034,26 @@ static u64 vgic_v2_get_eisr(const struct kvm_vcpu *vcpu)
return *(u64 *)eisr;
}
+static u32 vgic_v2_get_interrupt_status(const struct kvm_vcpu *vcpu)
+{
+ u32 misr = vcpu->arch.vgic_cpu.vgic_v2.vgic_misr;
+ u32 ret = 0;
+
+ if (misr & GICH_MISR_EOI)
+ ret |= INT_STATUS_EOI;
+ if (misr & GICH_MISR_U)
+ ret |= INT_STATUS_UNDERFLOW;
+
+ return ret;
+}
+
static const struct vgic_ops vgic_ops = {
.get_lr = vgic_v2_get_lr,
.set_lr = vgic_v2_set_lr,
.sync_lr_elrsr = vgic_v2_sync_lr_elrsr,
.get_elrsr = vgic_v2_get_elrsr,
.get_eisr = vgic_v2_get_eisr,
+ .get_interrupt_status = vgic_v2_get_interrupt_status,
};
static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr)
@@ -1069,6 +1083,11 @@ static inline u64 vgic_get_eisr(struct kvm_vcpu *vcpu)
return vgic_ops.get_eisr(vcpu);
}
+static inline u32 vgic_get_interrupt_status(struct kvm_vcpu *vcpu)
+{
+ return vgic_ops.get_interrupt_status(vcpu);
+}
+
static void vgic_retire_lr(int lr_nr, int irq, struct kvm_vcpu *vcpu)
{
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
@@ -1266,11 +1285,12 @@ epilog:
static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
{
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
+ u32 status = vgic_get_interrupt_status(vcpu);
bool level_pending = false;
- kvm_debug("MISR = %08x\n", vgic_cpu->vgic_v2.vgic_misr);
+ kvm_debug("STATUS = %08x\n", status);
- if (vgic_cpu->vgic_v2.vgic_misr & GICH_MISR_EOI) {
+ if (status & INT_STATUS_EOI) {
/*
* Some level interrupts have been EOIed. Clear their
* active bit.
@@ -1303,7 +1323,7 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
}
}
- if (vgic_cpu->vgic_v2.vgic_misr & GICH_MISR_U)
+ if (status & INT_STATUS_UNDERFLOW)
vgic_cpu->vgic_v2.vgic_hcr &= ~GICH_HCR_UIE;
return level_pending;
--
1.8.3.4
next prev parent reply other threads:[~2014-06-19 9:19 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-19 9:19 [PATCH v5 00/20] arm64: GICv3 support Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 01/20] ARM: GIC: move some bits of GICv2 to a library-type file Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 02/20] arm64: initial support for GICv3 Marc Zyngier
2014-06-20 10:02 ` Mark Rutland
2014-06-20 10:21 ` Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 03/20] arm64: GICv3 device tree binding documentation Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 04/20] arm64: boot protocol documentation update for GICv3 Marc Zyngier
2014-06-19 14:01 ` Mark Rutland
2014-06-19 18:40 ` Marc Zyngier
2014-06-20 8:54 ` Mark Rutland
2014-06-19 9:19 ` [PATCH v5 05/20] KVM: arm/arm64: vgic: move GICv2 registers to their own structure Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 06/20] KVM: ARM: vgic: introduce vgic_ops and LR manipulation primitives Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 07/20] KVM: ARM: vgic: abstract access to the ELRSR bitmap Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 08/20] KVM: ARM: vgic: abstract EISR bitmap access Marc Zyngier
2014-06-19 9:19 ` Marc Zyngier [this message]
2014-06-19 9:19 ` [PATCH v5 10/20] KVM: ARM: vgic: move underflow handling to vgic_ops Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 11/20] KVM: ARM: vgic: abstract VMCR access Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 12/20] KVM: ARM: vgic: introduce vgic_enable Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 13/20] KVM: ARM: introduce vgic_params structure Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 14/20] KVM: ARM: vgic: split GICv2 backend from the main vgic code Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 15/20] KVM: ARM: vgic: revisit implementation of irqchip_in_kernel Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 16/20] arm64: KVM: remove __kvm_hyp_code_{start, end} from hyp.S Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 17/20] arm64: KVM: split GICv2 world switch from hyp code Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 18/20] arm64: KVM: move HCR_EL2.{IMO, FMO} manipulation into the vgic switch code Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 19/20] KVM: ARM: vgic: add the GICv3 backend Marc Zyngier
2014-06-19 9:19 ` [PATCH v5 20/20] arm64: KVM: vgic: add GICv3 world switch Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1403169583-13668-10-git-send-email-marc.zyngier@arm.com \
--to=marc.zyngier@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).