From: ard.biesheuvel@linaro.org (Ard Biesheuvel)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] arm64: fix typo in I-cache policy detection
Date: Mon, 4 Aug 2014 10:16:54 +0200 [thread overview]
Message-ID: <1407140216-22747-1-git-send-email-ard.biesheuvel@linaro.org> (raw)
This removes an unfortunately placed semi-colon resulting in all instruction
caches being classified as AIVIVT.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
arch/arm64/kernel/cpuinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index f82f7d1c468e..744fad2ff418 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -49,7 +49,7 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
if (l1ip != ICACHE_POLICY_PIPT)
set_bit(ICACHEF_ALIASING, &__icache_flags);
- if (l1ip == ICACHE_POLICY_AIVIVT);
+ if (l1ip == ICACHE_POLICY_AIVIVT)
set_bit(ICACHEF_AIVIVT, &__icache_flags);
pr_info("Detected %s I-cache on CPU%d", icache_policy_str[l1ip], cpu);
--
1.8.3.2
next reply other threads:[~2014-08-04 8:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-04 8:16 Ard Biesheuvel [this message]
2014-08-04 8:16 ` [PATCH 2/3] arm64: add helper functions to read I-cache attributes Ard Biesheuvel
2014-08-04 9:58 ` Mark Rutland
2014-08-04 10:38 ` Ard Biesheuvel
2014-08-04 8:16 ` [PATCH 3/3] arm64: don't flag non-aliasing VIPT I-caches as aliasing Ard Biesheuvel
2014-08-04 9:06 ` [PATCH 1/3] arm64: fix typo in I-cache policy detection Mark Rutland
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