[PATCH v2 0/4] arm: mediatek: Add support for GIC interrupt polarity extension.

[PATCH v2 0/4] arm: mediatek: Add support for GIC interrupt polarity extension.

[Joe.C]

This series add support for mediatek GIC interrupt polarity extension.
Several components in mediatek SoC have low level triggered interrupt and
require this support.

This also correct 6589 timer irq polarity. Previous version works because
6589 boot loader already set correct polarity for timer interrupt.

The patch set is based on Matthias's Mediatek basic support for v3.17 [1].

v2:
- Make mt6589.dtsi changes as a separate commit as Matthias suggest.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/272561.html

Joe.C (4):
  irqchip: gic: Change irq type check when extension is
  arm: mediatek: Add support for GIC interrupt polarity
  arm: mediatek: Add intpol in mt6589.dtsi
  dt-bindings: add bindings for mediatek intpol

 Documentation/devicetree/bindings/interrupt-controller/mediatek,intpol.txt |   16 ++
 arch/arm/boot/dts/mt6589.dtsi                                              |    7 -
 arch/arm/mach-mediatek/Makefile                                            |    2
 arch/arm/mach-mediatek/common.h                                            |   19 +++
 arch/arm/mach-mediatek/intpol.c                                            |   61 ++++++++++
 arch/arm/mach-mediatek/mediatek.c                                          |   10 +
 drivers/irqchip/irq-gic.c                                                  |   27 ++--
 7 files changed, 131 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mediatek,intpol.txt
 create mode 100644 arch/arm/mach-mediatek/common.h
 create mode 100644 arch/arm/mach-mediatek/intpol.c

[PATCH v2 1/4] irqchip: gic: Change irq type check when extension is present

[Joe.C]

From: "Joe.C" <yingjoe.chen@mediatek.com>

GIC supports the combination with external extensions. But this
is not reflected in the checks of the interrupt type flag.
This patch allows interrupt types other than the one supported by GIC,
if an architecture extension is present and supports them.

Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
---
 drivers/irqchip/irq-gic.c | 27 ++++++++++++++++++---------
 1 file changed, 18 insertions(+), 9 deletions(-)

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 57d165e..66485ab 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -194,23 +194,32 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
 	u32 confoff = (gicirq / 16) * 4;
 	bool enabled = false;
 	u32 val;
+	int ret = 0;
 
 	/* Interrupt configuration for SGIs can't be changed */
 	if (gicirq < 16)
 		return -EINVAL;
 
-	if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING)
-		return -EINVAL;
-
 	raw_spin_lock(&irq_controller_lock);
 
-	if (gic_arch_extn.irq_set_type)
-		gic_arch_extn.irq_set_type(d, type);
+	if (gic_arch_extn.irq_set_type) {
+		ret = gic_arch_extn.irq_set_type(d, type);
+		if (ret)
+			goto out;
+	} else if (type != IRQ_TYPE_LEVEL_HIGH &&
+		type != IRQ_TYPE_EDGE_RISING) {
+			ret = -EINVAL;
+			goto out;
+	}
 
 	val = readl_relaxed(base + GIC_DIST_CONFIG + confoff);
-	if (type == IRQ_TYPE_LEVEL_HIGH)
+	/* Check for both edge and level here, so we can support GIC irq
+	   polarity extension in gic_arch_extn.irq_set_type. If arch
+	   doesn't support polarity extension, the check above will reject
+	   improper type. */
+	if (type & IRQ_TYPE_LEVEL_MASK)
 		val &= ~confmask;
-	else if (type == IRQ_TYPE_EDGE_RISING)
+	else if (type & IRQ_TYPE_EDGE_BOTH)
 		val |= confmask;
 
 	/*
@@ -226,10 +235,10 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
 
 	if (enabled)
 		writel_relaxed(enablemask, base + GIC_DIST_ENABLE_SET + enableoff);
-
+out:
 	raw_spin_unlock(&irq_controller_lock);
 
-	return 0;
+	return ret;
 }
 
 static int gic_retrigger(struct irq_data *d)
-- 
1.8.1.1.dirty

[PATCH v2 2/4] arm: mediatek: Add support for GIC interrupt polarity extension.

[Joe.C]

From: "Joe.C" <yingjoe.chen@mediatek.com>

Mediatek SoCs have an interrupt polarity extension which allows
to swap the polarity for given interrupts.

Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
---
 arch/arm/mach-mediatek/Makefile   |  2 +-
 arch/arm/mach-mediatek/common.h   | 19 ++++++++++++
 arch/arm/mach-mediatek/intpol.c   | 61 +++++++++++++++++++++++++++++++++++++++
 arch/arm/mach-mediatek/mediatek.c | 10 +++++++
 4 files changed, 91 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-mediatek/common.h
 create mode 100644 arch/arm/mach-mediatek/intpol.c

diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
index 43e619f..82c39d8 100644
--- a/arch/arm/mach-mediatek/Makefile
+++ b/arch/arm/mach-mediatek/Makefile
@@ -1 +1 @@
-obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
+obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o intpol.o
diff --git a/arch/arm/mach-mediatek/common.h b/arch/arm/mach-mediatek/common.h
new file mode 100644
index 0000000..8f2bbeb
--- /dev/null
+++ b/arch/arm/mach-mediatek/common.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2014 Mediatek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __MEDIATEK_COMMON_H__
+#define __MEDIATEK_COMMON_H__
+
+extern char init_intpol(void);
+
+#endif /* __MEDIATEK_COMMON_H__ */
diff --git a/arch/arm/mach-mediatek/intpol.c b/arch/arm/mach-mediatek/intpol.c
new file mode 100644
index 0000000..65ccc7c
--- /dev/null
+++ b/arch/arm/mach-mediatek/intpol.c
@@ -0,0 +1,61 @@
+/*
+ * This file contains common code that is intended to be used across
+ * boards so that it's not replicated.
+ *
+ * Copyright (C) 2014 Mediatek Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/irqchip/arm-gic.h>
+
+#define GIC_HW_IRQ_BASE  32
+#define INT_POL_INDEX(a)   ((a) - GIC_HW_IRQ_BASE)
+
+static void __iomem *int_pol_base;
+
+static int mtk_int_pol_set_type(struct irq_data *d, unsigned int type)
+{
+	unsigned int irq = d->hwirq;
+	u32 offset, reg_index, value;
+
+	offset = INT_POL_INDEX(irq) & 0x1F;
+	reg_index = INT_POL_INDEX(irq) >> 5;
+
+	/* This arch extension was called with irq_controller_lock held,
+	   so the read-modify-write will be atomic */
+	value = readl(int_pol_base + reg_index * 4);
+	if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING)
+		value |= (1 << offset);
+	else
+		value &= ~(1 << offset);
+	writel(value, int_pol_base + reg_index * 4);
+
+	return 0;
+}
+
+void init_intpol(void)
+{
+	struct device_node *node;
+
+	node = of_find_compatible_node(NULL, NULL, "mediatek,mt6577-intpol");
+	if (!node)
+		return;
+
+	int_pol_base = of_io_request_and_map(node, 0, "intpol");
+	if (IS_ERR(int_pol_base)) {
+		pr_warn("Can't get resource\n");
+		return;
+	}
+
+	gic_arch_extn.irq_set_type = mtk_int_pol_set_type;
+}
diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
index 48051a2..aa10c70 100644
--- a/arch/arm/mach-mediatek/mediatek.c
+++ b/arch/arm/mach-mediatek/mediatek.c
@@ -16,6 +16,15 @@
  */
 #include <linux/init.h>
 #include <asm/mach/arch.h>
+#include <linux/irqchip.h>
+
+#include "common.h"
+
+static void __init mediatek_init_irq(void)
+{
+	init_intpol();
+	irqchip_init();
+}
 
 static const char * const mediatek_board_dt_compat[] = {
 	"mediatek,mt6589",
@@ -26,4 +35,5 @@ static const char * const mediatek_board_dt_compat[] = {
 
 DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
 	.dt_compat	= mediatek_board_dt_compat,
+	.init_irq       = mediatek_init_irq,
 MACHINE_END
-- 
1.8.1.1.dirty

[PATCH v2 3/4] arm: mediatek: Add intpol in mt6589.dtsi

[Joe.C]

From: "Joe.C" <yingjoe.chen@mediatek.com>

Add intpol settings for mt6589.
This also correct timer interrupt flag setting. The old setting
works because 6589 boot loader already set polarity for time
interrupt. Without intpol support, the setting was not changed
so gic can get the irq correctly.

Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
---
 arch/arm/boot/dts/mt6589.dtsi | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
index d0297a0..18df47f 100644
--- a/arch/arm/boot/dts/mt6589.dtsi
+++ b/arch/arm/boot/dts/mt6589.dtsi
@@ -76,11 +76,16 @@
 		timer: timer at 10008000 {
 			compatible = "mediatek,mt6577-timer";
 			reg = <0x10008000 0x80>;
-			interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
 			clocks = <&system_clk>, <&rtc_clk>;
 			clock-names = "system-clk", "rtc-clk";
 		};
 
+		intpol: intpol at 10200100 {
+			compatible = "mediatek,mt6577-intpol";
+			reg = <0x10200100 0x1c>;
+		};
+
 		gic: interrupt-controller at 10212000 {
 			compatible = "arm,cortex-a15-gic";
 			interrupt-controller;
-- 
1.8.1.1.dirty

[PATCH v2 4/4] dt-bindings: add bindings for mediatek intpol

[Joe.C]

From: "Joe.C" <yingjoe.chen@mediatek.com>

Add binding documentation for Mediatek SoC GIC interrupt polarity extension.

Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
---
 .../bindings/interrupt-controller/mediatek,intpol.txt    | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mediatek,intpol.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,intpol.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,intpol.txt
new file mode 100644
index 0000000..16ea372
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,intpol.txt
@@ -0,0 +1,16 @@
+Mediatek 65xx/81xx GIC interrupt polarity extension
+
+Mediatek SOCs contain controllable inverter for each GIC SPI interrupt,
+these can be used as GIC interrupt polarity extension.
+
+Required properties:
+- compatible: Compatible property value should be "mediatek,mt6577-intpol"
+
+- reg: Physical base address of the int pol registers and length of memory
+  mapped region.
+
+Example:
+       intpol: intpol at 10200100 {
+               compatible = "mediatek,mt6577-intpol";
+               reg = <0x10200100 0x1c>;
+       };
-- 
1.8.1.1.dirty

[PATCH v2 2/4] arm: mediatek: Add support for GIC interrupt polarity extension.

[Matthias Brugger]

2014-08-08 15:43 GMT+02:00 Joe.C <srv_yingjoe.chen@mediatek.com>:
> From: "Joe.C" <yingjoe.chen@mediatek.com>
>
> Mediatek SoCs have an interrupt polarity extension which allows
> to swap the polarity for given interrupts.

Please use ./script/checkpatch.pl, all 4 patches have errors.
Apart please use the get_maintainer.pl on all patches of a set and
send the whole set to all email addresses returned by the script.
Otherwise it will be really difficult to understand the context of the
patch set.

Cheers,
Matthias

>
> Signed-off-by: Joe.C <yingjoe.chen@mediatek.com>
> ---
>  arch/arm/mach-mediatek/Makefile   |  2 +-
>  arch/arm/mach-mediatek/common.h   | 19 ++++++++++++
>  arch/arm/mach-mediatek/intpol.c   | 61 +++++++++++++++++++++++++++++++++++++++
>  arch/arm/mach-mediatek/mediatek.c | 10 +++++++
>  4 files changed, 91 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/mach-mediatek/common.h
>  create mode 100644 arch/arm/mach-mediatek/intpol.c
>
> diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
> index 43e619f..82c39d8 100644
> --- a/arch/arm/mach-mediatek/Makefile
> +++ b/arch/arm/mach-mediatek/Makefile
> @@ -1 +1 @@
> -obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
> +obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o intpol.o
> diff --git a/arch/arm/mach-mediatek/common.h b/arch/arm/mach-mediatek/common.h
> new file mode 100644
> index 0000000..8f2bbeb
> --- /dev/null
> +++ b/arch/arm/mach-mediatek/common.h
> @@ -0,0 +1,19 @@
> +/*
> + * Copyright (c) 2014 Mediatek Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#ifndef __MEDIATEK_COMMON_H__
> +#define __MEDIATEK_COMMON_H__
> +
> +extern char init_intpol(void);
> +
> +#endif /* __MEDIATEK_COMMON_H__ */
> diff --git a/arch/arm/mach-mediatek/intpol.c b/arch/arm/mach-mediatek/intpol.c
> new file mode 100644
> index 0000000..65ccc7c
> --- /dev/null
> +++ b/arch/arm/mach-mediatek/intpol.c
> @@ -0,0 +1,61 @@
> +/*
> + * This file contains common code that is intended to be used across
> + * boards so that it's not replicated.
> + *
> + * Copyright (C) 2014 Mediatek Inc.
> + *
> + * This software is licensed under the terms of the GNU General Public
> + * License version 2, as published by the Free Software Foundation, and
> + * may be copied, distributed, and modified under those terms.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include <linux/of_address.h>
> +#include <linux/io.h>
> +#include <linux/irq.h>
> +#include <linux/irqchip/arm-gic.h>
> +
> +#define GIC_HW_IRQ_BASE  32
> +#define INT_POL_INDEX(a)   ((a) - GIC_HW_IRQ_BASE)
> +
> +static void __iomem *int_pol_base;
> +
> +static int mtk_int_pol_set_type(struct irq_data *d, unsigned int type)
> +{
> +       unsigned int irq = d->hwirq;
> +       u32 offset, reg_index, value;
> +
> +       offset = INT_POL_INDEX(irq) & 0x1F;
> +       reg_index = INT_POL_INDEX(irq) >> 5;
> +
> +       /* This arch extension was called with irq_controller_lock held,
> +          so the read-modify-write will be atomic */
> +       value = readl(int_pol_base + reg_index * 4);
> +       if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING)
> +               value |= (1 << offset);
> +       else
> +               value &= ~(1 << offset);
> +       writel(value, int_pol_base + reg_index * 4);
> +
> +       return 0;
> +}
> +
> +void init_intpol(void)
> +{
> +       struct device_node *node;
> +
> +       node = of_find_compatible_node(NULL, NULL, "mediatek,mt6577-intpol");
> +       if (!node)
> +               return;
> +
> +       int_pol_base = of_io_request_and_map(node, 0, "intpol");
> +       if (IS_ERR(int_pol_base)) {
> +               pr_warn("Can't get resource\n");
> +               return;
> +       }
> +
> +       gic_arch_extn.irq_set_type = mtk_int_pol_set_type;
> +}
> diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
> index 48051a2..aa10c70 100644
> --- a/arch/arm/mach-mediatek/mediatek.c
> +++ b/arch/arm/mach-mediatek/mediatek.c
> @@ -16,6 +16,15 @@
>   */
>  #include <linux/init.h>
>  #include <asm/mach/arch.h>
> +#include <linux/irqchip.h>
> +
> +#include "common.h"
> +
> +static void __init mediatek_init_irq(void)
> +{
> +       init_intpol();
> +       irqchip_init();
> +}
>
>  static const char * const mediatek_board_dt_compat[] = {
>         "mediatek,mt6589",
> @@ -26,4 +35,5 @@ static const char * const mediatek_board_dt_compat[] = {
>
>  DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
>         .dt_compat      = mediatek_board_dt_compat,
> +       .init_irq       = mediatek_init_irq,
>  MACHINE_END
> --
> 1.8.1.1.dirty
>



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motzblog.wordpress.com

[PATCH v2 2/4] arm: mediatek: Add support for GIC interrupt polarity extension.

[Joe.C]

On Fri, 2014-08-08 at 16:19 +0200, Matthias Brugger wrote:
> 2014-08-08 15:43 GMT+02:00 Joe.C <srv_yingjoe.chen@mediatek.com>:
> > From: "Joe.C" <yingjoe.chen@mediatek.com>
> >
> > Mediatek SoCs have an interrupt polarity extension which allows
> > to swap the polarity for given interrupts.
> 
> Please use ./script/checkpatch.pl, all 4 patches have errors.

Could you send me your result?
I ran checkpatch.pl again on these patches but didn't see any error.

Joe.C

[PATCH v2 2/4] arm: mediatek: Add support for GIC interrupt polarity extension.

[Matthias Brugger]

2014-08-08 16:42 GMT+02:00 Joe.C <srv_yingjoe.chen@mediatek.com>:
> On Fri, 2014-08-08 at 16:19 +0200, Matthias Brugger wrote:
>> 2014-08-08 15:43 GMT+02:00 Joe.C <srv_yingjoe.chen@mediatek.com>:
>> > From: "Joe.C" <yingjoe.chen@mediatek.com>
>> >
>> > Mediatek SoCs have an interrupt polarity extension which allows
>> > to swap the polarity for given interrupts.
>>
>> Please use ./script/checkpatch.pl, all 4 patches have errors.
>
> Could you send me your result?
> I ran checkpatch.pl again on these patches but didn't see any error.

I get a whole bunch of:
ERROR: DOS line endings

I suppose it's because of the configuration of your mail client.

Best regards,
Matthias

>
> Joe.C
>
>



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