[PATCH 00/12] ARM: sun8i: Enable pinctrl, i2c and mmc

[PATCH 00/12] ARM: sun8i: Enable pinctrl, i2c and mmc

[Chen-Yu Tsai]

Hi Maxime,

This series enables all the controllers on sun8i that we already have
drivers for, excluding SPI as the tablet I have does not use it and
I cannot test it. If there's a way to test it without external connections
or devices please let me know.

This series is based on 3.17-rc1, however it should cleanly apply over
the sun8i-rtc patch you've queued.

The commit logs pretty much explain themselves. Note that PLL6 is not
implemented yet. I've some patches for the clocks that I will send later.


Cheers
ChenYu


Chen-Yu Tsai (12):
  ARM: dts: sun8i: Add PIO controller node to the sun8i dtsi
  ARM: dts: sun8i: Add R_PIO controller node to the dtsi
  ARM: dts: sun8i: Add pinmux set for uart0
  ARM: dts: sun8i: Add pin muxing option for R_UART
  ARM: dts: sun8i: ippo-q8h: Add pinctrl properties for R_UART
  ARM: dts: sun8i: Add mmc clocks to the dtsi
  ARM: dts: sun8i: Add pin-muxing info for the mmc controllers
  ARM: dts: sun8i: Add mmc controller nodes
  ARM: dts: sun8i: Enable mmc controller on ippo-q8h-v5
  ARM: dts: sun8i: Add pin-muxing info for the i2c controllers
  ARM: dts: sun8i: Add i2c controller nodes
  ARM: dts: sun8i: Enable i2c controllers on ippo-q8h-v5

 arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts |  41 +++++++
 arch/arm/boot/dts/sun8i-a23.dtsi            | 169 ++++++++++++++++++++++++++++
 2 files changed, 210 insertions(+)

-- 
2.1.0

[PATCH 01/12] ARM: dts: sun8i: Add PIO controller node to the sun8i dtsi

[Chen-Yu Tsai]

Now that we have a driver for the sun8i PIO controller,
add the corresponding device node to the dtsi.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 54ac0787..41823b1 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -187,6 +187,20 @@
 		#size-cells = <1>;
 		ranges;
 
+		pio: pinctrl at 01c20800 {
+			compatible = "allwinner,sun8i-a23-pinctrl";
+			reg = <0x01c20800 0x400>;
+			interrupts = <0 11 4>,
+				     <0 15 4>,
+				     <0 17 4>;
+			clocks = <&apb1_gates 5>;
+			gpio-controller;
+			interrupt-controller;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#gpio-cells = <3>;
+		};
+
 		ahb1_rst: reset at 01c202c0 {
 			#reset-cells = <1>;
 			compatible = "allwinner,sun6i-a31-clock-reset";
-- 
2.1.0

[PATCH 02/12] ARM: dts: sun8i: Add R_PIO controller node to the dtsi

[Chen-Yu Tsai]

Now that we have a driver for the R_PIO controller,
add the corresponding device node to the dtsi.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 41823b1..a40e632 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -353,5 +353,18 @@
 			resets = <&apb0_rst 4>;
 			status = "disabled";
 		};
+
+		r_pio: pinctrl at 01f02c00 {
+			compatible = "allwinner,sun8i-a23-r-pinctrl";
+			reg = <0x01f02c00 0x400>;
+			interrupts = <0 45 4>;
+			clocks = <&apb0_gates 0>;
+			resets = <&apb0_rst 0>;
+			gpio-controller;
+			interrupt-controller;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#gpio-cells = <3>;
+		};
 	};
 };
-- 
2.1.0

[PATCH 03/12] ARM: dts: sun8i: Add pinmux set for uart0

[Chen-Yu Tsai]

uart0 on sun8i is only muxed with mmc0, which makes it a poor choice
for the console. However, some tablets only have pads for uart0
available on the circuit board.

Here we add the uart0 pinmux set for people who need it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index a40e632..0d6bb6d 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -199,6 +199,13 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			#gpio-cells = <3>;
+
+			uart0_pins_a: uart0 at 0 {
+				allwinner,pins = "PF2", "PF4";
+				allwinner,function = "uart0";
+				allwinner,drive = <0>;
+				allwinner,pull = <0>;
+			};
 		};
 
 		ahb1_rst: reset at 01c202c0 {
-- 
2.1.0

[PATCH 04/12] ARM: dts: sun8i: Add pin muxing option for R_UART

[Chen-Yu Tsai]

R_UART is available on extra pads on certain tablets, which makes it
ideal for use as a console. Here we add the pins for it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 0d6bb6d..25bae1f 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -372,6 +372,13 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			#gpio-cells = <3>;
+
+			r_uart_pins_a: r_uart at 0 {
+				allwinner,pins = "PL2", "PL3";
+				allwinner,function = "s_uart";
+				allwinner,drive = <0>;
+				allwinner,pull = <0>;
+			};
 		};
 	};
 };
-- 
2.1.0

[PATCH 05/12] ARM: dts: sun8i: ippo-q8h: Add pinctrl properties for R_UART

[Chen-Yu Tsai]

Now that we have R_PIO controller support and the pinmux for R_UART,
add the correct pinctrl properties to the R_UART node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
index 34002e3..224f53e 100644
--- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
+++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -24,6 +24,8 @@
 
 	soc at 01c00000 {
 		r_uart: serial at 01f02800 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&r_uart_pins_a>;
 			status = "okay";
 		};
 	};
-- 
2.1.0

[PATCH 06/12] ARM: dts: sun8i: Add mmc clocks to the dtsi

[Chen-Yu Tsai]

The MMC module clocks on sun8i are the same as those found on
previous Allwinner SoCs, module 0 clocks.

This patch adds the clocks nodes to the dtsi with existing drivers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 25bae1f..2d4c1b4 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -179,6 +179,30 @@
 					"apb2_uart1", "apb2_uart2",
 					"apb2_uart3", "apb2_uart4";
 		};
+
+		mmc0_clk: clk at 01c20088 {
+			#clock-cells = <0>;
+			compatible = "allwinner,sun4i-a10-mod0-clk";
+			reg = <0x01c20088 0x4>;
+			clocks = <&osc24M>, <&pll6>;
+			clock-output-names = "mmc0";
+		};
+
+		mmc1_clk: clk at 01c2008c {
+			#clock-cells = <0>;
+			compatible = "allwinner,sun4i-a10-mod0-clk";
+			reg = <0x01c2008c 0x4>;
+			clocks = <&osc24M>, <&pll6>;
+			clock-output-names = "mmc1";
+		};
+
+		mmc2_clk: clk at 01c20090 {
+			#clock-cells = <0>;
+			compatible = "allwinner,sun4i-a10-mod0-clk";
+			reg = <0x01c20090 0x4>;
+			clocks = <&osc24M>, <&pll6>;
+			clock-output-names = "mmc2";
+		};
 	};
 
 	soc at 01c00000 {
-- 
2.1.0

[PATCH 07/12] ARM: dts: sun8i: Add pin-muxing info for the mmc controllers

[Chen-Yu Tsai]

This adds pin-muxing info for the mmc controller / port combinations
which are known to be used on actual boards.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 2d4c1b4..348fb07 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -230,6 +230,20 @@
 				allwinner,drive = <0>;
 				allwinner,pull = <0>;
 			};
+
+			mmc0_pins_a: mmc0 at 0 {
+				allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
+				allwinner,function = "mmc0";
+				allwinner,drive = <2>;
+				allwinner,pull = <0>;
+			};
+
+			mmc1_pins_a: mmc1 at 0 {
+				allwinner,pins = "PG0","PG1","PG2","PG3","PG4","PG5";
+				allwinner,function = "mmc1";
+				allwinner,drive = <2>;
+				allwinner,pull = <0>;
+			};
 		};
 
 		ahb1_rst: reset at 01c202c0 {
-- 
2.1.0

[PATCH 08/12] ARM: dts: sun8i: Add mmc controller nodes

[Chen-Yu Tsai]

Add nodes for the 3 mmc controllers found on A23 SoCs to the sun8i DTSI.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 348fb07..62144e2 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -211,6 +211,39 @@
 		#size-cells = <1>;
 		ranges;
 
+		mmc0: mmc at 01c0f000 {
+			compatible = "allwinner,sun5i-a13-mmc";
+			reg = <0x01c0f000 0x1000>;
+			clocks = <&ahb1_gates 8>, <&mmc0_clk>;
+			clock-names = "ahb", "mmc";
+			resets = <&ahb1_rst 8>;
+			reset-names = "ahb";
+			interrupts = <0 60 4>;
+			status = "disabled";
+		};
+
+		mmc1: mmc at 01c10000 {
+			compatible = "allwinner,sun5i-a13-mmc";
+			reg = <0x01c10000 0x1000>;
+			clocks = <&ahb1_gates 9>, <&mmc1_clk>;
+			clock-names = "ahb", "mmc";
+			resets = <&ahb1_rst 9>;
+			reset-names = "ahb";
+			interrupts = <0 61 4>;
+			status = "disabled";
+		};
+
+		mmc2: mmc at 01c11000 {
+			compatible = "allwinner,sun5i-a13-mmc";
+			reg = <0x01c11000 0x1000>;
+			clocks = <&ahb1_gates 10>, <&mmc2_clk>;
+			clock-names = "ahb", "mmc";
+			resets = <&ahb1_rst 10>;
+			reset-names = "ahb";
+			interrupts = <0 62 4>;
+			status = "disabled";
+		};
+
 		pio: pinctrl at 01c20800 {
 			compatible = "allwinner,sun8i-a23-pinctrl";
 			reg = <0x01c20800 0x400>;
-- 
2.1.0

[PATCH 09/12] ARM: dts: sun8i: Enable mmc controller on ippo-q8h-v5

[Chen-Yu Tsai]

The card detect pin setting was taken from the original fex file,
and is confirmed to work.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
index 224f53e..ef1e4f3 100644
--- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
+++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -13,6 +13,7 @@
 
 /dts-v1/;
 /include/ "sun8i-a23.dtsi"
+/include/ "sunxi-common-regulators.dtsi"
 
 / {
 	model = "Ippo Q8H Dual Core Tablet (v5)";
@@ -23,6 +24,25 @@
 	};
 
 	soc at 01c00000 {
+		mmc0: mmc at 01c0f000 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>;
+			vmmc-supply = <&reg_vcc3v0>;
+			bus-width = <4>;
+			cd-gpios = <&pio 1 4 0>; /* PB4 */
+			cd-inverted;
+			status = "okay";
+		};
+
+		pinctrl at 01c20800 {
+			mmc0_cd_pin_q8h: mmc0_cd_pin at 0 {
+				allwinner,pins = "PB4";
+				allwinner,function = "gpio_in";
+				allwinner,drive = <0>;
+				allwinner,pull = <1>;
+			};
+		};
+
 		r_uart: serial at 01f02800 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&r_uart_pins_a>;
-- 
2.1.0

[PATCH 10/12] ARM: dts: sun8i: Add pin-muxing info for the i2c controllers

[Chen-Yu Tsai]

This adds pin-muxing info for the i2c controller / port combinations
which are known to be used on actual boards.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 62144e2..4658998 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -277,6 +277,27 @@
 				allwinner,drive = <2>;
 				allwinner,pull = <0>;
 			};
+
+			i2c0_pins_a: i2c0 at 0 {
+				allwinner,pins = "PH2", "PH3";
+				allwinner,function = "i2c0";
+				allwinner,drive = <0>;
+				allwinner,pull = <0>;
+			};
+
+			i2c1_pins_a: i2c1 at 0 {
+				allwinner,pins = "PH4", "PH5";
+				allwinner,function = "i2c1";
+				allwinner,drive = <0>;
+				allwinner,pull = <0>;
+			};
+
+			i2c2_pins_a: i2c2 at 0 {
+				allwinner,pins = "PE12", "PE13";
+				allwinner,function = "i2c2";
+				allwinner,drive = <0>;
+				allwinner,pull = <0>;
+			};
 		};
 
 		ahb1_rst: reset at 01c202c0 {
-- 
2.1.0

[PATCH 11/12] ARM: dts: sun8i: Add i2c controller nodes

[Chen-Yu Tsai]

Add nodes for the 3 i2c controllers found on A23 SoCs to the sun8i DTSI.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23.dtsi | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index 4658998..53ef350 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -387,6 +387,42 @@
 			status = "disabled";
 		};
 
+		i2c0: i2c at 01c2ac00 {
+			compatible = "allwinner,sun6i-a31-i2c";
+			reg = <0x01c2ac00 0x400>;
+			interrupts = <0 6 4>;
+			clocks = <&apb2_gates 0>;
+			clock-frequency = <100000>;
+			resets = <&apb2_rst 0>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c1: i2c at 01c2b000 {
+			compatible = "allwinner,sun6i-a31-i2c";
+			reg = <0x01c2b000 0x400>;
+			interrupts = <0 7 4>;
+			clocks = <&apb2_gates 1>;
+			clock-frequency = <100000>;
+			resets = <&apb2_rst 1>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		i2c2: i2c at 01c2b400 {
+			compatible = "allwinner,sun6i-a31-i2c";
+			reg = <0x01c2b400 0x400>;
+			interrupts = <0 8 4>;
+			clocks = <&apb2_gates 2>;
+			clock-frequency = <100000>;
+			resets = <&apb2_rst 2>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		gic: interrupt-controller at 01c81000 {
 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
 			reg = <0x01c81000 0x1000>,
-- 
2.1.0

[PATCH 11/12] ARM: dts: sun8i: Add i2c controller nodes

[Maxime Ripard]

Hi,

On Sun, Aug 17, 2014 at 11:52:17AM +0800, Chen-Yu Tsai wrote:
> Add nodes for the 3 i2c controllers found on A23 SoCs to the sun8i DTSI.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> ---
>  arch/arm/boot/dts/sun8i-a23.dtsi | 36 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
> index 4658998..53ef350 100644
> --- a/arch/arm/boot/dts/sun8i-a23.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a23.dtsi
> @@ -387,6 +387,42 @@
>  			status = "disabled";
>  		};
>  
> +		i2c0: i2c at 01c2ac00 {
> +			compatible = "allwinner,sun6i-a31-i2c";
> +			reg = <0x01c2ac00 0x400>;
> +			interrupts = <0 6 4>;
> +			clocks = <&apb2_gates 0>;
> +			clock-frequency = <100000>;

It's the default, you don't need to set it.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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[PATCH 11/12] ARM: dts: sun8i: Add i2c controller nodes

[Chen-Yu Tsai]

Hi,

On Sun, Aug 17, 2014 at 4:02 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> Hi,
>
> On Sun, Aug 17, 2014 at 11:52:17AM +0800, Chen-Yu Tsai wrote:
>> Add nodes for the 3 i2c controllers found on A23 SoCs to the sun8i DTSI.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>>  arch/arm/boot/dts/sun8i-a23.dtsi | 36 ++++++++++++++++++++++++++++++++++++
>>  1 file changed, 36 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
>> index 4658998..53ef350 100644
>> --- a/arch/arm/boot/dts/sun8i-a23.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-a23.dtsi
>> @@ -387,6 +387,42 @@
>>                       status = "disabled";
>>               };
>>
>> +             i2c0: i2c at 01c2ac00 {
>> +                     compatible = "allwinner,sun6i-a31-i2c";
>> +                     reg = <0x01c2ac00 0x400>;
>> +                     interrupts = <0 6 4>;
>> +                     clocks = <&apb2_gates 0>;
>> +                     clock-frequency = <100000>;
>
> It's the default, you don't need to set it.

Ah, just checked the driver, it is indeed the default.
All the other sunxi dtsi have it though. Do we want to be consistent?


ChenYu

[PATCH 11/12] ARM: dts: sun8i: Add i2c controller nodes

[Maxime Ripard]

On Sun, Aug 17, 2014 at 11:20:44PM +0800, Chen-Yu Tsai wrote:
> Hi,
> 
> On Sun, Aug 17, 2014 at 4:02 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > Hi,
> >
> > On Sun, Aug 17, 2014 at 11:52:17AM +0800, Chen-Yu Tsai wrote:
> >> Add nodes for the 3 i2c controllers found on A23 SoCs to the sun8i DTSI.
> >>
> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> >> ---
> >>  arch/arm/boot/dts/sun8i-a23.dtsi | 36 ++++++++++++++++++++++++++++++++++++
> >>  1 file changed, 36 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
> >> index 4658998..53ef350 100644
> >> --- a/arch/arm/boot/dts/sun8i-a23.dtsi
> >> +++ b/arch/arm/boot/dts/sun8i-a23.dtsi
> >> @@ -387,6 +387,42 @@
> >>                       status = "disabled";
> >>               };
> >>
> >> +             i2c0: i2c at 01c2ac00 {
> >> +                     compatible = "allwinner,sun6i-a31-i2c";
> >> +                     reg = <0x01c2ac00 0x400>;
> >> +                     interrupts = <0 6 4>;
> >> +                     clocks = <&apb2_gates 0>;
> >> +                     clock-frequency = <100000>;
> >
> > It's the default, you don't need to set it.
> 
> Ah, just checked the driver, it is indeed the default.
> All the other sunxi dtsi have it though. Do we want to be consistent?

Yep, it's usually a good thing :)

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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[linux-sunxi] Re: [PATCH 11/12] ARM: dts: sun8i: Add i2c controller nodes

[Chen-Yu Tsai]

On Mon, Aug 18, 2014 at 10:27 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Sun, Aug 17, 2014 at 11:20:44PM +0800, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Sun, Aug 17, 2014 at 4:02 PM, Maxime Ripard
>> <maxime.ripard@free-electrons.com> wrote:
>> > Hi,
>> >
>> > On Sun, Aug 17, 2014 at 11:52:17AM +0800, Chen-Yu Tsai wrote:
>> >> Add nodes for the 3 i2c controllers found on A23 SoCs to the sun8i DTSI.
>> >>
>> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> >> ---
>> >>  arch/arm/boot/dts/sun8i-a23.dtsi | 36 ++++++++++++++++++++++++++++++++++++
>> >>  1 file changed, 36 insertions(+)
>> >>
>> >> diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
>> >> index 4658998..53ef350 100644
>> >> --- a/arch/arm/boot/dts/sun8i-a23.dtsi
>> >> +++ b/arch/arm/boot/dts/sun8i-a23.dtsi
>> >> @@ -387,6 +387,42 @@
>> >>                       status = "disabled";
>> >>               };
>> >>
>> >> +             i2c0: i2c at 01c2ac00 {
>> >> +                     compatible = "allwinner,sun6i-a31-i2c";
>> >> +                     reg = <0x01c2ac00 0x400>;
>> >> +                     interrupts = <0 6 4>;
>> >> +                     clocks = <&apb2_gates 0>;
>> >> +                     clock-frequency = <100000>;
>> >
>> > It's the default, you don't need to set it.
>>
>> Ah, just checked the driver, it is indeed the default.
>> All the other sunxi dtsi have it though. Do we want to be consistent?
>
> Yep, it's usually a good thing :)

I'll do additional patches to remove them from the other dtsi then.

[PATCH 12/12] ARM: dts: sun8i: Enable i2c controllers on ippo-q8h-v5

[Chen-Yu Tsai]

i2c0 is connected to the gsl1680 capacitive touch panel controller.
i2c1 is connected to an mma7660 3-axis accelerometer.
i2c2 is connected to the front and back gc0309 camera sensors.
The camera sensors require additional regulators be enabled before
they are available.

All these peripherals are not supported by the kernel yet.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
index ef1e4f3..e9b8cca 100644
--- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
+++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -43,6 +43,25 @@
 			};
 		};
 
+		i2c0: i2c at 01c2ac00 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c0_pins_a>;
+			status = "okay";
+		};
+
+		i2c1: i2c at 01c2b000 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c1_pins_a>;
+			status = "okay";
+		};
+
+		i2c2: i2c at 01c2b400 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c2_pins_a>;
+			/* pull-ups and devices require PMIC regulator */
+			status = "failed";
+		};
+
 		r_uart: serial at 01f02800 {
 			pinctrl-names = "default";
 			pinctrl-0 = <&r_uart_pins_a>;
-- 
2.1.0

[PATCH 00/12] ARM: sun8i: Enable pinctrl, i2c and mmc

[Maxime Ripard]

Hi,

On Sun, Aug 17, 2014 at 11:52:06AM +0800, Chen-Yu Tsai wrote:
> Hi Maxime,
> 
> This series enables all the controllers on sun8i that we already have
> drivers for, excluding SPI as the tablet I have does not use it and
> I cannot test it. If there's a way to test it without external connections
> or devices please let me know.
> 
> This series is based on 3.17-rc1, however it should cleanly apply over
> the sun8i-rtc patch you've queued.
> 
> The commit logs pretty much explain themselves. Note that PLL6 is not
> implemented yet. I've some patches for the clocks that I will send later.

Merged patches 1-10.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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