From: jiang.liu@linux.intel.com (Jiang Liu)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFT v2 16/24] x86, irq: Directly call native_compose_msi_msg() for DMAR IRQ
Date: Fri, 26 Sep 2014 22:02:17 +0800 [thread overview]
Message-ID: <1411740145-30626-17-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1411740145-30626-1-git-send-email-jiang.liu@linux.intel.com>
DMAR interrupt won't be remapped by interrupt remapping hardware,
so directly call native_compose_msi_msg() for DMAR IRQ to compose MSI
message data. This will help to simplify MSI code later.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
arch/x86/kernel/apic/msi.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
index 7a6c2710de40..514e19e19b99 100644
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -391,12 +391,10 @@ static struct irq_chip dmar_msi_type = {
int arch_setup_dmar_msi(unsigned int irq)
{
- int ret;
struct msi_msg msg;
+ struct irq_cfg *cfg = irq_cfg(irq);
- ret = msi_compose_msg(NULL, irq, &msg, -1);
- if (ret < 0)
- return ret;
+ native_compose_msi_msg(NULL, irq, cfg->dest_apicid, &msg, -1);
dmar_msi_write(irq, &msg);
irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq,
"edge");
--
1.7.10.4
next prev parent reply other threads:[~2014-09-26 14:02 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-26 14:02 [RFT Part2 v2 00/24] Enable hierarchy irqdomian on x86 platforms Jiang Liu
2014-09-26 14:02 ` [RFT v2 01/24] irqdomain: Introduce new interfaces to support hierarchy irqdomains Jiang Liu
2014-09-29 12:22 ` Abel
2014-09-29 15:53 ` Thomas Gleixner
2014-09-30 10:56 ` Abel
2014-09-30 21:49 ` Thomas Gleixner
2014-10-07 1:50 ` Jiang Liu
2014-10-07 1:26 ` Jiang Liu
2014-10-01 14:23 ` Joe.C
2014-10-22 7:24 ` Jiang Liu
2014-09-26 14:02 ` [RFT v2 02/24] genirq: Introduce helper functions to support stacked irq_chip Jiang Liu
2014-09-26 14:02 ` [RFT v2 03/24] x86, irq: Save destination CPU ID in irq_cfg Jiang Liu
2014-09-26 14:02 ` [RFT v2 04/24] x86, irq: Use hierarchy irqdomain to manage CPU interrupt vectors Jiang Liu
2014-09-26 14:02 ` [RFT v2 05/24] x86, hpet: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-09-26 14:02 ` [RFT v2 06/24] x86, MSI: " Jiang Liu
2014-09-26 14:02 ` [RFT v2 07/24] x86, uv: " Jiang Liu
2014-09-26 14:02 ` [RFT v2 08/24] x86, htirq: " Jiang Liu
2014-09-26 14:02 ` [RFT v2 09/24] x86, dmar: " Jiang Liu
2014-09-26 14:02 ` [RFT v2 10/24] x86: irq_remapping: Introduce new interfaces to support hierarchy irqdomain Jiang Liu
2014-09-26 14:02 ` [RFT v2 11/24] iommu/vt-d: Change prototypes to prepare for enabling " Jiang Liu
2014-09-26 14:02 ` [RFT v2 12/24] iommu/vt-d: Enhance Intel IR driver to suppport " Jiang Liu
2014-09-26 14:02 ` [RFT v2 13/24] iommu/amd: Enhance AMD " Jiang Liu
2014-09-26 14:02 ` [RFT v2 14/24] x86, hpet: Enhance HPET IRQ to support " Jiang Liu
2014-09-26 14:02 ` [RFT v2 15/24] x86, MSI: Use hierarchy irqdomain to manage MSI interrupts Jiang Liu
2014-09-26 14:02 ` Jiang Liu [this message]
2014-09-26 14:02 ` [RFT v2 17/24] iommu/vt-d: Clean up unused MSI related code Jiang Liu
2014-09-26 14:02 ` [RFT v2 18/24] iommu/amd: " Jiang Liu
2014-09-26 14:02 ` [RFT v2 19/24] x86: irq_remapping: " Jiang Liu
2014-09-26 14:02 ` [RFT v2 20/24] x86, irq: Clean up unused MSI related code and interfaces Jiang Liu
2014-09-26 14:02 ` [RFT v2 21/24] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2014-09-26 14:02 ` [RFT v2 22/24] x86, irq: Use hierarchy irqdomain to manage DMAR interrupts Jiang Liu
2014-09-26 14:02 ` [RFT v2 23/24] x86, htirq: Use hierarchy irqdomain to manage Hypertransport interrupts Jiang Liu
2014-09-26 14:02 ` [RFT v2 24/24] x86, uv: Use hierarchy irqdomain to manage UV interrupts Jiang Liu
2014-09-26 14:29 ` [RFT Part2 v2 00/24] Enable hierarchy irqdomian on x86 platforms Borislav Petkov
2014-09-26 16:30 ` Aravind Gopalakrishnan
2014-09-28 11:05 ` Borislav Petkov
2014-09-28 11:15 ` Jiang Liu
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