From mboxrd@z Thu Jan 1 00:00:00 1970 From: yingjoe.chen@mediatek.com (Joe.C) Date: Thu, 9 Oct 2014 22:29:40 +0800 Subject: [PATCH v3 7/7] dt-bindings: add bindings for mediatek sysirq In-Reply-To: <1412864980-20273-1-git-send-email-yingjoe.chen@mediatek.com> References: <1412864980-20273-1-git-send-email-yingjoe.chen@mediatek.com> Message-ID: <1412864980-20273-8-git-send-email-yingjoe.chen@mediatek.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: "Joe.C" Add binding documentation for Mediatek SoC SYSIRQ. Signed-off-by: Joe.C --- .../bindings/arm/mediatek/mediatek,sysirq.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt new file mode 100644 index 0000000..63d8fa1 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sysirq.txt @@ -0,0 +1,19 @@ +Mediatek 65xx/81xx sysirq + +Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI +interrupt. + +Required properties: +- compatible: Compatible property value should be "mediatek,mt6577-sysirq" +- interrupt-parent: phandle of irq domain parent for sysirq. +- reg: Physical base address of the intpol registers and length of memory + mapped region. + +Example: + sysirq: interrupt-controller at 10200100 { + compatible = "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10200100 0 0x1c>; + }; -- 1.8.1.1.dirty