From mboxrd@z Thu Jan 1 00:00:00 1970 From: xudong.chen@mediatek.com (Xudong Chen) Date: Tue, 4 Nov 2014 13:29:36 +0800 Subject: [PATCH v2 2/3] ARM: mediatek: Add I2C node for mt8135 and mt8127 In-Reply-To: <1415078977-18374-1-git-send-email-xudong.chen@mediatek.com> References: <1415078977-18374-1-git-send-email-xudong.chen@mediatek.com> Message-ID: <1415078977-18374-3-git-send-email-xudong.chen@mediatek.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add I2C node to mt8135.dtsi and mt8127.dtsi Signed-off-by: Xudong Chen --- arch/arm/boot/dts/mt8127.dtsi | 27 +++++++++++++ arch/arm/boot/dts/mt8135.dtsi | 90 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 117 insertions(+) diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi index 25c9f69..60d7685e 100644 --- a/arch/arm/boot/dts/mt8127.dtsi +++ b/arch/arm/boot/dts/mt8127.dtsi @@ -89,5 +89,32 @@ <0 0x10214000 0 0x2000>, <0 0x10216000 0 0x2000>; }; + + i2c0: i2c at 11007000 { + compatible = "mediatek,mt8127-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11007000 0 0x70>, + <0 0x11000200 0 0x80>; + interrupts = ; + mediatek,have-dcm; + }; + + i2c1: i2c at 11008000 { + compatible = "mediatek,mt8127-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11008000 0 0x70>, + <0 0x11000280 0 0x80>; + interrupts = ; + mediatek,have-dcm; + }; + + i2c2: i2c at 11009000 { + compatible = "mediatek,mt8127-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11009000 0 0x70>, + <0 0x11000300 0 0x80>; + interrupts = ; + mediatek,have-dcm; + }; }; }; diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index 221ce09..cb32350 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -119,7 +119,97 @@ <0 0x1020C000 0 0x1000>; gpio-controller; #gpio-cells = <2>; + + i2c0_pins_a: i2c0 at 0 { + mediatek,pins = , + ; + }; + + i2c1_pins_a: i2c1 at 0 { + mediatek,pins = , + ; + }; + + i2c2_pins_a: i2c2 at 0 { + mediatek,pins = , + ; + }; + + i2c3_pins_a: i2c3 at 0 { + mediatek,pins = , + ; + }; + + i2c4_pins_a: i2c4 at 0 { + mediatek,pins = , + ; + }; + + i2c5_pins_a: i2c5 at 0 { + mediatek,pins = , + ; + }; + + i2c6_pins_a: i2c6 at 0 { + mediatek,pins = , + ; + }; }; + i2c0: i2c at 1100d000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6589-i2c"; + reg = <0 0x1100d000 0 0x70>, + <0 0x11000300 0 0x80>; + interrupts = ; + }; + + i2c1: i2c at 1100e000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6589-i2c"; + reg = <0 0x1100e000 0 0x70>, + <0 0x11000380 0 0x80>; + interrupts = ; + }; + + i2c2: i2c at 1100f000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6589-i2c"; + reg = <0 0x1100f000 0 0x70>, + <0 0x11000400 0 0x80>; + interrupts = ; + }; + + i2c3: i2c at 11010000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6589-i2c"; + reg = <0 0x11010000 0 0x70>, + <0 0x11000480 0 0x80>; + interrupts = ; + }; + + i2c4: i2c at 11011000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6589-i2c"; + reg = <0 0x11011000 0 0x70>, + <0 0x11000500 0 0x80>; + interrupts = ; + }; + + i2c5: i2c at 11012000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6589-i2c"; + reg = <0 0x11012000 0 0x70>, + <0 0x11000580 0 0x80>; + interrupts = ; + }; + + i2c6: i2c at 11013000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6589-i2c"; + reg = <0 0x11013000 0 0x70>, + <0 0x11000600 0 0x80>; + interrupts = ; + }; }; }; -- 1.8.1.1.dirty