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From: jiang.liu@linux.intel.com (Jiang Liu)
To: linux-arm-kernel@lists.infradead.org
Subject: [Patch Part2 v4 19/31] PCI/MSI: Simplify PCI MSI code by initializing msi_desc.nvec_used earlier
Date: Tue,  4 Nov 2014 20:01:53 +0800	[thread overview]
Message-ID: <1415102525-9898-20-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1415102525-9898-1-git-send-email-jiang.liu@linux.intel.com>

Simplify PCI MSI code by initializing msi_desc.nvec_used and
msi_desc.msi_attrib.mutiple when create MSI descriptors.

Also remove redundant checks in IRQ remapping drivers, PCI MSI core
already guarattees these.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
 drivers/iommu/irq_remapping.c |    8 --------
 drivers/pci/msi.c             |   40 +++++++++++++++-------------------------
 2 files changed, 15 insertions(+), 33 deletions(-)

diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index 176ff4372b7d..32fe5b1322d0 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -69,19 +69,13 @@ static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
 	unsigned int irq;
 	struct msi_desc *msidesc;
 
-	WARN_ON(!list_is_singular(&dev->msi_list));
 	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
-	WARN_ON(msidesc->irq);
-	WARN_ON(msidesc->msi_attrib.multiple);
-	WARN_ON(msidesc->nvec_used);
 
 	irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev));
 	if (irq == 0)
 		return -ENOSPC;
 
 	nvec_pow2 = __roundup_pow_of_two(nvec);
-	msidesc->nvec_used = nvec;
-	msidesc->msi_attrib.multiple = ilog2(nvec_pow2);
 	for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
 		if (!sub_handle) {
 			index = msi_alloc_remapped_irq(dev, irq, nvec_pow2);
@@ -109,8 +103,6 @@ error:
 	 * IRQs from tearing down again in default_teardown_msi_irqs()
 	 */
 	msidesc->irq = 0;
-	msidesc->nvec_used = 0;
-	msidesc->msi_attrib.multiple = 0;
 
 	return ret;
 }
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index fb2ccb536324..afe974600c7d 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -85,19 +85,13 @@ int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  */
 void default_teardown_msi_irqs(struct pci_dev *dev)
 {
+	int i;
 	struct msi_desc *entry;
 
-	list_for_each_entry(entry, &dev->msi_list, list) {
-		int i, nvec;
-		if (entry->irq == 0)
-			continue;
-		if (entry->nvec_used)
-			nvec = entry->nvec_used;
-		else
-			nvec = 1 << entry->msi_attrib.multiple;
-		for (i = 0; i < nvec; i++)
-			arch_teardown_msi_irq(entry->irq + i);
-	}
+	list_for_each_entry(entry, &dev->msi_list, list)
+		if (entry->irq)
+			for (i = 0; i < entry->nvec_used; i++)
+				arch_teardown_msi_irq(entry->irq + i);
 }
 
 void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
@@ -353,19 +347,12 @@ static void free_msi_irqs(struct pci_dev *dev)
 	struct msi_desc *entry, *tmp;
 	struct attribute **msi_attrs;
 	struct device_attribute *dev_attr;
-	int count = 0;
+	int i, count = 0;
 
-	list_for_each_entry(entry, &dev->msi_list, list) {
-		int i, nvec;
-		if (!entry->irq)
-			continue;
-		if (entry->nvec_used)
-			nvec = entry->nvec_used;
-		else
-			nvec = 1 << entry->msi_attrib.multiple;
-		for (i = 0; i < nvec; i++)
-			BUG_ON(irq_has_action(entry->irq + i));
-	}
+	list_for_each_entry(entry, &dev->msi_list, list)
+		if (entry->irq)
+			for (i = 0; i < entry->nvec_used; i++)
+				BUG_ON(irq_has_action(entry->irq + i));
 
 	arch_teardown_msi_irqs(dev);
 
@@ -556,7 +543,7 @@ error_attrs:
 	return ret;
 }
 
-static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
+static struct msi_desc *msi_setup_entry(struct pci_dev *dev, int nvec)
 {
 	u16 control;
 	struct msi_desc *entry;
@@ -574,6 +561,8 @@ static struct msi_desc *msi_setup_entry(struct pci_dev *dev)
 	entry->msi_attrib.maskbit	= !!(control & PCI_MSI_FLAGS_MASKBIT);
 	entry->msi_attrib.default_irq	= dev->irq;	/* Save IOAPIC IRQ */
 	entry->msi_attrib.multi_cap	= (control & PCI_MSI_FLAGS_QMASK) >> 1;
+	entry->msi_attrib.multiple	= ilog2(__roundup_pow_of_two(nvec));
+	entry->nvec_used		= nvec;
 
 	if (control & PCI_MSI_FLAGS_64BIT)
 		entry->mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
@@ -606,7 +595,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
 
 	msi_set_enable(dev, 0);	/* Disable MSI during set up */
 
-	entry = msi_setup_entry(dev);
+	entry = msi_setup_entry(dev, nvec);
 	if (!entry)
 		return -ENOMEM;
 
@@ -677,6 +666,7 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
 		entry->msi_attrib.entry_nr	= entries[i].entry;
 		entry->msi_attrib.default_irq	= dev->irq;
 		entry->mask_base		= base;
+		entry->nvec_used		= 1;
 
 		list_add_tail(&entry->list, &dev->msi_list);
 	}
-- 
1.7.10.4

  parent reply	other threads:[~2014-11-04 12:01 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-04 12:01 [Patch Part2 v4 00/31] Enable hierarchy irqdomian on x86 platforms Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 01/31] irqdomain: Introduce new interfaces to support hierarchy irqdomains Jiang Liu
2014-11-05 23:48   ` Thomas Gleixner
2014-11-06  6:09     ` Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 02/31] irqdomain: Do irq_find_mapping and set_type for hierarchy irqdomain in case OF Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 03/31] genirq: Introduce helper functions to support stacked irq_chip Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 04/31] genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 05/31] genirq: Add IRQ_SET_MASK_OK_DONE " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 06/31] x86, irq: Save destination CPU ID in irq_cfg Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 07/31] x86, irq: Use hierarchy irqdomain to manage CPU interrupt vectors Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 08/31] x86, hpet: Use new irqdomain interfaces to allocate/free IRQ Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 09/31] x86, MSI: " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 10/31] x86, uv: " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 11/31] x86, htirq: " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 12/31] x86, dmar: " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 13/31] x86: irq_remapping: Introduce new interfaces to support hierarchy irqdomain Jiang Liu
2014-11-06 11:43   ` Yijing Wang
2014-11-04 12:01 ` [Patch Part2 v4 14/31] iommu/vt-d: Change prototypes to prepare for enabling " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 15/31] iommu/vt-d: Enhance Intel IR driver to suppport " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 16/31] iommu/amd: Enhance AMD " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 17/31] x86, hpet: Enhance HPET IRQ to support " Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 18/31] PCI/MSI, trivial: Fix minor syntax issues according to coding styles Jiang Liu
2014-11-05 22:10   ` Bjorn Helgaas
2014-11-05 22:10   ` Bjorn Helgaas
2014-11-04 12:01 ` Jiang Liu [this message]
2014-11-05 22:35   ` [Patch Part2 v4 19/31] PCI/MSI: Simplify PCI MSI code by initializing msi_desc.nvec_used earlier Bjorn Helgaas
2014-11-04 12:01 ` [Patch Part2 v4 20/31] PCI/MSI: Kill redundant calling for irq_set_msi_desc() for MSIx interrupts Jiang Liu
2014-11-05 22:45   ` Bjorn Helgaas
2014-11-06  1:32     ` Yijing Wang
2014-11-06  4:04       ` Bjorn Helgaas
2014-11-06  4:31       ` Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 21/31] PCI/MSI: enhance PCI MSI core to support hierarchy irqdomain Jiang Liu
2014-11-05 23:09   ` Bjorn Helgaas
2014-11-06  1:58     ` Yijing Wang
2014-11-06  4:10       ` Bjorn Helgaas
2014-11-06  4:54         ` Yijing Wang
2014-11-06  5:06       ` Jiang Liu
2014-11-06  5:42         ` Yijing Wang
2014-11-06  4:58     ` Jiang Liu
2014-11-06  5:28       ` Bjorn Helgaas
2014-11-06 10:01   ` Thomas Gleixner
2014-11-06 10:30     ` Thomas Gleixner
2014-11-06 11:41     ` Jiang Liu
2014-11-06 11:59       ` Thomas Gleixner
2014-11-04 12:01 ` [Patch Part2 v4 22/31] x86, PCI, MSI: Use hierarchy irqdomain to manage MSI interrupts Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 23/31] x86, irq: Directly call native_compose_msi_msg() for DMAR IRQ Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 24/31] iommu/vt-d: Clean up unused MSI related code Jiang Liu
2014-11-04 12:01 ` [Patch Part2 v4 25/31] iommu/amd: " Jiang Liu
2014-11-04 12:02 ` [Patch Part2 v4 26/31] x86: irq_remapping: " Jiang Liu
2014-11-04 12:02 ` [Patch Part2 v4 27/31] x86, irq: Clean up unused MSI related code and interfaces Jiang Liu
2014-11-04 12:02 ` [Patch Part2 v4 28/31] iommu/vt-d: Refine the interfaces to create IRQ for DMAR unit Jiang Liu
2014-11-04 12:02 ` [Patch Part2 v4 29/31] x86, irq: Use hierarchy irqdomain to manage DMAR interrupts Jiang Liu
2014-11-04 12:02 ` [Patch Part2 v4 30/31] x86, htirq: Use hierarchy irqdomain to manage Hypertransport interrupts Jiang Liu
2014-11-04 12:02 ` [Patch Part2 v4 31/31] x86, uv: Use hierarchy irqdomain to manage UV interrupts Jiang Liu
2014-11-04 14:47 ` [Patch Part2 v4 00/31] Enable hierarchy irqdomian on x86 platforms Joerg Roedel
2014-11-04 15:12   ` Jiang Liu
2014-11-04 15:32     ` Joerg Roedel
2014-11-05  8:51     ` Joerg Roedel
2014-11-05  9:04       ` Jiang Liu
2014-11-05  9:41       ` Jiang Liu
2014-11-05  9:58         ` Joerg Roedel
2014-11-05 10:28           ` Jiang Liu
2014-11-05 11:10             ` Joerg Roedel
2014-11-06 13:07 ` Joerg Roedel
2014-11-06 13:35   ` Jiang Liu

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