From: dinguyen@opensource.altera.com (dinguyen at opensource.altera.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] arm: socfpga: update l2 cache settings
Date: Thu, 20 Nov 2014 23:04:39 -0600 [thread overview]
Message-ID: <1416546280-12068-1-git-send-email-dinguyen@opensource.altera.com> (raw)
From: Dinh Nguyen <dinguyen@opensource.altera.com>
Enable D and I prefetch helps improve SDRAM preformance.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
arch/arm/mach-socfpga/socfpga.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index adbf383..13b1858 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -104,7 +104,8 @@ static const char *altera_dt_match[] = {
};
DT_MACHINE_START(SOCFPGA, "Altera SOCFPGA")
- .l2c_aux_val = 0,
+ .l2c_aux_val = L310_AUX_CTRL_DATA_PREFETCH |
+ L310_AUX_CTRL_INSTR_PREFETCH,
.l2c_aux_mask = ~0,
.smp = smp_ops(socfpga_smp_ops),
.map_io = socfpga_map_io,
--
2.0.3
next reply other threads:[~2014-11-21 5:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-21 5:04 dinguyen at opensource.altera.com [this message]
2014-11-21 5:04 ` [PATCH 2/2] arm: socfpga: Set share override bit of the l2 cache controller dinguyen at opensource.altera.com
2014-11-21 11:04 ` Arnd Bergmann
2014-11-21 15:27 ` Dinh Nguyen
2014-12-17 19:46 ` Dinh Nguyen
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