* [PATCH v2 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs
@ 2014-11-22 20:26 Andreas Färber
2014-11-22 20:26 ` [PATCH v2 1/5] ARM: dts: exynos5410: Clean up SMDK5410 indentation Andreas Färber
` (4 more replies)
0 siblings, 5 replies; 15+ messages in thread
From: Andreas Färber @ 2014-11-22 20:26 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
This series adds a dedicated ODROID-XU device tree and enhances it with
LED configuration, to match the downstream 3.14 based behavior.
Regards,
Andreas
v1 -> v2:
* Inserted needed Sobs from Hakjoo Kim
* Rebased pinctrl (.svc, .{g,w}eint_{con,mask,pend} fields dropped)
Andreas F?rber (3):
ARM: dts: exynos5410: Clean up SMDK5410 indentation
ARM: dts: exynos5410: Prepare ODROID-XU device tree
ARM: dts: exynos5410: Add ODROID-XU LEDs
Hakjoo Kim (2):
pinctrl: exynos: add exynos5410 SoC specific data
ARM: dts: add pinctrl support to Exynos5410
.../bindings/pinctrl/samsung-pinctrl.txt | 1 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/exynos5410-odroidxu.dts | 103 ++++++
arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 406 +++++++++++++++++++++
arch/arm/boot/dts/exynos5410-smdk5410.dts | 6 +-
arch/arm/boot/dts/exynos5410.dtsi | 30 ++
drivers/pinctrl/samsung/pinctrl-exynos.c | 126 +++++++
drivers/pinctrl/samsung/pinctrl-samsung.c | 2 +
drivers/pinctrl/samsung/pinctrl-samsung.h | 1 +
9 files changed, 673 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/exynos5410-odroidxu.dts
create mode 100644 arch/arm/boot/dts/exynos5410-pinctrl.dtsi
--
2.1.2
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 1/5] ARM: dts: exynos5410: Clean up SMDK5410 indentation 2014-11-22 20:26 [PATCH v2 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs Andreas Färber @ 2014-11-22 20:26 ` Andreas Färber 2014-11-22 20:26 ` [PATCH v2 2/5] ARM: dts: exynos5410: Prepare ODROID-XU device tree Andreas Färber ` (3 subsequent siblings) 4 siblings, 0 replies; 15+ messages in thread From: Andreas Färber @ 2014-11-22 20:26 UTC (permalink / raw) To: linux-arm-kernel The UART status properties are indented one level too deep, and we want to derive a device tree for the ODROID-XU. Fix this before it propagates. Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v1 -> v2: Unchanged arch/arm/boot/dts/exynos5410-smdk5410.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/exynos5410-smdk5410.dts b/arch/arm/boot/dts/exynos5410-smdk5410.dts index be3e02530b42..cebeaab3abec 100644 --- a/arch/arm/boot/dts/exynos5410-smdk5410.dts +++ b/arch/arm/boot/dts/exynos5410-smdk5410.dts @@ -62,13 +62,13 @@ }; &uart0 { - status = "okay"; + status = "okay"; }; &uart1 { - status = "okay"; + status = "okay"; }; &uart2 { - status = "okay"; + status = "okay"; }; -- 2.1.2 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/5] ARM: dts: exynos5410: Prepare ODROID-XU device tree 2014-11-22 20:26 [PATCH v2 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs Andreas Färber 2014-11-22 20:26 ` [PATCH v2 1/5] ARM: dts: exynos5410: Clean up SMDK5410 indentation Andreas Färber @ 2014-11-22 20:26 ` Andreas Färber 2014-11-22 20:26 ` [PATCH v2 3/5] pinctrl: exynos: add exynos5410 SoC specific data Andreas Färber ` (2 subsequent siblings) 4 siblings, 0 replies; 15+ messages in thread From: Andreas Färber @ 2014-11-22 20:26 UTC (permalink / raw) To: linux-arm-kernel Derived from exynos5410-smdk5410.dts. Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v1 -> v2: Unchanged arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos5410-odroidxu.dts | 78 +++++++++++++++++++++++++++++++ 2 files changed, 79 insertions(+) create mode 100644 arch/arm/boot/dts/exynos5410-odroidxu.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91cd4d08b7f1..5b7cddbcb959 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -84,6 +84,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-rinato.dtb \ exynos5250-snow.dtb \ exynos5250-spring.dtb \ exynos5260-xyref5260.dtb \ + exynos5410-odroidxu.dtb \ exynos5410-smdk5410.dtb \ exynos5420-arndale-octa.dtb \ exynos5420-peach-pit.dtb \ diff --git a/arch/arm/boot/dts/exynos5410-odroidxu.dts b/arch/arm/boot/dts/exynos5410-odroidxu.dts new file mode 100644 index 000000000000..97310bb727e2 --- /dev/null +++ b/arch/arm/boot/dts/exynos5410-odroidxu.dts @@ -0,0 +1,78 @@ +/* + * Hardkernel ODROID-XU device tree source + * + * Copyright (c) 2014 SUSE LINUX Products GmbH + * + * Based on exynos5410-smdk5410.dts: + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos5410.dtsi" +/ { + model = "ODROID-XU based on EXYNOS5410"; + compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5"; + + memory { + reg = <0x40000000 0x80000000>; + }; + + chosen { + bootargs = "console=ttySAC2,115200"; + }; + + fin_pll: xxti { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "fin_pll"; + #clock-cells = <0>; + }; + + firmware at 02037000 { + compatible = "samsung,secure-firmware"; + reg = <0x02037000 0x1000>; + }; + +}; + +&mmc_0 { + status = "okay"; + num-slots = <1>; + cap-mmc-highspeed; + broken-cd; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + bus-width = <8>; +}; + +&mmc_2 { + status = "okay"; + num-slots = <1>; + cap-sd-highspeed; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <2 3>; + samsung,dw-mshc-ddr-timing = <1 2>; + bus-width = <4>; + disable-wp; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; -- 2.1.2 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 3/5] pinctrl: exynos: add exynos5410 SoC specific data 2014-11-22 20:26 [PATCH v2 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs Andreas Färber 2014-11-22 20:26 ` [PATCH v2 1/5] ARM: dts: exynos5410: Clean up SMDK5410 indentation Andreas Färber 2014-11-22 20:26 ` [PATCH v2 2/5] ARM: dts: exynos5410: Prepare ODROID-XU device tree Andreas Färber @ 2014-11-22 20:26 ` Andreas Färber 2014-11-22 21:49 ` Andreas Färber 2014-11-22 20:26 ` [PATCH v2 4/5] ARM: dts: add pinctrl support to Exynos5410 Andreas Färber 2014-11-22 20:26 ` [PATCH v2 5/5] ARM: dts: exynos5410: Add ODROID-XU LEDs Andreas Färber 4 siblings, 1 reply; 15+ messages in thread From: Andreas Färber @ 2014-11-22 20:26 UTC (permalink / raw) To: linux-arm-kernel From: Hakjoo Kim <ruppi.kim@hardkernel.com> Add Samsung EXYNOS5410 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5410. Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> [AF: Rebased onto Exynos5260] Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v1 -> v2: * Filled in Sob from Hakjoo Kim * Rebased (.svc, .{g,w}eint_{con,mask,pend} fields dropped) .../bindings/pinctrl/samsung-pinctrl.txt | 1 + drivers/pinctrl/samsung/pinctrl-exynos.c | 126 +++++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 4 files changed, 130 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index e82aaf492517..b87a176e730e 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -17,6 +17,7 @@ Required Properties: - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller. - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller. - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller. + - "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller. - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index d7154ed0b0eb..ef0e2a0d26eb 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -1084,6 +1084,132 @@ struct samsung_pin_ctrl exynos5260_pin_ctrl[] = { }, }; +/* pin banks of exynos5410 pin-controller 0 */ +static struct samsung_pin_bank exynos5410_pin_banks0[] = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), + EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04), + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08), + EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpb0", 0x0c), + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpb1", 0x10), + EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpb2", 0x14), + EXYNOS_PIN_BANK_EINTG(4, 0x0C0, "gpb3", 0x18), + EXYNOS_PIN_BANK_EINTG(7, 0x0E0, "gpc0", 0x1c), + EXYNOS_PIN_BANK_EINTG(4, 0x100, "gpc3", 0x20), + EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc1", 0x24), + EXYNOS_PIN_BANK_EINTG(7, 0x140, "gpc2", 0x28), + EXYNOS_PIN_BANK_EINTN(2, 0x160, "gpm5"), + EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x2c), + EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpe0", 0x30), + EXYNOS_PIN_BANK_EINTG(2, 0x1C0, "gpe1", 0x34), + EXYNOS_PIN_BANK_EINTG(6, 0x1E0, "gpf0", 0x38), + EXYNOS_PIN_BANK_EINTG(8, 0x200, "gpf1", 0x3c), + EXYNOS_PIN_BANK_EINTG(8, 0x220, "gpg0", 0x40), + EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpg1", 0x44), + EXYNOS_PIN_BANK_EINTG(2, 0x260, "gpg2", 0x48), + EXYNOS_PIN_BANK_EINTG(4, 0x280, "gph0", 0x4c), + EXYNOS_PIN_BANK_EINTG(8, 0x2A0, "gph1", 0x50), + EXYNOS_PIN_BANK_EINTN(8, 0x2C0, "gpm7"), + EXYNOS_PIN_BANK_EINTN(6, 0x2E0, "gpy0"), + EXYNOS_PIN_BANK_EINTN(4, 0x300, "gpy1"), + EXYNOS_PIN_BANK_EINTN(6, 0x320, "gpy2"), + EXYNOS_PIN_BANK_EINTN(8, 0x340, "gpy3"), + EXYNOS_PIN_BANK_EINTN(8, 0x360, "gpy4"), + EXYNOS_PIN_BANK_EINTN(8, 0x380, "gpy5"), + EXYNOS_PIN_BANK_EINTN(8, 0x3A0, "gpy6"), + EXYNOS_PIN_BANK_EINTN(8, 0x3C0, "gpy7"), + EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00), + EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04), + EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08), + EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c), +}; + +/* pin banks of exynos5410 pin-controller 1 */ +static struct samsung_pin_bank exynos5410_pin_banks1[] = { + EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpj0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpj1", 0x04), + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpj2", 0x08), + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpj3", 0x0c), + EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpj4", 0x10), + EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpk0", 0x14), + EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpk1", 0x18), + EXYNOS_PIN_BANK_EINTG(8, 0x0E0, "gpk2", 0x1c), + EXYNOS_PIN_BANK_EINTG(7, 0x100, "gpk3", 0x20), +}; + +/* pin banks of exynos5410 pin-controller 2 */ +static struct samsung_pin_bank exynos5410_pin_banks2[] = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04), + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08), + EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpv3", 0x0c), + EXYNOS_PIN_BANK_EINTG(2, 0x0C0, "gpv4", 0x10), +}; + +/* pin banks of exynos5410 pin-controller 3 */ +static struct samsung_pin_bank exynos5410_pin_banks3[] = { + EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00), +}; + +/* + * Samsung pinctrl driver data for Exynos5410 SoC. Exynos5410 SoC includes + * four gpio/pin-mux/pinconfig controllers. + */ +struct samsung_pin_ctrl exynos5410_pin_ctrl[] = { + { + /* pin-controller instance 0 data */ + .pin_banks = exynos5410_pin_banks0, + .nr_banks = ARRAY_SIZE(exynos5410_pin_banks0), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .weint_con = EXYNOS_WKUP_ECON_OFFSET, + .weint_mask = EXYNOS_WKUP_EMASK_OFFSET, + .weint_pend = EXYNOS_WKUP_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .eint_wkup_init = exynos_eint_wkup_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + .label = "exynos5410-gpio-ctrl0", + }, { + /* pin-controller instance 1 data */ + .pin_banks = exynos5410_pin_banks1, + .nr_banks = ARRAY_SIZE(exynos5410_pin_banks1), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + .label = "exynos5410-gpio-ctrl1", + }, { + /* pin-controller instance 2 data */ + .pin_banks = exynos5410_pin_banks2, + .nr_banks = ARRAY_SIZE(exynos5410_pin_banks2), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + .label = "exynos5410-gpio-ctrl2", + }, { + /* pin-controller instance 3 data */ + .pin_banks = exynos5410_pin_banks3, + .nr_banks = ARRAY_SIZE(exynos5410_pin_banks3), + .geint_con = EXYNOS_GPIO_ECON_OFFSET, + .geint_mask = EXYNOS_GPIO_EMASK_OFFSET, + .geint_pend = EXYNOS_GPIO_EPEND_OFFSET, + .svc = EXYNOS_SVC_OFFSET, + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + .label = "exynos5410-gpio-ctrl3", + }, +}; + /* pin banks of exynos5420 pin-controller 0 */ static struct samsung_pin_bank exynos5420_pin_banks0[] = { EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpy7", 0x00), diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 2d37c8f49f3c..42de732c542f 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1222,6 +1222,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = (void *)exynos5250_pin_ctrl }, { .compatible = "samsung,exynos5260-pinctrl", .data = (void *)exynos5260_pin_ctrl }, + { .compatible = "samsung,exynos5410-pinctrl", + .data = (void *)exynos5410_pin_ctrl }, { .compatible = "samsung,exynos5420-pinctrl", .data = (void *)exynos5420_pin_ctrl }, { .compatible = "samsung,s5pv210-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 5cedc9d26390..d19bbf4c7f24 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -241,6 +241,7 @@ extern struct samsung_pin_ctrl exynos4210_pin_ctrl[]; extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5250_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5260_pin_ctrl[]; +extern struct samsung_pin_ctrl exynos5410_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5420_pin_ctrl[]; extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[]; extern struct samsung_pin_ctrl s3c2412_pin_ctrl[]; -- 2.1.2 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 3/5] pinctrl: exynos: add exynos5410 SoC specific data 2014-11-22 20:26 ` [PATCH v2 3/5] pinctrl: exynos: add exynos5410 SoC specific data Andreas Färber @ 2014-11-22 21:49 ` Andreas Färber 2014-11-22 22:26 ` [PATCH v3 " Andreas Färber 0 siblings, 1 reply; 15+ messages in thread From: Andreas Färber @ 2014-11-22 21:49 UTC (permalink / raw) To: linux-arm-kernel Am 22.11.2014 um 21:26 schrieb Andreas F?rber: > From: Hakjoo Kim <ruppi.kim@hardkernel.com> > > Add Samsung EXYNOS5410 SoC specific data to enable pinctrl > support for all platforms based on EXYNOS5410. > > Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> > [AF: Rebased onto Exynos5260] > Signed-off-by: Andreas F?rber <afaerber@suse.de> > --- > v1 -> v2: > * Filled in Sob from Hakjoo Kim > * Rebased (.svc, .{g,w}eint_{con,mask,pend} fields dropped) Ugh, this patch is actually missing exactly this change! Stay tuned... Andreas -- SUSE LINUX GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend?rffer; HRB 21284 AG N?rnberg ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 3/5] pinctrl: exynos: add exynos5410 SoC specific data 2014-11-22 21:49 ` Andreas Färber @ 2014-11-22 22:26 ` Andreas Färber 2014-11-28 11:59 ` Linus Walleij 2014-12-28 11:16 ` Tomasz Figa 0 siblings, 2 replies; 15+ messages in thread From: Andreas Färber @ 2014-11-22 22:26 UTC (permalink / raw) To: linux-arm-kernel From: Hakjoo Kim <ruppi.kim@hardkernel.com> Add Samsung EXYNOS5410 SoC specific data to enable pinctrl support for all platforms based on EXYNOS5410. Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> [AF: Rebased onto Exynos5260 and irq_chip consolidation] Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v2 -> v3: * Rebased (.svc, .{g,w}eint_{con,mask,pend} fields dropped) v1 -> v2: * Filled in Sob from Hakjoo Kim .../bindings/pinctrl/samsung-pinctrl.txt | 1 + drivers/pinctrl/samsung/pinctrl-exynos.c | 107 +++++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 4 files changed, 111 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index e82aaf492517..b87a176e730e 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -17,6 +17,7 @@ Required Properties: - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller. - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller. - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller. + - "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller. - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller. - reg: Base address of the pin controller hardware module and length of diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index d7154ed0b0eb..0580399a6587 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -1084,6 +1084,113 @@ struct samsung_pin_ctrl exynos5260_pin_ctrl[] = { }, }; +/* pin banks of exynos5410 pin-controller 0 */ +static struct samsung_pin_bank exynos5410_pin_banks0[] = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00), + EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04), + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08), + EXYNOS_PIN_BANK_EINTG(5, 0x060, "gpb0", 0x0c), + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpb1", 0x10), + EXYNOS_PIN_BANK_EINTG(4, 0x0A0, "gpb2", 0x14), + EXYNOS_PIN_BANK_EINTG(4, 0x0C0, "gpb3", 0x18), + EXYNOS_PIN_BANK_EINTG(7, 0x0E0, "gpc0", 0x1c), + EXYNOS_PIN_BANK_EINTG(4, 0x100, "gpc3", 0x20), + EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc1", 0x24), + EXYNOS_PIN_BANK_EINTG(7, 0x140, "gpc2", 0x28), + EXYNOS_PIN_BANK_EINTN(2, 0x160, "gpm5"), + EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x2c), + EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpe0", 0x30), + EXYNOS_PIN_BANK_EINTG(2, 0x1C0, "gpe1", 0x34), + EXYNOS_PIN_BANK_EINTG(6, 0x1E0, "gpf0", 0x38), + EXYNOS_PIN_BANK_EINTG(8, 0x200, "gpf1", 0x3c), + EXYNOS_PIN_BANK_EINTG(8, 0x220, "gpg0", 0x40), + EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpg1", 0x44), + EXYNOS_PIN_BANK_EINTG(2, 0x260, "gpg2", 0x48), + EXYNOS_PIN_BANK_EINTG(4, 0x280, "gph0", 0x4c), + EXYNOS_PIN_BANK_EINTG(8, 0x2A0, "gph1", 0x50), + EXYNOS_PIN_BANK_EINTN(8, 0x2C0, "gpm7"), + EXYNOS_PIN_BANK_EINTN(6, 0x2E0, "gpy0"), + EXYNOS_PIN_BANK_EINTN(4, 0x300, "gpy1"), + EXYNOS_PIN_BANK_EINTN(6, 0x320, "gpy2"), + EXYNOS_PIN_BANK_EINTN(8, 0x340, "gpy3"), + EXYNOS_PIN_BANK_EINTN(8, 0x360, "gpy4"), + EXYNOS_PIN_BANK_EINTN(8, 0x380, "gpy5"), + EXYNOS_PIN_BANK_EINTN(8, 0x3A0, "gpy6"), + EXYNOS_PIN_BANK_EINTN(8, 0x3C0, "gpy7"), + EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00), + EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04), + EXYNOS_PIN_BANK_EINTW(8, 0xC40, "gpx2", 0x08), + EXYNOS_PIN_BANK_EINTW(8, 0xC60, "gpx3", 0x0c), +}; + +/* pin banks of exynos5410 pin-controller 1 */ +static struct samsung_pin_bank exynos5410_pin_banks1[] = { + EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpj0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpj1", 0x04), + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpj2", 0x08), + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpj3", 0x0c), + EXYNOS_PIN_BANK_EINTG(2, 0x080, "gpj4", 0x10), + EXYNOS_PIN_BANK_EINTG(8, 0x0A0, "gpk0", 0x14), + EXYNOS_PIN_BANK_EINTG(8, 0x0C0, "gpk1", 0x18), + EXYNOS_PIN_BANK_EINTG(8, 0x0E0, "gpk2", 0x1c), + EXYNOS_PIN_BANK_EINTG(7, 0x100, "gpk3", 0x20), +}; + +/* pin banks of exynos5410 pin-controller 2 */ +static struct samsung_pin_bank exynos5410_pin_banks2[] = { + EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00), + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04), + EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08), + EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpv3", 0x0c), + EXYNOS_PIN_BANK_EINTG(2, 0x0C0, "gpv4", 0x10), +}; + +/* pin banks of exynos5410 pin-controller 3 */ +static struct samsung_pin_bank exynos5410_pin_banks3[] = { + EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00), +}; + +/* + * Samsung pinctrl driver data for Exynos5410 SoC. Exynos5410 SoC includes + * four gpio/pin-mux/pinconfig controllers. + */ +struct samsung_pin_ctrl exynos5410_pin_ctrl[] = { + { + /* pin-controller instance 0 data */ + .pin_banks = exynos5410_pin_banks0, + .nr_banks = ARRAY_SIZE(exynos5410_pin_banks0), + .eint_gpio_init = exynos_eint_gpio_init, + .eint_wkup_init = exynos_eint_wkup_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + .label = "exynos5410-gpio-ctrl0", + }, { + /* pin-controller instance 1 data */ + .pin_banks = exynos5410_pin_banks1, + .nr_banks = ARRAY_SIZE(exynos5410_pin_banks1), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + .label = "exynos5410-gpio-ctrl1", + }, { + /* pin-controller instance 2 data */ + .pin_banks = exynos5410_pin_banks2, + .nr_banks = ARRAY_SIZE(exynos5410_pin_banks2), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + .label = "exynos5410-gpio-ctrl2", + }, { + /* pin-controller instance 3 data */ + .pin_banks = exynos5410_pin_banks3, + .nr_banks = ARRAY_SIZE(exynos5410_pin_banks3), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + .label = "exynos5410-gpio-ctrl3", + }, +}; + /* pin banks of exynos5420 pin-controller 0 */ static struct samsung_pin_bank exynos5420_pin_banks0[] = { EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpy7", 0x00), diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 2d37c8f49f3c..42de732c542f 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1222,6 +1222,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = (void *)exynos5250_pin_ctrl }, { .compatible = "samsung,exynos5260-pinctrl", .data = (void *)exynos5260_pin_ctrl }, + { .compatible = "samsung,exynos5410-pinctrl", + .data = (void *)exynos5410_pin_ctrl }, { .compatible = "samsung,exynos5420-pinctrl", .data = (void *)exynos5420_pin_ctrl }, { .compatible = "samsung,s5pv210-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 5cedc9d26390..d19bbf4c7f24 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -241,6 +241,7 @@ extern struct samsung_pin_ctrl exynos4210_pin_ctrl[]; extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5250_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5260_pin_ctrl[]; +extern struct samsung_pin_ctrl exynos5410_pin_ctrl[]; extern struct samsung_pin_ctrl exynos5420_pin_ctrl[]; extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[]; extern struct samsung_pin_ctrl s3c2412_pin_ctrl[]; -- 2.1.2 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 3/5] pinctrl: exynos: add exynos5410 SoC specific data 2014-11-22 22:26 ` [PATCH v3 " Andreas Färber @ 2014-11-28 11:59 ` Linus Walleij 2014-11-28 12:07 ` Andreas Färber 2014-12-28 11:16 ` Tomasz Figa 1 sibling, 1 reply; 15+ messages in thread From: Linus Walleij @ 2014-11-28 11:59 UTC (permalink / raw) To: linux-arm-kernel On Sat, Nov 22, 2014 at 11:26 PM, Andreas F?rber <afaerber@suse.de> wrote: > From: Hakjoo Kim <ruppi.kim@hardkernel.com> > > Add Samsung EXYNOS5410 SoC specific data to enable pinctrl > support for all platforms based on EXYNOS5410. > > Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> > [AF: Rebased onto Exynos5260 and irq_chip consolidation] > Signed-off-by: Andreas F?rber <afaerber@suse.de> > --- > v2 -> v3: > * Rebased (.svc, .{g,w}eint_{con,mask,pend} fields dropped) > > v1 -> v2: > * Filled in Sob from Hakjoo Kim Is this based on the pinctrl devel branch so I can apply it? I'd like Tomasz ACK on it first though. Yours, Linus Walleij ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 3/5] pinctrl: exynos: add exynos5410 SoC specific data 2014-11-28 11:59 ` Linus Walleij @ 2014-11-28 12:07 ` Andreas Färber 2014-11-30 12:13 ` Tomasz Figa 0 siblings, 1 reply; 15+ messages in thread From: Andreas Färber @ 2014-11-28 12:07 UTC (permalink / raw) To: linux-arm-kernel Am 28.11.2014 um 12:59 schrieb Linus Walleij: > On Sat, Nov 22, 2014 at 11:26 PM, Andreas F?rber <afaerber@suse.de> wrote: > >> From: Hakjoo Kim <ruppi.kim@hardkernel.com> >> >> Add Samsung EXYNOS5410 SoC specific data to enable pinctrl >> support for all platforms based on EXYNOS5410. >> >> Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> >> [AF: Rebased onto Exynos5260 and irq_chip consolidation] >> Signed-off-by: Andreas F?rber <afaerber@suse.de> >> --- >> v2 -> v3: >> * Rebased (.svc, .{g,w}eint_{con,mask,pend} fields dropped) >> >> v1 -> v2: >> * Filled in Sob from Hakjoo Kim > > Is this based on the pinctrl devel branch so I can apply it? It was based on the Samsung for-next tree. I can rebase if needed. > I'd like Tomasz ACK on it first though. Thanks, Andreas -- SUSE LINUX GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend?rffer; HRB 21284 AG N?rnberg ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 3/5] pinctrl: exynos: add exynos5410 SoC specific data 2014-11-28 12:07 ` Andreas Färber @ 2014-11-30 12:13 ` Tomasz Figa 0 siblings, 0 replies; 15+ messages in thread From: Tomasz Figa @ 2014-11-30 12:13 UTC (permalink / raw) To: linux-arm-kernel Hi Andreas, 2014-11-28 21:07 GMT+09:00 Andreas F?rber <afaerber@suse.de>: > Am 28.11.2014 um 12:59 schrieb Linus Walleij: >> On Sat, Nov 22, 2014 at 11:26 PM, Andreas F?rber <afaerber@suse.de> wrote: >> >>> From: Hakjoo Kim <ruppi.kim@hardkernel.com> >>> >>> Add Samsung EXYNOS5410 SoC specific data to enable pinctrl >>> support for all platforms based on EXYNOS5410. >>> >>> Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> >>> [AF: Rebased onto Exynos5260 and irq_chip consolidation] >>> Signed-off-by: Andreas F?rber <afaerber@suse.de> >>> --- >>> v2 -> v3: >>> * Rebased (.svc, .{g,w}eint_{con,mask,pend} fields dropped) >>> >>> v1 -> v2: >>> * Filled in Sob from Hakjoo Kim >> >> Is this based on the pinctrl devel branch so I can apply it? > > It was based on the Samsung for-next tree. I can rebase if needed. Yes, please rebase (and please make sure that all the structs are const, which became possible after recent changes). Otherwise the patch looks good. Best regards, Tomasz ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 3/5] pinctrl: exynos: add exynos5410 SoC specific data 2014-11-22 22:26 ` [PATCH v3 " Andreas Färber 2014-11-28 11:59 ` Linus Walleij @ 2014-12-28 11:16 ` Tomasz Figa 1 sibling, 0 replies; 15+ messages in thread From: Tomasz Figa @ 2014-12-28 11:16 UTC (permalink / raw) To: linux-arm-kernel Hi Andreas, On 23.11.2014 07:26, Andreas F?rber wrote: > From: Hakjoo Kim <ruppi.kim@hardkernel.com> > > Add Samsung EXYNOS5410 SoC specific data to enable pinctrl > support for all platforms based on EXYNOS5410. > > Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> > [AF: Rebased onto Exynos5260 and irq_chip consolidation] > Signed-off-by: Andreas F?rber <afaerber@suse.de> > --- > v2 -> v3: > * Rebased (.svc, .{g,w}eint_{con,mask,pend} fields dropped) > > v1 -> v2: > * Filled in Sob from Hakjoo Kim Any news on this patch? I'd like to ACK it, but apparently it is waiting for a rebase. Sorry for the delay, unfortunately things are a little bit busy on my side nowadays. Best regards, Tomasz ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 4/5] ARM: dts: add pinctrl support to Exynos5410 2014-11-22 20:26 [PATCH v2 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs Andreas Färber ` (2 preceding siblings ...) 2014-11-22 20:26 ` [PATCH v2 3/5] pinctrl: exynos: add exynos5410 SoC specific data Andreas Färber @ 2014-11-22 20:26 ` Andreas Färber 2014-11-23 17:18 ` Andreas Färber 2014-11-22 20:26 ` [PATCH v2 5/5] ARM: dts: exynos5410: Add ODROID-XU LEDs Andreas Färber 4 siblings, 1 reply; 15+ messages in thread From: Andreas Färber @ 2014-11-22 20:26 UTC (permalink / raw) To: linux-arm-kernel From: Hakjoo Kim <ruppi.kim@hardkernel.com> Add the required pin configuration support to Exynos5410 using pinctrl interface. Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> [AF: Rebased, style changes] Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v1 -> v2: * Filled in Sob from Hakjoo Kim arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 406 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5410.dtsi | 30 +++ 2 files changed, 436 insertions(+) create mode 100644 arch/arm/boot/dts/exynos5410-pinctrl.dtsi diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi new file mode 100644 index 000000000000..f9aa6bb55464 --- /dev/null +++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi @@ -0,0 +1,406 @@ +/* + * Exynos5410 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2013 Hardkernel Co., Ltd. + * http://www.hardkernel.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&pinctrl_0 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa2: gpa2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc3: gpc3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc2: gpc2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm5: gpm5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph0: gph0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph1: gph1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm7: gpm7 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy0: gpy0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy1: gpy1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy2: gpy2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy3: gpy3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy4: gpy4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy5: gpy5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy6: gpy6 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy7: gpy7 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <23 0>, + <24 0>, + <25 0>, + <25 1>, + <26 0>, + <26 1>, + <27 0>, + <27 1>; + }; + + gpx1: gpx1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <28 0>, + <28 1>, + <29 0>, + <29 1>, + <30 0>, + <30 1>, + <31 0>, + <31 1>; + }; + + gpx2: gpx2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx3: gpx3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_1 { + gpj0: gpj0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj1: gpj1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj2: gpj2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj3: gpj3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj4: gpj4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk0: gpk0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk1: gpk1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk2: gpk2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk3: gpk3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_2 { + gpv0: gpv0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv1: gpv1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv2: gpv2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv3: gpv3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv4: gpv4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_3 { + gpz: gpz { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index 731eefd23fa9..467b23328074 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -21,6 +21,10 @@ interrupt-parent = <&gic>; aliases { + pinctrl0 = &pinctrl_0; + pinctrl1 = &pinctrl_1; + pinctrl2 = &pinctrl_2; + pinctrl3 = &pinctrl_3; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; @@ -218,4 +222,30 @@ status = "disabled"; }; }; + + pinctrl_0: pinctrl at 13400000 { + compatible = "samsung,exynos5410-pinctrl"; + reg = <0x13400000 0x1000>; + interrupts = <0 45 0>; + }; + + pinctrl_1: pinctrl at 14000000 { + compatible = "samsung,exynos5410-pinctrl"; + reg = <0x14000000 0x1000>; + interrupts = <0 46 0>; + }; + + pinctrl_2: pinctrl at 10d10000 { + compatible = "samsung,exynos5410-pinctrl"; + reg = <0x10d10000 0x1000>; + interrupts = <0 50 0>; + }; + + pinctrl_3: pinctrl at 03860000 { + compatible = "samsung,exynos5410-pinctrl"; + reg = <0x03860000 0x1000>; + interrupts = <0 47 0>; + }; }; + +#include "exynos5410-pinctrl.dtsi" -- 2.1.2 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 4/5] ARM: dts: add pinctrl support to Exynos5410 2014-11-22 20:26 ` [PATCH v2 4/5] ARM: dts: add pinctrl support to Exynos5410 Andreas Färber @ 2014-11-23 17:18 ` Andreas Färber 2014-11-23 17:20 ` [PATCH v3 " Andreas Färber 0 siblings, 1 reply; 15+ messages in thread From: Andreas Färber @ 2014-11-23 17:18 UTC (permalink / raw) To: linux-arm-kernel Am 22.11.2014 um 21:26 schrieb Andreas F?rber: > From: Hakjoo Kim <ruppi.kim@hardkernel.com> > > Add the required pin configuration support to Exynos5410 using pinctrl > interface. > > Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> > [AF: Rebased, style changes] > Signed-off-by: Andreas F?rber <afaerber@suse.de> > --- > v1 -> v2: > * Filled in Sob from Hakjoo Kim Missed one review comment from the RFC, v3 coming up. Andreas -- SUSE LINUX GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend?rffer; HRB 21284 AG N?rnberg ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 4/5] ARM: dts: add pinctrl support to Exynos5410 2014-11-23 17:18 ` Andreas Färber @ 2014-11-23 17:20 ` Andreas Färber 0 siblings, 0 replies; 15+ messages in thread From: Andreas Färber @ 2014-11-23 17:20 UTC (permalink / raw) To: linux-arm-kernel From: Hakjoo Kim <ruppi.kim@hardkernel.com> Add the required pin configuration support to Exynos5410 using pinctrl interface. Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> [AF: Rebased, style changes] Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v2 -> v3: * Added wake-up IRQ controller node (Tomasz Figa) v1 -> v2: * Filled in Sob from Hakjoo Kim arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 406 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5410.dtsi | 36 +++ 2 files changed, 442 insertions(+) create mode 100644 arch/arm/boot/dts/exynos5410-pinctrl.dtsi diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi new file mode 100644 index 000000000000..f9aa6bb55464 --- /dev/null +++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi @@ -0,0 +1,406 @@ +/* + * Exynos5410 SoC pin-mux and pin-config device tree source + * + * Copyright (c) 2013 Hardkernel Co., Ltd. + * http://www.hardkernel.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&pinctrl_0 { + gpa0: gpa0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa1: gpa1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpa2: gpa2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb0: gpb0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb1: gpb1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb2: gpb2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpb3: gpb3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc0: gpc0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc3: gpc3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc1: gpc1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpc2: gpc2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm5: gpm5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpd1: gpd1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe0: gpe0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpe1: gpe1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf0: gpf0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpf1: gpf1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg0: gpg0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg1: gpg1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpg2: gpg2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph0: gph0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gph1: gph1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpm7: gpm7 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy0: gpy0 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy1: gpy1 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy2: gpy2 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy3: gpy3 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy4: gpy4 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy5: gpy5 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy6: gpy6 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpy7: gpy7 { + gpio-controller; + #gpio-cells = <2>; + }; + + gpx0: gpx0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <23 0>, + <24 0>, + <25 0>, + <25 1>, + <26 0>, + <26 1>, + <27 0>, + <27 1>; + }; + + gpx1: gpx1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + interrupt-parent = <&combiner>; + #interrupt-cells = <2>; + interrupts = <28 0>, + <28 1>, + <29 0>, + <29 1>, + <30 0>, + <30 1>, + <31 0>, + <31 1>; + }; + + gpx2: gpx2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpx3: gpx3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_1 { + gpj0: gpj0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj1: gpj1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj2: gpj2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj3: gpj3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpj4: gpj4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk0: gpk0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk1: gpk1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk2: gpk2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpk3: gpk3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_2 { + gpv0: gpv0 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv1: gpv1 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv2: gpv2 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv3: gpv3 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpv4: gpv4 { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; + +&pinctrl_3 { + gpz: gpz { + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index 731eefd23fa9..460335606466 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -21,6 +21,10 @@ interrupt-parent = <&gic>; aliases { + pinctrl0 = &pinctrl_0; + pinctrl1 = &pinctrl_1; + pinctrl2 = &pinctrl_2; + pinctrl3 = &pinctrl_3; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; @@ -218,4 +222,36 @@ status = "disabled"; }; }; + + pinctrl_0: pinctrl at 13400000 { + compatible = "samsung,exynos5410-pinctrl"; + reg = <0x13400000 0x1000>; + interrupts = <0 45 0>; + + wakeup-interrupt-controller { + compatible = "samsung,exynos4210-wakeup-eint"; + interrupt-parent = <&gic>; + interrupts = <0 32 0>; + }; + }; + + pinctrl_1: pinctrl at 14000000 { + compatible = "samsung,exynos5410-pinctrl"; + reg = <0x14000000 0x1000>; + interrupts = <0 46 0>; + }; + + pinctrl_2: pinctrl at 10d10000 { + compatible = "samsung,exynos5410-pinctrl"; + reg = <0x10d10000 0x1000>; + interrupts = <0 50 0>; + }; + + pinctrl_3: pinctrl at 03860000 { + compatible = "samsung,exynos5410-pinctrl"; + reg = <0x03860000 0x1000>; + interrupts = <0 47 0>; + }; }; + +#include "exynos5410-pinctrl.dtsi" -- 2.1.2 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 5/5] ARM: dts: exynos5410: Add ODROID-XU LEDs 2014-11-22 20:26 [PATCH v2 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs Andreas Färber ` (3 preceding siblings ...) 2014-11-22 20:26 ` [PATCH v2 4/5] ARM: dts: add pinctrl support to Exynos5410 Andreas Färber @ 2014-11-22 20:26 ` Andreas Färber 2014-11-23 1:31 ` Andreas Färber 4 siblings, 1 reply; 15+ messages in thread From: Andreas Färber @ 2014-11-22 20:26 UTC (permalink / raw) To: linux-arm-kernel Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v1 -> v2: * Filled in Sob from Hakjoo Kim arch/arm/boot/dts/exynos5410-odroidxu.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/exynos5410-odroidxu.dts b/arch/arm/boot/dts/exynos5410-odroidxu.dts index 97310bb727e2..b02cd3ab7b38 100644 --- a/arch/arm/boot/dts/exynos5410-odroidxu.dts +++ b/arch/arm/boot/dts/exynos5410-odroidxu.dts @@ -15,6 +15,7 @@ /dts-v1/; #include "exynos5410.dtsi" +#include <dt-bindings/gpio/gpio.h> / { model = "ODROID-XU based on EXYNOS5410"; compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5"; @@ -39,6 +40,30 @@ reg = <0x02037000 0x1000>; }; + leds { + compatible = "gpio-leds"; + + blue { + label = "blue:heartbeat"; + gpios = <&gpb2 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "heartbeat"; + }; + + green { + label = "green:activity"; + gpios = <&gpb2 1 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; + }; + + red { + label = "red:activity"; + gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc1"; + }; + }; }; &mmc_0 { -- 2.1.2 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 5/5] ARM: dts: exynos5410: Add ODROID-XU LEDs 2014-11-22 20:26 ` [PATCH v2 5/5] ARM: dts: exynos5410: Add ODROID-XU LEDs Andreas Färber @ 2014-11-23 1:31 ` Andreas Färber 0 siblings, 0 replies; 15+ messages in thread From: Andreas Färber @ 2014-11-23 1:31 UTC (permalink / raw) To: linux-arm-kernel Hello Hakjoo, Am 22.11.2014 um 21:26 schrieb Andreas F?rber: > Signed-off-by: Hakjoo Kim <ruppi.kim@hardkernel.com> Sorry, I was too quick here: Only the previous two patches got signed off by you, plus the last one on your 3.14 branch. Are you able to sign off all patches authored by you there? (An email reply indicating the Signed-off-by should do, if updating the branch is too much work.) Thanks, Andreas > Signed-off-by: Andreas F?rber <afaerber@suse.de> > --- > v1 -> v2: > * Filled in Sob from Hakjoo Kim > > arch/arm/boot/dts/exynos5410-odroidxu.dts | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm/boot/dts/exynos5410-odroidxu.dts b/arch/arm/boot/dts/exynos5410-odroidxu.dts > index 97310bb727e2..b02cd3ab7b38 100644 > --- a/arch/arm/boot/dts/exynos5410-odroidxu.dts > +++ b/arch/arm/boot/dts/exynos5410-odroidxu.dts > @@ -15,6 +15,7 @@ > > /dts-v1/; > #include "exynos5410.dtsi" > +#include <dt-bindings/gpio/gpio.h> > / { > model = "ODROID-XU based on EXYNOS5410"; > compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5"; > @@ -39,6 +40,30 @@ > reg = <0x02037000 0x1000>; > }; > > + leds { > + compatible = "gpio-leds"; > + > + blue { > + label = "blue:heartbeat"; > + gpios = <&gpb2 2 GPIO_ACTIVE_HIGH>; > + default-state = "off"; > + linux,default-trigger = "heartbeat"; > + }; > + > + green { > + label = "green:activity"; > + gpios = <&gpb2 1 GPIO_ACTIVE_HIGH>; > + default-state = "off"; > + linux,default-trigger = "mmc0"; > + }; > + > + red { > + label = "red:activity"; > + gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; > + default-state = "off"; > + linux,default-trigger = "mmc1"; > + }; > + }; > }; > > &mmc_0 { > -- SUSE LINUX GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend?rffer; HRB 21284 AG N?rnberg ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2014-12-28 11:16 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-11-22 20:26 [PATCH v2 0/5] ARM: EXYNOS: ODROID-XU DT and LEDs Andreas Färber 2014-11-22 20:26 ` [PATCH v2 1/5] ARM: dts: exynos5410: Clean up SMDK5410 indentation Andreas Färber 2014-11-22 20:26 ` [PATCH v2 2/5] ARM: dts: exynos5410: Prepare ODROID-XU device tree Andreas Färber 2014-11-22 20:26 ` [PATCH v2 3/5] pinctrl: exynos: add exynos5410 SoC specific data Andreas Färber 2014-11-22 21:49 ` Andreas Färber 2014-11-22 22:26 ` [PATCH v3 " Andreas Färber 2014-11-28 11:59 ` Linus Walleij 2014-11-28 12:07 ` Andreas Färber 2014-11-30 12:13 ` Tomasz Figa 2014-12-28 11:16 ` Tomasz Figa 2014-11-22 20:26 ` [PATCH v2 4/5] ARM: dts: add pinctrl support to Exynos5410 Andreas Färber 2014-11-23 17:18 ` Andreas Färber 2014-11-23 17:20 ` [PATCH v3 " Andreas Färber 2014-11-22 20:26 ` [PATCH v2 5/5] ARM: dts: exynos5410: Add ODROID-XU LEDs Andreas Färber 2014-11-23 1:31 ` Andreas Färber
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