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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Corey Minyard Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-02-19 15:24, minyard@acm.org wrote: > From: Corey Minyard [...] > After studying the EL0 handling for this, I realized an issue with > using > MDSCR to check if single step is enabled: it can be expensive on a VM. > So check the task flag first to see if single step is enabled. Then > check MDSCR if the task flag is set. Very tangential remark: I'd really like people *not* to try and optimize Linux based on the behaviour of a hypervisor. In general, reading a system register is fast, and the fact that it traps on a given hypervisor at some point may not be true in the future, nor be a valid assumption across hypervisors. M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel