From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/16] ARM: tegra: update DTs to expose legacy interrupt controller
Date: Tue, 2 Dec 2014 16:58:05 +0000 [thread overview]
Message-ID: <1417539497-20101-5-git-send-email-marc.zyngier@arm.com> (raw)
In-Reply-To: <1417539497-20101-1-git-send-email-marc.zyngier@arm.com>
Describe the legacy interrupt controller in every tegra DTSI files,
and make it the parent of most interrupts.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm/boot/dts/tegra114.dtsi | 16 +++++++++++++++-
arch/arm/boot/dts/tegra124.dtsi | 16 +++++++++++++++-
arch/arm/boot/dts/tegra20.dtsi | 15 ++++++++++++++-
arch/arm/boot/dts/tegra30.dtsi | 16 +++++++++++++++-
4 files changed, 59 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 222f3b3..b89454d 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -7,7 +7,7 @@
/ {
compatible = "nvidia,tegra114";
- interrupt-parent = <&gic>;
+ interrupt-parent = <&ictlr>;
host1x at 50000000 {
compatible = "nvidia,tegra114-host1x", "simple-bus";
@@ -129,6 +129,19 @@
<0x50046000 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-parent = <&gic>;
+ };
+
+ ictlr: interrupt-controller at 60004000 {
+ compatible = "nvidia,tegra114-ictlr", "nvidia,tegra-ictlr";
+ reg = <0x60004000 64>,
+ <0x60004100 64>,
+ <0x60004200 64>,
+ <0x60004300 64>,
+ <0x60004400 64>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
};
timer at 60005000 {
@@ -761,5 +774,6 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-parent = <&gic>;
};
};
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index df2b06b..e428655 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -8,7 +8,7 @@
/ {
compatible = "nvidia,tegra124";
- interrupt-parent = <&gic>;
+ interrupt-parent = <&ictlr>;
#address-cells = <2>;
#size-cells = <2>;
@@ -167,6 +167,7 @@
<0x0 0x50046000 0x0 0x2000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-parent = <&gic>;
};
gpu at 0,57000000 {
@@ -184,6 +185,18 @@
status = "disabled";
};
+ ictlr: interrupt-controller at 60004000 {
+ compatible = "nvidia,tegra124-ictlr", "nvidia,tegra-ictlr";
+ reg = <0x0 0x60004000 0x0 0x40>,
+ <0x0 0x60004100 0x0 0x40>,
+ <0x0 0x60004200 0x0 0x40>,
+ <0x0 0x60004300 0x0 0x40>,
+ <0x0 0x60004400 0x0 0x40>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&gic>;
+ };
+
timer at 0,60005000 {
compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
reg = <0x0 0x60005000 0x0 0x400>;
@@ -891,5 +904,6 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupt-parent = <&gic>;
};
};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 8acf5d8..ab2f004 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -7,7 +7,7 @@
/ {
compatible = "nvidia,tegra20";
- interrupt-parent = <&intc>;
+ interrupt-parent = <&ictlr>;
host1x at 50000000 {
compatible = "nvidia,tegra20-host1x", "simple-bus";
@@ -142,6 +142,7 @@
timer at 50004600 {
compatible = "arm,cortex-a9-twd-timer";
+ interrupt-parent = <&intc>;
reg = <0x50040600 0x20>;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -154,6 +155,7 @@
0x50040100 0x0100>;
interrupt-controller;
#interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
};
cache-controller at 50043000 {
@@ -165,6 +167,17 @@
cache-level = <2>;
};
+ ictlr: interrupt-controller at 60004000 {
+ compatible = "nvidia,tegra20-ictlr", "nvidia,tegra-ictlr";
+ reg = <0x60004000 64>,
+ <0x60004100 64>,
+ <0x60004200 64>,
+ <0x60004300 64>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
+ };
+
timer at 60005000 {
compatible = "nvidia,tegra20-timer";
reg = <0x60005000 0x60>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index b270b9e..4490f8c 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -7,7 +7,7 @@
/ {
compatible = "nvidia,tegra30";
- interrupt-parent = <&intc>;
+ interrupt-parent = <&ictlr>;
pcie-controller at 00003000 {
compatible = "nvidia,tegra30-pcie";
@@ -223,6 +223,7 @@
timer at 50004600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
+ interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&tegra_car TEGRA30_CLK_TWD>;
@@ -234,6 +235,7 @@
0x50040100 0x0100>;
interrupt-controller;
#interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
};
cache-controller at 50043000 {
@@ -245,6 +247,18 @@
cache-level = <2>;
};
+ ictlr: interrupt-controller at 60004000 {
+ compatible = "nvidia,tegra30-ictlr", "nvidia,tegra-ictlr";
+ reg = <0x60004000 64>,
+ <0x60004100 64>,
+ <0x60004200 64>,
+ <0x60004300 64>,
+ <0x60004400 64>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
+ };
+
timer at 60005000 {
compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
reg = <0x60005000 0x400>;
--
2.1.3
next prev parent reply other threads:[~2014-12-02 16:58 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-02 16:58 [PATCH 00/16] irqchip: gic: killing gic_arch_extn, slowly Marc Zyngier
2014-12-02 16:58 ` [PATCH 01/16] ARM: tegra: irq: nuke leftovers from non-DT support Marc Zyngier
2014-12-02 16:58 ` [PATCH 02/16] irqchip: tegra: add DT-based support for legacy interrupt controller Marc Zyngier
2014-12-02 16:58 ` [PATCH 03/16] ARM: tegra: skip gic_arch_extn setup if DT has a LIC node Marc Zyngier
2014-12-02 16:58 ` Marc Zyngier [this message]
2014-12-02 16:58 ` [PATCH 05/16] DT: tegra: add binding for the legacy interrupt controller Marc Zyngier
2014-12-02 16:58 ` [PATCH 06/16] ARM: tegra: remove old LIC support Marc Zyngier
2014-12-02 16:58 ` [PATCH 07/16] ARM: omap: convert wakeupgen to stacked domains Marc Zyngier
2014-12-02 16:58 ` [PATCH 08/16] DT: omap4/5: add binding for the wake-up generator Marc Zyngier
2014-12-02 16:58 ` [PATCH 09/16] ARM: imx6: convert wakeupgen to stacked domains Marc Zyngier
2014-12-06 16:08 ` Stefan Agner
2014-12-08 11:18 ` Marc Zyngier
2014-12-02 16:58 ` [PATCH 10/16] ARM: exynos4/5: convert pmu wakeup " Marc Zyngier
2014-12-02 16:58 ` [PATCH 11/16] DT: exynos: update PMU binding Marc Zyngier
2014-12-02 16:58 ` [PATCH 12/16] irqchip: gic: add an entry point to set up irqchip flags Marc Zyngier
2014-12-02 16:58 ` [PATCH 13/16] ARM: shmobile: remove use of gic_arch_extn.irq_set_wake Marc Zyngier
2014-12-04 6:39 ` Simon Horman
2014-12-04 8:57 ` Marc Zyngier
2014-12-04 11:46 ` Simon Horman
2014-12-02 16:58 ` [PATCH 14/16] ARM: ux500: switch from gic_arch_extn to gic_set_irqchip_flags Marc Zyngier
2014-12-03 13:52 ` Linus Walleij
2014-12-02 16:58 ` [PATCH 15/16] ARM: zynq: " Marc Zyngier
2014-12-02 16:58 ` [PATCH 16/16] irqchip: gic: Drop support for gic_arch_extn Marc Zyngier
2014-12-03 14:30 ` [PATCH 00/16] irqchip: gic: killing gic_arch_extn, slowly Arnd Bergmann
2014-12-03 14:59 ` Marc Zyngier
2014-12-03 20:32 ` Arnd Bergmann
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