From: geoff@infradead.org (Geoff Levand)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/8] arm64: Convert hcalls to use ISS field
Date: Fri, 30 Jan 2015 15:33:48 -0800 [thread overview]
Message-ID: <1422660828.21823.40.camel@infradead.org> (raw)
In-Reply-To: <6719b2520095926ae0e8ac888663b87f2098f565.1421449714.git.geoff@infradead.org>
To allow for additional hcalls to be defined and to make the arm64 hcall API
more consistent across exception vector routines, change the hcall implementations
to use the ISS field of the ESR_EL2 register to specify the hcall type.
The existing arm64 hcall implementations are limited in that they only allow
for two distinct hcalls; with the x0 register either zero, or not zero. Also,
the API of the hyp-stub exception vector routines and the KVM exception vector
routines differ; hyp-stub uses a non-zero value in x0 to implement
__hyp_set_vectors, whereas KVM uses it to implement kvm_call_hyp.
Define three new preprocessor macros HVC_CALL_HYP, HVC_GET_VECTORS, and
HVC_SET_VECTORS to be used as hcall type specifiers and convert the
existing __hyp_get_vectors(), __hyp_set_vectors() and kvm_call_hyp() routines
to use these new macros when executing an HVC call. Also change the
corresponding hyp-stub and KVM el1_sync exception vector routines to use these
new macros.
Signed-off-by: Geoff Levand <geoff@infradead.org>
---
arch/arm64/include/asm/virt.h | 27 +++++++++++++++++++++++++++
arch/arm64/kernel/hyp-stub.S | 32 +++++++++++++++++++++-----------
arch/arm64/kernel/psci.c | 3 ++-
arch/arm64/kvm/hyp.S | 16 +++++++++-------
4 files changed, 59 insertions(+), 19 deletions(-)
diff --git a/arch/arm64/include/asm/virt.h b/arch/arm64/include/asm/virt.h
index 7a5df52..eb10368 100644
--- a/arch/arm64/include/asm/virt.h
+++ b/arch/arm64/include/asm/virt.h
@@ -18,6 +18,33 @@
#ifndef __ASM__VIRT_H
#define __ASM__VIRT_H
+/*
+ * The arm64 hcall implementation uses the ISS field of the ESR_EL2 register to
+ * specify the hcall type. The exception handlers are allowed to use registers
+ * x17 and x18 in their implementation. Any routine issuing an hcall must not
+ * expect these registers to be preserved.
+ */
+
+/*
+ * HVC_CALL_HYP - Execute a hyp routine.
+ */
+
+#define HVC_CALL_HYP 0
+
+/*
+ * HVC_GET_VECTORS - Return the value of the vbar_el2 register.
+ */
+
+#define HVC_GET_VECTORS 1
+
+/*
+ * HVC_SET_VECTORS - Set the value of the vbar_el2 register.
+ *
+ * @x0: Physical address of the new vector table.
+ */
+
+#define HVC_SET_VECTORS 2
+
#define BOOT_CPU_MODE_EL1 (0xe11)
#define BOOT_CPU_MODE_EL2 (0xe12)
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
index a272f33..017ab519 100644
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -22,6 +22,7 @@
#include <linux/irqchip/arm-gic-v3.h>
#include <asm/assembler.h>
+#include <asm/kvm_arm.h>
#include <asm/ptrace.h>
#include <asm/virt.h>
@@ -53,14 +54,22 @@ ENDPROC(__hyp_stub_vectors)
.align 11
el1_sync:
- mrs x1, esr_el2
- lsr x1, x1, #26
- cmp x1, #0x16
+ mrs x18, esr_el2
+ lsr x17, x18, #ESR_ELx_EC_SHIFT
+ and x18, x18, #ESR_ELx_ISS_MASK
+
+ cmp x17, #ESR_ELx_EC_HVC64
b.ne 2f // Not an HVC trap
- cbz x0, 1f
- msr vbar_el2, x0 // Set vbar_el2
+
+ cmp x18, #HVC_GET_VECTORS
+ b.ne 1f
+ mrs x0, vbar_el2
b 2f
-1: mrs x0, vbar_el2 // Return vbar_el2
+
+1: cmp x18, #HVC_SET_VECTORS
+ b.ne 2f
+ msr vbar_el2, x0
+
2: eret
ENDPROC(el1_sync)
@@ -100,11 +109,12 @@ ENDPROC(\label)
* initialisation entry point.
*/
-ENTRY(__hyp_get_vectors)
- mov x0, xzr
- // fall through
ENTRY(__hyp_set_vectors)
- hvc #0
+ hvc #HVC_SET_VECTORS
ret
-ENDPROC(__hyp_get_vectors)
ENDPROC(__hyp_set_vectors)
+
+ENTRY(__hyp_get_vectors)
+ hvc #HVC_GET_VECTORS
+ ret
+ENDPROC(__hyp_get_vectors)
diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c
index 3425f31..7043fd7 100644
--- a/arch/arm64/kernel/psci.c
+++ b/arch/arm64/kernel/psci.c
@@ -123,7 +123,8 @@ static noinline int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1,
__asmeq("%3", "x3")
"hvc #0\n"
: "+r" (function_id)
- : "r" (arg0), "r" (arg1), "r" (arg2));
+ : "r" (arg0), "r" (arg1), "r" (arg2)
+ : "x17", "x18");
return function_id;
}
diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index c0d8202..42c9851 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -27,6 +27,7 @@
#include <asm/kvm_asm.h>
#include <asm/kvm_mmu.h>
#include <asm/memory.h>
+#include <asm/virt.h>
#define CPU_GP_REG_OFFSET(x) (CPU_GP_REGS + x)
#define CPU_XREG_OFFSET(x) CPU_GP_REG_OFFSET(CPU_USER_PT_REGS + 8*x)
@@ -1106,12 +1107,9 @@ __hyp_panic_str:
* in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c). Return values are
* passed in r0 and r1.
*
- * A function pointer with a value of 0 has a special meaning, and is
- * used to implement __hyp_get_vectors in the same way as in
- * arch/arm64/kernel/hyp_stub.S.
*/
ENTRY(kvm_call_hyp)
- hvc #0
+ hvc #HVC_CALL_HYP
ret
ENDPROC(kvm_call_hyp)
@@ -1142,6 +1140,7 @@ el1_sync: // Guest trapped into EL2
mrs x1, esr_el2
lsr x2, x1, #ESR_ELx_EC_SHIFT
+ and x0, x1, #ESR_ELx_ISS_MASK
cmp x2, #ESR_ELx_EC_HVC64
b.ne el1_trap
@@ -1150,15 +1149,18 @@ el1_sync: // Guest trapped into EL2
cbnz x3, el1_trap // called HVC
/* Here, we're pretty sure the host called HVC. */
+ mov x18, x0
pop x2, x3
pop x0, x1
- /* Check for __hyp_get_vectors */
- cbnz x0, 1f
+ cmp x18, #HVC_GET_VECTORS
+ b.ne 1f
mrs x0, vbar_el2
b 2f
-1: push lr, xzr
+1: /* Default to HVC_CALL_HYP. */
+
+ push lr, xzr
/*
* Compute the function address in EL2, and shuffle the parameters.
--
2.1.0
next prev parent reply other threads:[~2015-01-30 23:33 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1415926876.git.geoff@infradead.orgg>
2015-01-17 0:23 ` [PATCH 0/8] arm64 kexec kernel patches V7 Geoff Levand
2015-01-17 0:23 ` [PATCH 4/8] arm64: Add EL2 switch to soft_restart Geoff Levand
2015-01-26 19:02 ` Mark Rutland
2015-01-26 21:48 ` Geoff Levand
2015-01-27 16:46 ` Mark Rutland
2015-01-27 18:34 ` Geoff Levand
2015-01-27 17:57 ` Catalin Marinas
2015-01-30 21:47 ` Geoff Levand
2015-01-17 0:23 ` [PATCH 6/8] arm64/kexec: Add pr_devel output Geoff Levand
2015-01-17 0:23 ` [PATCH 3/8] arm64: Add new hcall HVC_CALL_FUNC Geoff Levand
2015-01-27 17:39 ` Catalin Marinas
2015-01-27 18:00 ` Mark Rutland
2015-01-30 21:52 ` Geoff Levand
2015-01-17 0:23 ` [PATCH 8/8] arm64/kexec: Enable kexec in the arm64 defconfig Geoff Levand
2015-01-17 0:23 ` [PATCH 5/8] arm64/kexec: Add core kexec support Geoff Levand
2015-01-26 19:16 ` Mark Rutland
2015-01-17 0:23 ` [PATCH 2/8] arm64: Convert hcalls to use ISS field Geoff Levand
2015-01-26 18:26 ` Catalin Marinas
2015-01-30 23:31 ` Geoff Levand
2015-02-02 16:04 ` Catalin Marinas
2015-01-30 23:33 ` Geoff Levand [this message]
2015-02-19 20:57 ` [PATCH v2 " Christoffer Dall
2015-02-25 22:09 ` Geoff Levand
2015-03-02 22:13 ` Christoffer Dall
2015-03-02 23:22 ` Geoff Levand
2015-03-03 21:47 ` Christopher Covington
2015-03-03 22:35 ` Geoff Levand
2015-01-17 0:23 ` [PATCH 1/8] arm64: Move proc-macros.S to include/asm Geoff Levand
2015-01-26 17:45 ` Catalin Marinas
2015-01-27 19:33 ` [PATCH V2 1/8] arm64: Fold proc-macros.S into assembler.h Geoff Levand
2015-01-17 0:23 ` [PATCH 7/8] arm64/kexec: Add checks for KVM Geoff Levand
2015-01-26 19:19 ` Mark Rutland
2015-01-26 20:39 ` Christoffer Dall
2015-01-26 20:58 ` Geoff Levand
2015-01-26 21:00 ` Geoff Levand
2015-01-29 9:36 ` AKASHI Takahiro
2015-01-29 9:57 ` AKASHI Takahiro
2015-01-29 10:59 ` Marc Zyngier
2015-01-29 18:47 ` Mark Rutland
2015-01-30 6:10 ` AKASHI Takahiro
2015-01-30 12:14 ` Mark Rutland
2015-01-30 19:48 ` Geoff Levand
2015-02-02 8:18 ` AKASHI Takahiro
2015-02-06 0:11 ` Geoff Levand
2015-02-06 4:18 ` AKASHI Takahiro
2015-02-06 7:06 ` Geoff Levand
2015-01-26 17:44 ` [PATCH 0/8] arm64 kexec kernel patches V7 Catalin Marinas
2015-01-26 18:37 ` Grant Likely
2015-01-26 18:55 ` Mark Rutland
2015-01-26 20:57 ` Geoff Levand
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1422660828.21823.40.camel@infradead.org \
--to=geoff@infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).