[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Srinivas Kandagatla]

This patch adds rpm node to apq8064 dt as rpm would be used by other
devices for regulator support. Also adds all the regulators in the rpm.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 241 ++++++++++++++++++++++++++++++++++++
 1 file changed, 241 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index b3154c0..db5fc59 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -3,6 +3,7 @@
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
@@ -246,6 +247,246 @@
 			#reset-cells = <1>;
 		};
 
+		l2cc: clock-controller at 2011000 {
+			compatible	= "syscon";
+			reg		= <0x2011000 0x1000>;
+		};
+
+		rpm at 108000 {
+			compatible	= "qcom,rpm-apq8064";
+			reg		= <0x108000 0x1000>;
+			qcom,ipc	= <&l2cc 0x8 2>;
+
+			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
+			interrupt-names	= "ack", "err", "wakeup";
+
+			#address-cells	= <1>;
+			#size-cells	= <0>;
+
+			/* Buck SMPS */
+			pm8921_s1: pm8921-s1 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS1>;
+			};
+
+			pm8921_s2: pm8921-s2 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS2>;
+			};
+
+			pm8921_s3: pm8921-s3 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS3>;
+			};
+
+			pm8921_s4: pm8921-s4 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS4>;
+			};
+
+			pm8921_s5: pm8921-s5 {
+				compatible	= "qcom,rpm-pm8921-ftsmps";
+				reg		= <QCOM_RPM_PM8921_SMPS5>;
+			};
+
+			pm8921_s6: pm8921-s6 {
+				compatible	= "qcom,rpm-pm8921-ftsmps";
+				reg		= <QCOM_RPM_PM8921_SMPS6>;
+			};
+
+			pm8921_s7: pm8921-s7 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS7>;
+			};
+
+			pm8921_s8: pm8921-s8 {
+				compatible	= "qcom,rpm-pm8921-smps";
+				reg		= <QCOM_RPM_PM8921_SMPS8>;
+			};
+
+			/* PMOS LDO */
+			pm8921_l1: pm8921-l1 {
+				compatible	= "qcom,rpm-pm8921-nldo";
+				reg		= <QCOM_RPM_PM8921_LDO1>;
+			};
+
+			pm8921_l2: pm8921-l2 {
+				compatible	= "qcom,rpm-pm8921-nldo";
+				reg		= <QCOM_RPM_PM8921_LDO2>;
+			};
+
+			pm8921_l3: pm8921-l3 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO3>;
+			};
+
+			pm8921_l4: pm8921-l4 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO4>;
+			};
+
+			pm8921_l5: pm8921-l5 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO5>;
+			};
+
+			pm8921_l6: pm8921-l6 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO6>;
+			};
+
+			pm8921_l7: pm8921-l7 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO7>;
+			};
+
+			pm8921_l8: pm8921-l8 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO8>;
+			};
+
+			pm8921_l9: pm8921-l9 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO9>;
+			};
+
+			pm8921_l10: pm8921-l10 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO10>;
+			};
+
+			pm8921_l11: pm8921-l11 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO11>;
+			};
+
+			pm8921_l12: pm8921-l12 {
+				compatible	= "qcom,rpm-pm8921-nldo";
+				reg		= <QCOM_RPM_PM8921_LDO12>;
+			};
+
+			pm8921_l14: pm8921-l14 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO14>;
+			};
+
+			pm8921_l15: pm8921-l15 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO15>;
+			};
+
+			pm8921_l16: pm8921-l16 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO16>;
+			};
+
+			pm8921_l17: pm8921-l17 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO17>;
+			};
+
+			pm8921_l18: pm8921-l18 {
+				compatible	= "qcom,rpm-pm8921-nldo";
+				reg		= <QCOM_RPM_PM8921_LDO18>;
+			};
+
+			pm8921_l21: pm8921-l21 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO21>;
+			};
+
+			pm8921_l22: pm8921-l22 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO22>;
+			};
+
+			pm8921_l23: pm8921-l23 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO23>;
+			};
+
+			pm8921_l24: pm8921-l24 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO24>;
+			};
+
+			pm8921_l25: pm8921-l25 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO25>;
+			};
+
+			pm8921_l26: pm8921-l26 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO26>;
+			};
+
+			pm8921_l27: pm8921-l27 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO27>;
+			};
+
+			pm8921_l28: pm8921-l28 {
+				compatible	= "qcom,rpm-pm8921-nldo1200";
+				reg		= <QCOM_RPM_PM8921_LDO28>;
+			};
+
+			pm8921_l29: pm8921-l29 {
+				compatible	= "qcom,rpm-pm8921-pldo";
+				reg		= <QCOM_RPM_PM8921_LDO29>;
+			};
+
+			/* Low Voltage Switch */
+			pm8921_lvs1: pm8921-lvs1 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS1>;
+			};
+
+			pm8921_lvs2: pm8921-lvs2 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS2>;
+			};
+
+			pm8921_lvs3: pm8921-lvs3 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS3>;
+			};
+
+			pm8921_lvs4: pm8921-lvs4 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS4>;
+			};
+
+			pm8921_lvs5: pm8921-lvs5 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS5>;
+			};
+
+			pm8921_lvs6: pm8921-lvs6 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS6>;
+			};
+
+			pm8921_lvs7: pm8921-lvs7 {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_PM8921_LVS7>;
+			};
+
+			pm8921_usb_switch: pm8921-usb-switch {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_USB_OTG_SWITCH>;
+			};
+
+			pm8921_hdmi_switch: pm8921-hdmi-switch {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_HDMI_SWITCH>;
+			};
+
+			pm8921_ncp: pm8921-ncp {
+				compatible	= "qcom,rpm-pm8921-ncp";
+				reg		= <QCOM_RPM_PM8921_NCP>;
+			};
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Kumar Gala]

On Feb 23, 2015, at 1:54 AM, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote:

> This patch adds rpm node to apq8064 dt as rpm would be used by other
> devices for regulator support. Also adds all the regulators in the rpm.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> arch/arm/boot/dts/qcom-apq8064.dtsi | 241 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 241 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index b3154c0..db5fc59 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -3,6 +3,7 @@
> #include "skeleton.dtsi"
> #include <dt-bindings/clock/qcom,gcc-msm8960.h>
> #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
> +#include <dt-bindings/mfd/qcom-rpm.h>
> #include <dt-bindings/soc/qcom,gsbi.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> 
> @@ -246,6 +247,246 @@
> 			#reset-cells = <1>;
> 		};
> 
> +		l2cc: clock-controller at 2011000 {
> +			compatible	= "syscon";
> +			reg		= <0x2011000 0x1000>;
> +		};
> +
> +		rpm at 108000 {
> +			compatible	= "qcom,rpm-apq8064";
> +			reg		= <0x108000 0x1000>;
> +			qcom,ipc	= <&l2cc 0x8 2>;
> +
> +			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
> +			interrupt-names	= "ack", "err", "wakeup";
> +

Can you use the defines for GIC for the interrupts.  Also, I think the last property should probably be level high instead of 0.

- k
-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Srinivas Kandagatla]

On 26/02/15 18:25, Kumar Gala wrote:
>
> On Feb 23, 2015, at 1:54 AM, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote:
>
>> This patch adds rpm node to apq8064 dt as rpm would be used by other
>> devices for regulator support. Also adds all the regulators in the rpm.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>> arch/arm/boot/dts/qcom-apq8064.dtsi | 241 ++++++++++++++++++++++++++++++++++++
>> 1 file changed, 241 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
>> index b3154c0..db5fc59 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
>> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
>> @@ -3,6 +3,7 @@
>> #include "skeleton.dtsi"
>> #include <dt-bindings/clock/qcom,gcc-msm8960.h>
>> #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
>> +#include <dt-bindings/mfd/qcom-rpm.h>
>> #include <dt-bindings/soc/qcom,gsbi.h>
>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>>
>> @@ -246,6 +247,246 @@
>> 			#reset-cells = <1>;
>> 		};
>>
>> +		l2cc: clock-controller at 2011000 {
>> +			compatible	= "syscon";
>> +			reg		= <0x2011000 0x1000>;
>> +		};
>> +
>> +		rpm at 108000 {
>> +			compatible	= "qcom,rpm-apq8064";
>> +			reg		= <0x108000 0x1000>;
>> +			qcom,ipc	= <&l2cc 0x8 2>;
>> +
>> +			interrupts	= <0 19 0>, <0 21 0>, <0 22 0>;
>> +			interrupt-names	= "ack", "err", "wakeup";
>> +
>
> Can you use the defines for GIC for the interrupts.  Also, I think the last property should probably be level high instead of 0.
Yep, I will fix it.

--srini


>
> - k
>

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Bjorn Andersson]

On Thu, Feb 26, 2015 at 10:25 AM, Kumar Gala <galak@codeaurora.org> wrote:
>
> On Feb 23, 2015, at 1:54 AM, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote:
>
>> This patch adds rpm node to apq8064 dt as rpm would be used by other
>> devices for regulator support. Also adds all the regulators in the rpm.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
[..]
>> +                     interrupts      = <0 19 0>, <0 21 0>, <0 22 0>;
>> +                     interrupt-names = "ack", "err", "wakeup";
>> +
>
> Can you use the defines for GIC for the interrupts.  Also, I think the last property should probably be level high instead of 0.
>

The code sets it to rising, but better move that to the dt (as you suggest).

Regards,
Bjorn

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Bjorn Andersson]

On Sun, Feb 22, 2015 at 11:54 PM, Srinivas Kandagatla
<srinivas.kandagatla@linaro.org> wrote:
> This patch adds rpm node to apq8064 dt as rpm would be used by other
> devices for regulator support. Also adds all the regulators in the rpm.
>

This looks good, with Kumars suggestion of GIT defines
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>

However, this binding is not merged yet and Stephen have requesting a
complete redesign of the binding as well as the code. So that has to
be concluded first, I presume.


Separate of that, as it's highly likely that everyone will follow the
pcb design guidelines for apq8064 the vin-supplies should be okay to
specify at this level (and not in all board files). Perhaps also the
switching frequencies for the SMPSs?

Regards,
Bjorn

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Bjorn Andersson]

On Thu, Feb 26, 2015 at 11:00 AM, Bjorn Andersson <bjorn@kryo.se> wrote:
> On Sun, Feb 22, 2015 at 11:54 PM, Srinivas Kandagatla
> <srinivas.kandagatla@linaro.org> wrote:
>> This patch adds rpm node to apq8064 dt as rpm would be used by other
>> devices for regulator support. Also adds all the regulators in the rpm.
>>
>
> This looks good, with Kumars suggestion of GIT defines

"GIC", stupid manual autocomplete.

Regards,
Bjorn

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Srinivas Kandagatla]

On 26/02/15 19:00, Bjorn Andersson wrote:
> On Sun, Feb 22, 2015 at 11:54 PM, Srinivas Kandagatla
> <srinivas.kandagatla@linaro.org> wrote:
>> This patch adds rpm node to apq8064 dt as rpm would be used by other
>> devices for regulator support. Also adds all the regulators in the rpm.
>>
>
> This looks good, with Kumars suggestion of GIT defines
> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
>
Thanks Bjorn for Review.

> However, this binding is not merged yet and Stephen have requesting a
> complete redesign of the binding as well as the code. So that has to
> be concluded first, I presume.
>
Hmm, I know, It does not make sense to keep these patches locally 
waiting for something to change in future, Am not sure when those new 
changes be actually merged into the mainline?

IMHO, we should merge this patches as they are perfectly applicable to 
whats on linus-tree. And fix if required when the new design is accepted.

>
> Separate of that, as it's highly likely that everyone will follow the
> pcb design guidelines for apq8064 the vin-supplies should be okay to
> specify at this level (and not in all board files). Perhaps also the
> switching frequencies for the SMPSs?

I will investigate on this and see If I can add some more useful 
contents to the nodes.

Thanks,
srini
>
> Regards,
> Bjorn
>

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Stephen Boyd]

On 02/22/15 23:54, Srinivas Kandagatla wrote:
> +			pm8921_s5: pm8921-s5 {
> +				compatible	= "qcom,rpm-pm8921-ftsmps";
> +				reg		= <QCOM_RPM_PM8921_SMPS5>;
> +			};
> +
> +			pm8921_s6: pm8921-s6 {
> +				compatible	= "qcom,rpm-pm8921-ftsmps";
> +				reg		= <QCOM_RPM_PM8921_SMPS6>;
> +			};
> +

There's no RPM control for S5 and S6. Please remove. Also, has this been
tested?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Srinivas Kandagatla]

On 26/02/15 19:31, Stephen Boyd wrote:
> On 02/22/15 23:54, Srinivas Kandagatla wrote:
>> +			pm8921_s5: pm8921-s5 {
>> +				compatible	= "qcom,rpm-pm8921-ftsmps";
>> +				reg		= <QCOM_RPM_PM8921_SMPS5>;
>> +			};
>> +
>> +			pm8921_s6: pm8921-s6 {
>> +				compatible	= "qcom,rpm-pm8921-ftsmps";
>> +				reg		= <QCOM_RPM_PM8921_SMPS6>;
>> +			};
>> +
>
> There's no RPM control for S5 and S6. Please remove. Also, has this been
> tested?
>
Ahh. these are SAW regulators, I will remove it from the list.
Obviously, I did not test all the regulators.

--srini

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Stephen Boyd]

On 02/26/15 12:09, Srinivas Kandagatla wrote:
>
>
> On 26/02/15 19:31, Stephen Boyd wrote:
>> On 02/22/15 23:54, Srinivas Kandagatla wrote:
>>> +            pm8921_s5: pm8921-s5 {
>>> +                compatible    = "qcom,rpm-pm8921-ftsmps";
>>> +                reg        = <QCOM_RPM_PM8921_SMPS5>;
>>> +            };
>>> +
>>> +            pm8921_s6: pm8921-s6 {
>>> +                compatible    = "qcom,rpm-pm8921-ftsmps";
>>> +                reg        = <QCOM_RPM_PM8921_SMPS6>;
>>> +            };
>>> +
>>
>> There's no RPM control for S5 and S6. Please remove. Also, has this been
>> tested?
>>
> Ahh. these are SAW regulators, I will remove it from the list.
> Obviously, I did not test all the regulators.

There are some more that don't seem to match what we have downstream.
L26 is also SAW related, and the usb and hdmi switches are "locally"
controlled via ssbi pmic writes.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 01/12] ARM: dts: apq8064: add RPM regulators support

[Bjorn Andersson]

On Thu, Feb 26, 2015 at 12:11 PM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 02/26/15 12:09, Srinivas Kandagatla wrote:
>>
>>
>> On 26/02/15 19:31, Stephen Boyd wrote:
>>> On 02/22/15 23:54, Srinivas Kandagatla wrote:
>>>> +            pm8921_s5: pm8921-s5 {
>>>> +                compatible    = "qcom,rpm-pm8921-ftsmps";
>>>> +                reg        = <QCOM_RPM_PM8921_SMPS5>;
>>>> +            };
>>>> +
>>>> +            pm8921_s6: pm8921-s6 {
>>>> +                compatible    = "qcom,rpm-pm8921-ftsmps";
>>>> +                reg        = <QCOM_RPM_PM8921_SMPS6>;
>>>> +            };
>>>> +
>>>
>>> There's no RPM control for S5 and S6. Please remove. Also, has this been
>>> tested?
>>>
>> Ahh. these are SAW regulators, I will remove it from the list.
>> Obviously, I did not test all the regulators.
>
> There are some more that don't seem to match what we have downstream.
> L26 is also SAW related, and the usb and hdmi switches are "locally"
> controlled via ssbi pmic writes.
>

According to msm-3.4 all three are controlled by pm8xxx-regulator, but
they are also exposed through the RPM - which I think I tested (a year
ago or so).

Regards,
Bjorn

[PATCH 02/12] ARM: dts: apq8064: Add usb host support.

[Srinivas Kandagatla]

This patch adds device tree nodes to support two usb hosts on APQ8064
SOC.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 40 +++++++++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 47 ++++++++++++++++++++++++++++++
 2 files changed, 87 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index e641001..40657a4 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -49,6 +49,46 @@
 			};
 		};
 
+		rpm at 108000 {
+			pm8921_s3: pm8921-s3 {
+				regulator-min-microvolt		= <1000000>;
+				regulator-max-microvolt		= <1400000>;
+				qcom,switch-mode-frequency	= <4800000>;
+			};
+
+			pm8921_l3: pm8921-l3 {
+				regulator-min-microvolt = <3050000>;
+				regulator-max-microvolt = <3300000>;
+			};
+
+			pm8921_l23: pm8921-l23 {
+				regulator-min-microvolt = <1700000>;
+				regulator-max-microvolt = <1900000>;
+			};
+		};
+
+		usb3_phy: phy at 12520000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb4_phy: phy at 12530000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l23>;
+		};
+
+		usb3: usb at 12520000 {
+			status = "okay";
+		};
+
+		usb4: usb at 12530000 {
+			status = "okay";
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index db5fc59..e33eb03 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -2,6 +2,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
+#include <dt-bindings/reset/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
 #include <dt-bindings/mfd/qcom-rpm.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
@@ -487,6 +488,52 @@
 			};
 		};
 
+		usb3_phy: phy at 12520000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12520000 0x400>;
+			interrupts	= <0 188 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS3_XCVR_CLK>,
+					  <&gcc USB_HS3_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS3_RESET>;
+			reset-names	= "link";
+		};
+
+		usb4_phy: phy at 12530000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12530000 0x400>;
+			interrupts	= <0 215 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS4_XCVR_CLK>,
+					  <&gcc USB_HS4_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS4_RESET>;
+			reset-names	= "link";
+		};
+
+		usb3: usb at 12520000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12520000 0x400>;
+			interrupts	= <0 188 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb3_phy>;
+		};
+
+		usb4: usb at 12530000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12530000 0x400>;
+			interrupts	= <0 215 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb4_phy>;
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

[PATCH 02/12] ARM: dts: apq8064: Add usb host support.

[Kumar Gala]

On Feb 23, 2015, at 1:55 AM, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote:

> This patch adds device tree nodes to support two usb hosts on APQ8064
> SOC.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 40 +++++++++++++++++++++++++
> arch/arm/boot/dts/qcom-apq8064.dtsi        | 47 ++++++++++++++++++++++++++++++
> 2 files changed, 87 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> index e641001..40657a4 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> @@ -49,6 +49,46 @@
> 			};
> 		};
> 
> +		rpm at 108000 {
> +			pm8921_s3: pm8921-s3 {
> +				regulator-min-microvolt		= <1000000>;
> +				regulator-max-microvolt		= <1400000>;
> +				qcom,switch-mode-frequency	= <4800000>;
> +			};
> +
> +			pm8921_l3: pm8921-l3 {
> +				regulator-min-microvolt = <3050000>;
> +				regulator-max-microvolt = <3300000>;
> +			};
> +
> +			pm8921_l23: pm8921-l23 {
> +				regulator-min-microvolt = <1700000>;
> +				regulator-max-microvolt = <1900000>;
> +			};
> +		};
> +
> +		usb3_phy: phy at 12520000 {
> +			status		= "okay";
> +			vddcx-supply	= <&pm8921_s3>;
> +			v3p3-supply	= <&pm8921_l3>;
> +			v1p8-supply	= <&pm8921_l23>;
> +		};
> +
> +		usb4_phy: phy at 12530000 {
> +			status		= "okay";
> +			vddcx-supply	= <&pm8921_s3>;
> +			v3p3-supply	= <&pm8921_l3>;
> +			v1p8-supply	= <&pm8921_l23>;
> +		};
> +
> +		usb3: usb at 12520000 {
> +			status = "okay";
> +		};
> +
> +		usb4: usb at 12530000 {
> +			status = "okay";
> +		};
> +
> 		amba {
> 			/* eMMC */
> 			sdcc1: sdcc at 12400000 {
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index db5fc59..e33eb03 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -2,6 +2,7 @@
> 
> #include "skeleton.dtsi"
> #include <dt-bindings/clock/qcom,gcc-msm8960.h>
> +#include <dt-bindings/reset/qcom,gcc-msm8960.h>
> #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
> #include <dt-bindings/mfd/qcom-rpm.h>
> #include <dt-bindings/soc/qcom,gsbi.h>
> @@ -487,6 +488,52 @@
> 			};
> 		};
> 
> +		usb3_phy: phy at 12520000 {
> +			compatible	= "qcom,usb-otg-ci";
> +			reg		= <0x12520000 0x400>;
> +			interrupts	= <0 188 IRQ_TYPE_NONE>;

I think the IRQ_TYPE should be IRQ_TYPE_LEVEL_HIGH (same for all other interrupts)

Also can we use GIC_SPI

> +			status		= "disabled";
> +			dr_mode		= "host";
> +
> +			clocks		= <&gcc USB_HS3_XCVR_CLK>,
> +					  <&gcc USB_HS3_H_CLK>;
> +			clock-names	= "core", "iface";
> +
> +			resets		= <&gcc USB_HS3_RESET>;
> +			reset-names	= "link";
> +		};
> +
> +		usb4_phy: phy at 12530000 {
> +			compatible	= "qcom,usb-otg-ci";
> +			reg		= <0x12530000 0x400>;
> +			interrupts	= <0 215 IRQ_TYPE_NONE>;
> +			status		= "disabled";
> +			dr_mode		= "host";
> +
> +			clocks		= <&gcc USB_HS4_XCVR_CLK>,
> +					  <&gcc USB_HS4_H_CLK>;
> +			clock-names	= "core", "iface";
> +
> +			resets		= <&gcc USB_HS4_RESET>;
> +			reset-names	= "link";
> +		};
> +
> +		usb3: usb at 12520000 {
> +			compatible	= "qcom,ehci-host";
> +			reg		= <0x12520000 0x400>;
> +			interrupts	= <0 188 IRQ_TYPE_NONE>;
> +			status		= "disabled";
> +			usb-phy		= <&usb3_phy>;
> +		};
> +
> +		usb4: usb at 12530000 {
> +			compatible	= "qcom,ehci-host";
> +			reg		= <0x12530000 0x400>;
> +			interrupts	= <0 215 IRQ_TYPE_NONE>;
> +			status		= "disabled";
> +			usb-phy		= <&usb4_phy>;
> +		};
> +
> 		/* Temporary fixed regulator */
> 		vsdcc_fixed: vsdcc-regulator {
> 			compatible = "regulator-fixed";
> -- 
> 1.9.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 03/12] ARM: dts: apq8064: Add USB OTG support

[Srinivas Kandagatla]

This patch adds USB OTG support on USB1 of APQ8064 SOC.
Tested on IFC6410 with ethernet gadget.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++++++++++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 32 ++++++++++++++++++++++++++++++
 2 files changed, 54 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 40657a4..1723cdf 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -61,12 +61,25 @@
 				regulator-max-microvolt = <3300000>;
 			};
 
+			pm8921_l4: pm8921-l4 {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1800000>;
+			};
+
 			pm8921_l23: pm8921-l23 {
 				regulator-min-microvolt = <1700000>;
 				regulator-max-microvolt = <1900000>;
 			};
 		};
 
+		/* OTG */
+		usb1_phy: phy at 12500000 {
+			status		= "okay";
+			vddcx-supply	= <&pm8921_s3>;
+			v3p3-supply	= <&pm8921_l3>;
+			v1p8-supply	= <&pm8921_l4>;
+		};
+
 		usb3_phy: phy at 12520000 {
 			status		= "okay";
 			vddcx-supply	= <&pm8921_s3>;
@@ -81,6 +94,15 @@
 			v1p8-supply	= <&pm8921_l23>;
 		};
 
+		gadget1: gadget at 12500000 {
+			status = "okay";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {
+			status = "okay";
+		};
+
 		usb3: usb at 12520000 {
 			status = "okay";
 		};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index e33eb03..c251c72 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -488,6 +488,21 @@
 			};
 		};
 
+		usb1_phy: phy at 12500000 {
+			compatible	= "qcom,usb-otg-ci";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			dr_mode		= "host";
+
+			clocks		= <&gcc USB_HS1_XCVR_CLK>,
+					  <&gcc USB_HS1_H_CLK>;
+			clock-names	= "core", "iface";
+
+			resets		= <&gcc USB_HS1_RESET>;
+			reset-names	= "link";
+		};
+
 		usb3_phy: phy at 12520000 {
 			compatible	= "qcom,usb-otg-ci";
 			reg		= <0x12520000 0x400>;
@@ -518,6 +533,23 @@
 			reset-names	= "link";
 		};
 
+		gadget1: gadget at 12500000 {
+			compatible	= "qcom,ci-hdrc";
+			reg		= <0x12500000 0x400>;
+			status		= "disabled";
+			dr_mode		= "peripheral";
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			usb-phy		= <&usb1_phy>;
+		};
+
+		usb1: usb at 12500000 {
+			compatible	= "qcom,ehci-host";
+			reg		= <0x12500000 0x400>;
+			interrupts	= <0 100 IRQ_TYPE_NONE>;
+			status		= "disabled";
+			usb-phy		= <&usb1_phy>;
+		};
+
 		usb3: usb at 12520000 {
 			compatible	= "qcom,ehci-host";
 			reg		= <0x12520000 0x400>;
-- 
1.9.1

[PATCH 03/12] ARM: dts: apq8064: Add USB OTG support

[Kumar Gala]

On Feb 23, 2015, at 1:55 AM, Srinivas Kandagatla <srinivas.kandagatla@linaro.org> wrote:

> This patch adds USB OTG support on USB1 of APQ8064 SOC.
> Tested on IFC6410 with ethernet gadget.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
> arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 22 ++++++++++++++++++++
> arch/arm/boot/dts/qcom-apq8064.dtsi        | 32 ++++++++++++++++++++++++++++++
> 2 files changed, 54 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> index 40657a4..1723cdf 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
> @@ -61,12 +61,25 @@
> 				regulator-max-microvolt = <3300000>;
> 			};
> 
> +			pm8921_l4: pm8921-l4 {
> +				regulator-min-microvolt = <1000000>;
> +				regulator-max-microvolt = <1800000>;
> +			};
> +
> 			pm8921_l23: pm8921-l23 {
> 				regulator-min-microvolt = <1700000>;
> 				regulator-max-microvolt = <1900000>;
> 			};
> 		};
> 
> +		/* OTG */
> +		usb1_phy: phy at 12500000 {
> +			status		= "okay";
> +			vddcx-supply	= <&pm8921_s3>;
> +			v3p3-supply	= <&pm8921_l3>;
> +			v1p8-supply	= <&pm8921_l4>;
> +		};
> +
> 		usb3_phy: phy at 12520000 {
> 			status		= "okay";
> 			vddcx-supply	= <&pm8921_s3>;
> @@ -81,6 +94,15 @@
> 			v1p8-supply	= <&pm8921_l23>;
> 		};
> 
> +		gadget1: gadget at 12500000 {
> +			status = "okay";
> +		};
> +
> +		/* OTG */
> +		usb1: usb at 12500000 {
> +			status = "okay";
> +		};
> +
> 		usb3: usb at 12520000 {
> 			status = "okay";
> 		};
> diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
> index e33eb03..c251c72 100644
> --- a/arch/arm/boot/dts/qcom-apq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
> @@ -488,6 +488,21 @@
> 			};
> 		};
> 
> +		usb1_phy: phy at 12500000 {
> +			compatible	= "qcom,usb-otg-ci";
> +			reg		= <0x12500000 0x400>;
> +			interrupts	= <0 100 IRQ_TYPE_NONE>;

Same comments about 0 -> GIC_SPI, and IRQ_TYPE_NONE -> IRQ_TYPE_LEVEL_HIGH

> +			status		= "disabled";
> +			dr_mode		= "host";
> +
> +			clocks		= <&gcc USB_HS1_XCVR_CLK>,
> +					  <&gcc USB_HS1_H_CLK>;
> +			clock-names	= "core", "iface";
> +
> +			resets		= <&gcc USB_HS1_RESET>;
> +			reset-names	= "link";
> +		};
> +
> 		usb3_phy: phy at 12520000 {
> 			compatible	= "qcom,usb-otg-ci";
> 			reg		= <0x12520000 0x400>;
> @@ -518,6 +533,23 @@
> 			reset-names	= "link";
> 		};
> 
> +		gadget1: gadget at 12500000 {
> +			compatible	= "qcom,ci-hdrc";
> +			reg		= <0x12500000 0x400>;
> +			status		= "disabled";
> +			dr_mode		= "peripheral";
> +			interrupts	= <0 100 IRQ_TYPE_NONE>;
> +			usb-phy		= <&usb1_phy>;
> +		};
> +
> +		usb1: usb at 12500000 {
> +			compatible	= "qcom,ehci-host";
> +			reg		= <0x12500000 0x400>;
> +			interrupts	= <0 100 IRQ_TYPE_NONE>;
> +			status		= "disabled";
> +			usb-phy		= <&usb1_phy>;
> +		};
> +
> 		usb3: usb at 12520000 {
> 			compatible	= "qcom,ehci-host";
> 			reg		= <0x12520000 0x400>;
> -- 
> 1.9.1
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 04/12] ARM: dts: apq8064: Add SATA controller support.

[Srinivas Kandagatla]

This patch adds AHCI based SATA controller support to APQ8064.
Tested on IFC6410 board.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 15 +++++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 35 ++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 1723cdf..3164197 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -56,6 +56,12 @@
 				qcom,switch-mode-frequency	= <4800000>;
 			};
 
+			pm8921_s4: pm8921-s4 {
+				regulator-min-microvolt		= <1800000>;
+				regulator-max-microvolt		= <1800000>;
+				qcom,switch-mode-frequency	= <3200000>;
+			};
+
 			pm8921_l3: pm8921-l3 {
 				regulator-min-microvolt = <3050000>;
 				regulator-max-microvolt = <3300000>;
@@ -72,6 +78,15 @@
 			};
 		};
 
+		sata_phy0: sata-phy at 1b400000{
+			status = "okay";
+		};
+
+		sata0: sata at 29000000 {
+			status		= "okay";
+			target-supply	= <&pm8921_s4>;
+		};
+
 		/* OTG */
 		usb1_phy: phy at 12500000 {
 			status		= "okay";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index c251c72..e65aff0 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -566,6 +566,41 @@
 			usb-phy		= <&usb4_phy>;
 		};
 
+		sata_phy0: sata-phy at 1b400000{
+			compatible	= "qcom,apq8064-sata-phy";
+			status		= "disabled";
+			reg		= <0x1b400000 0x200>;
+			reg-names	= "phy_mem";
+			clocks		= <&gcc SATA_PHY_CFG_CLK>;
+			clock-names	= "cfg";
+			#phy-cells	= <0>;
+		};
+
+		sata0: sata at 29000000 {
+			compatible		= "generic-ahci";
+			status			= "disabled";
+			reg			= <0x29000000 0x180>;
+			interrupts		= <0 209 0>;
+
+			clocks			= <&gcc SFAB_SATA_S_H_CLK>,
+						<&gcc SATA_H_CLK>,
+						<&gcc SATA_A_CLK>,
+						<&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			clock-names		= "slave_iface",
+						"iface",
+						"bus",
+						"rxoob",
+						"core_pmalive";
+
+			assigned-clocks		= <&gcc SATA_RXOOB_CLK>,
+						<&gcc SATA_PMALIVE_CLK>;
+			assigned-clock-rates	= <100000000>, <100000000>;
+
+			phys			= <&sata_phy0>;
+			phy-names		= "sata-phy";
+		};
+
 		/* Temporary fixed regulator */
 		vsdcc_fixed: vsdcc-regulator {
 			compatible = "regulator-fixed";
-- 
1.9.1

[PATCH 05/12] ARM: dts: APQ8064: Add MDP support

[Srinivas Kandagatla]

From: Rob Clark <robdclark@gmail.com>

This patch adds MDP node to APQ8064 dt.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 112 ++++++++++++++++++++++++++++++++++++
 1 file changed, 112 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index e65aff0..9c2e9b2 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -1,6 +1,7 @@
 /dts-v1/;
 
 #include "skeleton.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
@@ -94,6 +95,20 @@
 				};
 			};
 
+			hdmi_pinctrl: hdmi-pinctrl {
+				mux1 {
+					pins = "gpio69", "gpio70", "gpio71";
+					function = "hdmi";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+				mux2 {
+					pins = "gpio72";
+					function = "hdmi";
+					bias-pull-down;
+					drive-strength = <16>;
+				};
+			};
 			ps_hold: ps_hold {
 				mux {
 					pins = "gpio78";
@@ -228,6 +243,18 @@
 			};
 		};
 
+		ext_3p3v: regulator-fixed at 1 {
+			compatible = "regulator-fixed";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-name = "ext_3p3v";
+			regulator-type = "voltage";
+			startup-delay-us = <0>;
+			gpio = <&tlmm_pinmux 77 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+			regulator-boot-on;
+		};
+
 		qcom,ssbi at 500000 {
 			compatible = "qcom,ssbi";
 			reg = <0x00500000 0x1000>;
@@ -426,6 +453,13 @@
 				reg		= <QCOM_RPM_PM8921_LDO27>;
 			};
 
+			pm8921_hdmi_mvs: pm8921-hdmi-mvs {
+				compatible	= "qcom,rpm-pm8921-switch";
+				reg		= <QCOM_RPM_HDMI_SWITCH>;
+				regulator-always-on;
+				bias-pull-down;
+			};
+
 			pm8921_l28: pm8921-l28 {
 				compatible	= "qcom,rpm-pm8921-nldo1200";
 				reg		= <QCOM_RPM_PM8921_LDO28>;
@@ -704,5 +738,83 @@
 				pinctrl-0 = <&sdc4_gpios>;
 			};
 		};
+
+		hdmi: qcom,hdmi-tx at 4a00000 {
+			compatible = "qcom,hdmi-tx-8960";
+			reg-names = "core_physical";
+			reg = <0x04a00000 0x1000>;
+			interrupts = <GIC_SPI 79 0>;
+			clock-names =
+			    "core_clk",
+			    "master_iface_clk",
+			    "slave_iface_clk";
+			clocks =
+			    <&mmcc HDMI_APP_CLK>,
+			    <&mmcc HDMI_M_AHB_CLK>,
+			    <&mmcc HDMI_S_AHB_CLK>;
+			qcom,hdmi-tx-ddc-clk = <&tlmm_pinmux 70
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-ddc-data = <&tlmm_pinmux 71
+						GPIO_ACTIVE_HIGH>;
+			qcom,hdmi-tx-hpd = <&tlmm_pinmux 72
+						GPIO_ACTIVE_HIGH>;
+			core-vdda-supply = <&pm8921_hdmi_mvs>;
+			hdmi-mux-supply = <&ext_3p3v>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pinctrl>;
+		};
+
+		gpu: qcom,adreno-3xx at 4300000 {
+			compatible = "qcom,adreno-3xx";
+			reg = <0x04300000 0x20000>;
+			reg-names = "kgsl_3d0_reg_memory";
+			interrupts = <GIC_SPI 80 0>;
+			interrupt-names = "kgsl_3d0_irq";
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "mem_clk",
+			    "mem_iface_clk";
+			clocks =
+			    <&mmcc GFX3D_CLK>,
+			    <&mmcc GFX3D_AHB_CLK>,
+			    <&mmcc GFX3D_AXI_CLK>,
+			    <&mmcc MMSS_IMEM_AHB_CLK>;
+			qcom,chipid = <0x03020002>;
+			qcom,gpu-pwrlevels {
+				compatible = "qcom,gpu-pwrlevels";
+				qcom,gpu-pwrlevel at 0 {
+					qcom,gpu-freq = <450000000>;
+				};
+				qcom,gpu-pwrlevel at 1 {
+					qcom,gpu-freq = <27000000>;
+				};
+			};
+		};
+
+		mdp: qcom,mdp at 5100000 {
+			compatible = "qcom,mdp";
+			reg = <0x05100000 0xf0000>;
+			interrupts = <GIC_SPI 75 0>;
+			connectors = <&hdmi>;
+			gpus = <&gpu>;
+			clock-names =
+			    "core_clk",
+			    "iface_clk",
+			    "lut_clk",
+			    "src_clk",
+			    "hdmi_clk",
+			    "mdp_clk",
+			    "mdp_axi_clk";
+			clocks =
+			    <&mmcc MDP_CLK>,
+			    <&mmcc MDP_AHB_CLK>,
+			    <&mmcc MDP_LUT_CLK>,
+			    <&mmcc TV_SRC>,
+			    <&mmcc HDMI_TV_CLK>,
+			    <&mmcc MDP_TV_CLK>,
+			    <&mmcc MDP_AXI_CLK>;
+//			vdd-supply = <&footswitch_mdp>;
+		};
 	};
 };
-- 
1.9.1

[PATCH 06/12] ARM: DT: apq8064: add pci support in CM QS600

[Srinivas Kandagatla]

From: Nicolas Dechesne <nicolas.dechesne@linaro.org>

This patch adds PCIE support to APQ8064, tested with Ethernet on Compulab QS600 board.

Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 5d75666..6e62f24 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -1,4 +1,5 @@
 #include "qcom-apq8064-v2.0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	model = "CompuLab CM-QS600";
@@ -40,6 +41,24 @@
 			};
 		};
 
+		/* on board fixed 3.3v supply */
+		v3p3_pcieclk: v3p3-pcieclk {
+			compatible = "regulator-fixed";
+			regulator-name = "PCIE V3P3";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		pci at 1b500000 {
+			status = "ok";
+			pcie-clk-supply	= <&v3p3_pcieclk>;
+			avdd-supply	= <&pm8921_s3>;
+			vdd-supply	= <&pm8921_lvs6>;
+			qcom,external-phy-refclk;
+			reset-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {
-- 
1.9.1

[PATCH 06/12] ARM: DT: apq8064: add pci support in CM QS600

[Igor Grinberg]

Hi Srini,

On 02/23/15 09:55, Srinivas Kandagatla wrote:
> From: Nicolas Dechesne <nicolas.dechesne@linaro.org>
> 
> This patch adds PCIE support to APQ8064, tested with Ethernet on Compulab QS600 board.
> 
> Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>

Thanks for submitting these!
I currently have a hard time submitting anything...

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index 5d75666..6e62f24 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -1,4 +1,5 @@
>  #include "qcom-apq8064-v2.0.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
>  
>  / {
>  	model = "CompuLab CM-QS600";
> @@ -40,6 +41,24 @@
>  			};
>  		};
>  
> +		/* on board fixed 3.3v supply */
> +		v3p3_pcieclk: v3p3-pcieclk {
> +			compatible = "regulator-fixed";
> +			regulator-name = "PCIE V3P3";
> +			regulator-min-microvolt = <3300000>;
> +			regulator-max-microvolt = <3300000>;
> +			regulator-always-on;
> +		};
> +
> +		pci at 1b500000 {
> +			status = "ok";
> +			pcie-clk-supply	= <&v3p3_pcieclk>;
> +			avdd-supply	= <&pm8921_s3>;
> +			vdd-supply	= <&pm8921_lvs6>;
> +			qcom,external-phy-refclk;
> +			reset-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
> +		};
> +
>  		amba {
>  			/* eMMC */
>  			sdcc1: sdcc at 12400000 {
> 

-- 
Regards,
Igor.

[PATCH 06/12] ARM: DT: apq8064: add pci support in CM QS600

[Srinivas Kandagatla]

Hi Kumar,

Sorry, I should have dropped this patch.. PCIE is still not in the 
mainline.. :-)

Will fix it in next version.

--srini
On 23/02/15 11:31, Igor Grinberg wrote:
> Hi Srini,
>
> On 02/23/15 09:55, Srinivas Kandagatla wrote:
>> From: Nicolas Dechesne <nicolas.dechesne@linaro.org>
>>
>> This patch adds PCIE support to APQ8064, tested with Ethernet on Compulab QS600 board.
>>
>> Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
>
> Thanks for submitting these!
> I currently have a hard time submitting anything...
>
> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
>
>> ---
>>   arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 19 +++++++++++++++++++
>>   1 file changed, 19 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
>> index 5d75666..6e62f24 100644
>> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
>> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
>> @@ -1,4 +1,5 @@
>>   #include "qcom-apq8064-v2.0.dtsi"
>> +#include <dt-bindings/gpio/gpio.h>
>>
>>   / {
>>   	model = "CompuLab CM-QS600";
>> @@ -40,6 +41,24 @@
>>   			};
>>   		};
>>
>> +		/* on board fixed 3.3v supply */
>> +		v3p3_pcieclk: v3p3-pcieclk {
>> +			compatible = "regulator-fixed";
>> +			regulator-name = "PCIE V3P3";
>> +			regulator-min-microvolt = <3300000>;
>> +			regulator-max-microvolt = <3300000>;
>> +			regulator-always-on;
>> +		};
>> +
>> +		pci at 1b500000 {
>> +			status = "ok";
>> +			pcie-clk-supply	= <&v3p3_pcieclk>;
>> +			avdd-supply	= <&pm8921_s3>;
>> +			vdd-supply	= <&pm8921_lvs6>;
>> +			qcom,external-phy-refclk;
>> +			reset-gpio = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>;
>> +		};
>> +
>>   		amba {
>>   			/* eMMC */
>>   			sdcc1: sdcc at 12400000 {
>>
>

[PATCH 06/12] ARM: DT: apq8064: add pci support in CM QS600

[Stanimir Varbanov]

On 02/23/2015 01:43 PM, Srinivas Kandagatla wrote:
> Hi Kumar,
> 
> Sorry, I should have dropped this patch.. PCIE is still not in the
> mainline.. :-)
> 

Srini,

Does it possible to reuse the driver which I'm trying to upstream at [1]
? I'm planing to send v2 soon.


[1] https://lkml.org/lkml/2014/12/12/557

-- 
regards,
Stan

[PATCH 06/12] ARM: DT: apq8064: add pci support in CM QS600

[Srinivas Kandagatla]

On 24/02/15 10:23, Stanimir Varbanov wrote:
> On 02/23/2015 01:43 PM, Srinivas Kandagatla wrote:
>> Hi Kumar,
>>
>> Sorry, I should have dropped this patch.. PCIE is still not in the
>> mainline.. :-)
>>
>
> Srini,
>
> Does it possible to reuse the driver which I'm trying to upstream at [1]

Yes, it should be possible, that's the plan anyway for A family.

> ? I'm planing to send v2 soon.
Great.

--srini
>
>
> [1] https://lkml.org/lkml/2014/12/12/557
>

[PATCH 07/12] ARM: DT: apq8064: Add usb host support to CM QS-600

[Srinivas Kandagatla]

From: Nicolas Dechesne <nicolas.dechesne@linaro.org>

This patch adds device tree nodes to support two usb hosts on Compulab QS600 board.

Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 6e62f24..af2e075 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -41,6 +41,22 @@
 			};
 		};
 
+		usb3_phy:phy at 12520000 {
+			status = "ok";
+		};
+		
+		usb4_phy:phy at 12530000 {
+			status = "ok";
+		};
+		
+		usb3: usb at 12520000 {
+			status = "ok";
+		};
+		
+		usb4: usb at 12530000 {
+			status = "ok";
+		};
+
 		/* on board fixed 3.3v supply */
 		v3p3_pcieclk: v3p3-pcieclk {
 			compatible = "regulator-fixed";
-- 
1.9.1

[PATCH 07/12] ARM: DT: apq8064: Add usb host support to CM QS-600

[Igor Grinberg]

On 02/23/15 09:55, Srinivas Kandagatla wrote:
> From: Nicolas Dechesne <nicolas.dechesne@linaro.org>
> 
> This patch adds device tree nodes to support two usb hosts on Compulab QS600 board.
> 
> Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index 6e62f24..af2e075 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -41,6 +41,22 @@
>  			};
>  		};
>  
> +		usb3_phy:phy at 12520000 {
> +			status = "ok";
> +		};
> +		
> +		usb4_phy:phy at 12530000 {
> +			status = "ok";
> +		};
> +		
> +		usb3: usb at 12520000 {
> +			status = "ok";
> +		};
> +		
> +		usb4: usb at 12530000 {
> +			status = "ok";
> +		};
> +
>  		/* on board fixed 3.3v supply */
>  		v3p3_pcieclk: v3p3-pcieclk {
>  			compatible = "regulator-fixed";
> 

-- 
Regards,
Igor.

[PATCH 08/12] ARM: DT: apq8064: Add USB OTG support for CM QS-600

[Srinivas Kandagatla]

From: Nicolas Dechesne <nicolas.dechesne@linaro.org>

This patch adds USB OTG support on USB1 for Compulab QS-600 Board.

Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index af2e075..6349f24 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -41,6 +41,11 @@
 			};
 		};
 
+		/* OTG */
+		usb1_phy:phy at 12500000 {
+			status = "ok";
+		};
+
 		usb3_phy:phy at 12520000 {
 			status = "ok";
 		};
@@ -48,7 +53,16 @@
 		usb4_phy:phy at 12530000 {
 			status = "ok";
 		};
-		
+
+		gadget1:gadget at 12500000 {
+			status = "ok";
+		};
+
+		/* OTG */
+		usb1: usb at 12500000 {
+			status = "ok";
+		};
+
 		usb3: usb at 12520000 {
 			status = "ok";
 		};
-- 
1.9.1

[PATCH 08/12] ARM: DT: apq8064: Add USB OTG support for CM QS-600

[Igor Grinberg]

On 02/23/15 09:55, Srinivas Kandagatla wrote:
> From: Nicolas Dechesne <nicolas.dechesne@linaro.org>
> 
> This patch adds USB OTG support on USB1 for Compulab QS-600 Board.
> 
> Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index af2e075..6349f24 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -41,6 +41,11 @@
>  			};
>  		};
>  
> +		/* OTG */
> +		usb1_phy:phy at 12500000 {
> +			status = "ok";
> +		};
> +
>  		usb3_phy:phy at 12520000 {
>  			status = "ok";
>  		};
> @@ -48,7 +53,16 @@
>  		usb4_phy:phy at 12530000 {
>  			status = "ok";
>  		};
> -		
> +
> +		gadget1:gadget at 12500000 {
> +			status = "ok";
> +		};
> +
> +		/* OTG */
> +		usb1: usb at 12500000 {
> +			status = "ok";
> +		};
> +
>  		usb3: usb at 12520000 {
>  			status = "ok";
>  		};
> 

-- 
Regards,
Igor.

[PATCH 09/12] ARM: qcom: Add DT alias for serial port

[Srinivas Kandagatla]

From: Pramod Gurav <pramod.gurav@smartplayin.com>

Define an alias for serial port present on ifc6410 which is used as
console.

Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 4 ++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 3164197..7a6a076 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -5,6 +5,10 @@
 	model = "Qualcomm APQ8064/IFC6410";
 	compatible = "qcom,apq8064-ifc6410", "qcom,apq8064";
 
+	aliases {
+		serial0 = &serial0;
+	};
+
 	soc {
 		pinctrl at 800000 {
 			i2c1_pins: i2c1 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 9c2e9b2..63edafc 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -232,7 +232,7 @@
 			#size-cells = <1>;
 			ranges;
 
-			serial at 16640000 {
+			serial0: serial at 16640000 {
 				compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
 				reg = <0x16640000 0x1000>,
 				      <0x16600000 0x1000>;
-- 
1.9.1

[PATCH 10/12] ARM: dts: apq8064: Remove incorrect gsbi2 node.

[Srinivas Kandagatla]

Commit 8c3166f5d74b7936d29dc44f778e759c1b9fb43a (ARM: DT: apq8064: Add i2c device nodes)
added a new gsbi2 node which is totally wrong for 2 reasons.
First the address range is not something which maps to gsbi2 according
to datasheet and 3.4 sources.
Secondly 8064 devices do not use gsbi2 for i2c according to 3.4 kernel sources.
Removing this node as this node would never get tested.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 20 --------------------
 1 file changed, 20 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 63edafc..ba44f30 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -201,26 +201,6 @@
 			};
 		};
 
-		gsbi2: gsbi at 12480000 {
-			status = "disabled";
-			compatible = "qcom,gsbi-v1.0.0";
-			reg = <0x12480000 0x100>;
-			clocks = <&gcc GSBI2_H_CLK>;
-			clock-names = "iface";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			i2c2: i2c at 124a0000 {
-				compatible = "qcom,i2c-qup-v1.1.1";
-				reg = <0x124a0000 0x1000>;
-				interrupts = <0 196 IRQ_TYPE_NONE>;
-				clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>;
-				clock-names = "core", "iface";
-				#address-cells = <1>;
-				#size-cells = <0>;
-			};
-		};
 
 		gsbi7: gsbi at 16600000 {
 			status = "disabled";
-- 
1.9.1

[PATCH 11/12] ARM: dts: Move i2c1 pinctrl to apq8064.dtsi

[Srinivas Kandagatla]

I2C1 pinctrl is not really specific to a board, moving to SOC dtsi would
avoid redefining this in every board.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 7 -------
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 7 +++++++
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 7a6a076..ab7aee2 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -11,13 +11,6 @@
 
 	soc {
 		pinctrl at 800000 {
-			i2c1_pins: i2c1 {
-				mux {
-					pins = "gpio20", "gpio21";
-					function = "gsbi1";
-				};
-			};
-
 			card_detect: card_detect {
 				mux {
 					pins = "gpio26";
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index ba44f30..09077a0 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -115,6 +115,13 @@
 					function = "ps_hold";
 				};
 			};
+
+			i2c1_pins: i2c1 {
+				mux {
+					pins = "gpio20", "gpio21";
+					function = "gsbi1";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {
-- 
1.9.1

[PATCH 12/12] ARM: dts: apq8064 add i2c3 node for panel.

[Srinivas Kandagatla]

This patch adds i2c3 node which is used for panel control on IFC6410.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 10 ++++++++++
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 25 +++++++++++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index ab7aee2..70fa747 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -20,6 +20,16 @@
 			};
 		};
 
+		gsbi3: gsbi at 16200000 {
+			status = "okay";
+			qcom,mode = <GSBI_PROT_I2C>;
+			i2c3: i2c at 16280000 {
+				status = "okay";
+				pinctrl-0 = <&i2c3_pins>;
+				pinctrl-names = "default";
+			};
+		};
+
 		gsbi at 12440000 {
 			status = "okay";
 			qcom,mode = <GSBI_PROT_I2C>;
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 09077a0..890db8e 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -122,6 +122,13 @@
 					function = "gsbi1";
 				};
 			};
+
+			i2c3_pins: i2c3 {
+				mux {
+					pins = "gpio8", "gpio9";
+					function = "gsbi3";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {
@@ -208,6 +215,24 @@
 			};
 		};
 
+		gsbi3: gsbi at 16200000 {
+			status = "disabled";
+			compatible = "qcom,gsbi-v1.0.0";
+			reg = <0x16200000 0x100>;
+			clocks = <&gcc GSBI3_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			i2c3: i2c at 16280000 {
+				compatible = "qcom,i2c-qup-v1.1.1";
+				reg = <0x16280000 0x1000>;
+				interrupts = <0 151 IRQ_TYPE_NONE>;
+				clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>;
+				clock-names = "core", "iface";
+			};
+		};
 
 		gsbi7: gsbi at 16600000 {
 			status = "disabled";
-- 
1.9.1