From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/11] irqchip: gicv3-its: Fix ITS CPU init
Date: Fri, 6 Mar 2015 16:37:40 +0000 [thread overview]
Message-ID: <1425659870-11832-2-git-send-email-marc.zyngier@arm.com> (raw)
In-Reply-To: <1425659870-11832-1-git-send-email-marc.zyngier@arm.com>
From: Vladimir Murzin <Vladimir.Murzin@arm.com>
We skip initialisation of ITS in case the device-tree has no
corresponding description, but we are still accessing to ITS bits while
setting CPU interface what leads to the kernel panic:
ITS: No ITS available, not enabling LPIs
CPU0: found redistributor 0 region 0:0x000000002f100000
Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = ffffffc0007fb000
[00000000] *pgd=00000000fc407003, *pud=00000000fc407003, *pmd=00000000fc408003, *pte=006000002f000707
Internal error: Oops: 96000005 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.19.0-rc2+ #318
Hardware name: FVP Base (DT)
task: ffffffc00077edb0 ti: ffffffc00076c000 task.ti: ffffffc00076c000
PC is at its_cpu_init+0x2c/0x320
LR is at gic_cpu_init+0x168/0x1bc
It happens in gic_rdists_supports_plpis() because gic_rdists is NULL.
The gic_rdists is set to non-NULL only when ITS node is presented in
the device-tree.
Fix this by moving the call to gic_rdists_supports_plpis() inside the
!list_empty(&its_nodes) block, because it is that list that guards the
validity of the rest of the information in this driver.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
drivers/irqchip/irq-gic-v3-its.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index d8996bd..c217ebc 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -1382,12 +1382,11 @@ static bool gic_rdists_supports_plpis(void)
int its_cpu_init(void)
{
- if (!gic_rdists_supports_plpis()) {
- pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
- return -ENXIO;
- }
-
if (!list_empty(&its_nodes)) {
+ if (!gic_rdists_supports_plpis()) {
+ pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
+ return -ENXIO;
+ }
its_cpu_init_lpis();
its_cpu_init_collection();
}
--
2.1.4
next prev parent reply other threads:[~2015-03-06 16:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-06 16:37 [PATCH 00/11] Collection of GIC/GICv3 fixes for 4.0 Marc Zyngier
2015-03-06 16:37 ` Marc Zyngier [this message]
2015-03-06 16:37 ` [PATCH 02/11] irqchip: gicv3-its: Allocate enough memory for the full range of DeviceID Marc Zyngier
2015-03-06 16:37 ` [PATCH 03/11] irqchip: gicv3-its: Iterate over PCI aliases to generate ITS configuration Marc Zyngier
2015-03-06 16:37 ` [PATCH 04/11] irqchip: gicv3-its: Fix unsafe locking reported by lockdep Marc Zyngier
2015-03-06 16:37 ` [PATCH 05/11] irqchip: gic: " Marc Zyngier
2015-03-06 16:37 ` [PATCH 06/11] irqchip: gic-v3: fix out of bounds access to cpu_logical_map Marc Zyngier
2015-03-06 16:37 ` [PATCH 07/11] irqchip: gicv3-its: zero itt before handling to hardware Marc Zyngier
2015-03-06 16:37 ` [PATCH 08/11] irqchip: gicv3-its: use 64KB page as default granule Marc Zyngier
2015-03-06 16:37 ` [PATCH 09/11] irqchip: gicv3-its: add limitation to page order Marc Zyngier
2015-03-06 16:37 ` [PATCH 10/11] irqchip: gicv3-its: define macros for GITS_CTLR fields Marc Zyngier
2015-03-06 16:37 ` [PATCH 11/11] irqchip: gicv3-its: support safe initialization Marc Zyngier
2015-03-08 5:56 ` [PATCH 00/11] Collection of GIC/GICv3 fixes for 4.0 Jason Cooper
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