From: hanjun.guo@linaro.org (Hanjun Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 15/21] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi
Date: Wed, 11 Mar 2015 20:39:41 +0800 [thread overview]
Message-ID: <1426077587-1561-16-git-send-email-hanjun.guo@linaro.org> (raw)
In-Reply-To: <1426077587-1561-1-git-send-email-hanjun.guo@linaro.org>
Introduce ACPI_IRQ_MODEL_GIC which is needed for ARM64 as GIC is
used, and then register device's gsi with the core IRQ subsystem.
acpi_register_gsi() is similar to DT based irq_of_parse_and_map(),
since gsi is unique in the system, so use hwirq number directly
for the mapping.
We are going to implement stacked domains when GICv2m, GICv3, ITS
support are added.
CC: Marc Zyngier <marc.zyngier@arm.com>
Originally-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Tested-by: Yijing Wang <wangyijing@huawei.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Jon Masters <jcm@redhat.com>
Tested-by: Timur Tabi <timur@codeaurora.org>
Tested-by: Robert Richter <rrichter@cavium.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
---
arch/arm64/kernel/acpi.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++
drivers/acpi/bus.c | 3 ++
include/linux/acpi.h | 1 +
3 files changed, 77 insertions(+)
diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index c9203c0..dec6f8a 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -76,6 +76,12 @@ static int __init dt_scan_depth1_nodes(unsigned long node,
}
/*
+ * Since we're on ARM, the default interrupt routing model
+ * clearly has to be GIC.
+ */
+enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC;
+
+/*
* __acpi_map_table() will be called before page_init(), so early_ioremap()
* or early_memremap() should be called here to for ACPI table mapping.
*/
@@ -218,6 +224,73 @@ void __init acpi_init_cpus(void)
pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
}
+int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
+{
+ *irq = irq_find_mapping(NULL, gsi);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
+
+/*
+ * success: return IRQ number (>0)
+ * failure: return =< 0
+ */
+int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
+{
+ unsigned int irq;
+ unsigned int irq_type;
+
+ /*
+ * ACPI have no bindings to indicate SPI or PPI, so we
+ * use different mappings from DT in ACPI.
+ *
+ * For FDT
+ * PPI interrupt: in the range [0, 15];
+ * SPI interrupt: in the range [0, 987];
+ *
+ * For ACPI, GSI should be unique so using
+ * the hwirq directly for the mapping:
+ * PPI interrupt: in the range [16, 31];
+ * SPI interrupt: in the range [32, 1019];
+ */
+
+ if (trigger == ACPI_EDGE_SENSITIVE &&
+ polarity == ACPI_ACTIVE_LOW)
+ irq_type = IRQ_TYPE_EDGE_FALLING;
+ else if (trigger == ACPI_EDGE_SENSITIVE &&
+ polarity == ACPI_ACTIVE_HIGH)
+ irq_type = IRQ_TYPE_EDGE_RISING;
+ else if (trigger == ACPI_LEVEL_SENSITIVE &&
+ polarity == ACPI_ACTIVE_LOW)
+ irq_type = IRQ_TYPE_LEVEL_LOW;
+ else if (trigger == ACPI_LEVEL_SENSITIVE &&
+ polarity == ACPI_ACTIVE_HIGH)
+ irq_type = IRQ_TYPE_LEVEL_HIGH;
+ else
+ irq_type = IRQ_TYPE_NONE;
+
+ /*
+ * Since only one GIC is supported in ACPI 5.0, we can
+ * create mapping refer to the default domain
+ */
+ irq = irq_create_mapping(NULL, gsi);
+ if (!irq)
+ return irq;
+
+ /* Set irq type if specified and different than the current one */
+ if (irq_type != IRQ_TYPE_NONE &&
+ irq_type != irq_get_trigger_type(irq))
+ irq_set_irq_type(irq, irq_type);
+ return irq;
+}
+EXPORT_SYMBOL_GPL(acpi_register_gsi);
+
+void acpi_unregister_gsi(u32 gsi)
+{
+}
+EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
+
static int __init acpi_parse_fadt(struct acpi_table_header *table)
{
struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table;
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 8b67bd0..c412fdb 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -448,6 +448,9 @@ static int __init acpi_bus_init_irq(void)
case ACPI_IRQ_MODEL_IOSAPIC:
message = "IOSAPIC";
break;
+ case ACPI_IRQ_MODEL_GIC:
+ message = "GIC";
+ break;
case ACPI_IRQ_MODEL_PLATFORM:
message = "platform specific model";
break;
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 6ec33c5..de4e86f 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -73,6 +73,7 @@ enum acpi_irq_model_id {
ACPI_IRQ_MODEL_IOAPIC,
ACPI_IRQ_MODEL_IOSAPIC,
ACPI_IRQ_MODEL_PLATFORM,
+ ACPI_IRQ_MODEL_GIC,
ACPI_IRQ_MODEL_COUNT
};
--
1.9.1
next prev parent reply other threads:[~2015-03-11 12:39 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-11 12:39 [PATCH v10 00/21] Introduce ACPI for ARM64 based on ACPI 5.1 Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 01/21] ACPI / table: Use pr_debug() instead of pr_info() for MADT table scanning Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 02/21] ACPI: add arm64 to the platforms that use ioremap Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 03/21] ARM64: allow late use of early_ioremap Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 04/21] ARM64 / ACPI: Get RSDP and ACPI boot-time tables Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 05/21] ACPI: fix acpi_os_ioremap for arm64 Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 06/21] ACPI / sleep: Introduce CONFIG_ACPI_GENERIC_SLEEP Hanjun Guo
2015-03-12 9:32 ` Lorenzo Pieralisi
2015-03-12 22:57 ` Rafael J. Wysocki
2015-03-13 3:31 ` Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 07/21] ARM64 / ACPI: Introduce PCI stub functions for ACPI Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 08/21] ARM64 / ACPI: Introduce early_param "acpi=" to enable/disable ACPI Hanjun Guo
2015-03-18 11:35 ` Lorenzo Pieralisi
2015-03-18 20:07 ` Ard Biesheuvel
2015-03-19 2:30 ` Hanjun Guo
2015-03-19 10:04 ` Lorenzo Pieralisi
2015-03-11 12:39 ` [PATCH v10 09/21] ARM64 / ACPI: If we chose to boot from acpi then disable FDT Hanjun Guo
2015-03-18 16:52 ` Catalin Marinas
2015-03-11 12:39 ` [PATCH v10 10/21] ARM64 / ACPI: Get PSCI flags in FADT for PSCI init Hanjun Guo
2015-03-13 14:51 ` Lorenzo Pieralisi
2015-03-16 11:45 ` Hanjun Guo
2015-03-16 18:41 ` Lorenzo Pieralisi
2015-03-11 12:39 ` [PATCH v10 11/21] ACPI / table: Print GIC information when MADT is parsed Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 12/21] ARM64 / ACPI: Parse MADT for SMP initialization Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 13/21] ACPI / processor: Introduce phys_cpuid_t for CPU hardware ID Hanjun Guo
2015-03-12 9:51 ` Lorenzo Pieralisi
2015-03-12 10:16 ` Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 14/21] ACPI / processor: Make it possible to get CPU hardware ID via GICC Hanjun Guo
2015-03-12 15:41 ` Lorenzo Pieralisi
2015-03-12 23:02 ` Rafael J. Wysocki
2015-03-11 12:39 ` Hanjun Guo [this message]
2015-03-18 18:41 ` [PATCH v10 15/21] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi Will Deacon
2015-03-19 3:45 ` Hanjun Guo
2015-03-19 10:12 ` Lorenzo Pieralisi
2015-03-19 19:37 ` Will Deacon
2015-03-20 13:07 ` Hanjun Guo
2015-03-20 14:25 ` Lorenzo Pieralisi
2015-03-21 21:38 ` Lorenzo Pieralisi
2015-03-11 12:39 ` [PATCH v10 16/21] irqchip: Add GICv2 specific ACPI boot support Hanjun Guo
[not found] ` <CACxGe6uWwts6X=Yc2ioBdQizXkF1_YgoNNOsREWirk2MFBVDHg@mail.gmail.com>
2015-03-11 23:11 ` Jason Cooper
2015-03-12 1:46 ` Hanjun Guo
2015-03-12 5:12 ` Jason Cooper
2015-03-12 7:31 ` Hanjun Guo
2015-03-13 17:15 ` Jason Cooper
2015-03-14 8:47 ` Grant Likely
2015-03-14 11:43 ` Catalin Marinas
2015-03-12 10:14 ` Marc Zyngier
2015-03-14 18:44 ` Jason Cooper
2015-03-11 12:39 ` [PATCH v10 17/21] clocksource / arch_timer: Parse GTDT to initialize arch timer Hanjun Guo
2015-03-18 18:34 ` Will Deacon
2015-03-20 13:49 ` Daniel Lezcano
2015-03-11 12:39 ` [PATCH v10 18/21] ARM64 / ACPI: Select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64 Hanjun Guo
2015-03-12 18:21 ` Lorenzo Pieralisi
2015-03-13 3:28 ` Hanjun Guo
2015-03-13 11:04 ` Lorenzo Pieralisi
2015-03-16 11:33 ` Hanjun Guo
2015-03-17 12:50 ` Lorenzo Pieralisi
2015-03-18 9:18 ` Lorenzo Pieralisi
2015-03-18 15:06 ` Rafael J. Wysocki
2015-03-19 1:16 ` Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 19/21] ARM64 / ACPI: Enable ARM64 in Kconfig Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 20/21] Documentation: ACPI for ARM64 Hanjun Guo
2015-03-11 12:39 ` [PATCH v10 21/21] ARM64 / ACPI: additions of ACPI documentation for arm64 Hanjun Guo
2015-03-12 13:26 ` [PATCH v10 00/21] Introduce ACPI for ARM64 based on ACPI 5.1 Timur Tabi
2015-03-16 5:07 ` Suthikulpanit, Suravee
2015-03-18 19:05 ` Will Deacon
2015-03-18 19:09 ` Will Deacon
2015-03-19 4:09 ` Hanjun Guo
2015-03-19 10:17 ` Lorenzo Pieralisi
2015-03-19 19:39 ` Will Deacon
2015-03-24 22:02 ` Grant Likely
2015-03-25 11:24 ` Will Deacon
2015-03-25 11:54 ` Rafael J. Wysocki
2015-03-25 11:38 ` Will Deacon
2015-03-25 12:16 ` Rafael J. Wysocki
2015-03-28 12:34 ` Grant Likely
2015-03-26 10:24 ` Lorenzo Pieralisi
2015-03-20 18:54 ` Will Deacon
2015-03-21 3:17 ` Hanjun Guo
2015-03-21 7:03 ` Hanjun Guo
[not found] ` <CAFoFrHatzS3MwGVeOPPjY1R1sfBRYnJjgbQjvfzi6xS+XYD14g@mail.gmail.com>
2015-03-22 21:05 ` Julien Grall
2015-03-22 21:49 ` Rafael J. Wysocki
2015-03-22 21:32 ` Julien Grall
2015-03-22 22:11 ` Rafael J. Wysocki
2015-03-23 1:37 ` Hanjun Guo
2015-03-23 18:39 ` Stefano Stabellini
2015-03-23 18:32 ` Stefano Stabellini
2015-03-24 13:46 ` Hanjun Guo
2015-03-20 13:18 ` Mark Salter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1426077587-1561-16-git-send-email-hanjun.guo@linaro.org \
--to=hanjun.guo@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).