* [PATCH 00/12] Remove mach-msm and associated code
@ 2015-03-13 18:09 Stephen Boyd
2015-03-13 18:09 ` [PATCH 02/12] gpio: Remove gpio-msm-v1 driver Stephen Boyd
` (12 more replies)
0 siblings, 13 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
The maintainers for mach-msm no longer have any plans to support
or test the platforms supported by this architecture[1]. Most likely
there aren't any active users of this code anyway, so let's
delete it and the associated drivers/code. We should probably merge
this as one big series through arm-soc. Although some patches
should be fine to take through maintainers, some things like
mmc and usb have header file dependencies for platform_data.
[1] http://lkml.kernel.org/r/20150307031212.GA8434 at fifo99.com
Stephen Boyd (12):
ARM: Remove mach-msm and associated ARM architecture code
gpio: Remove gpio-msm-v1 driver
tty: serial: Remove orphaned serial driver
tty: serial: msm_serial: Remove dead code
net: smc91x: Remove dead code
mmc: Remove msm_sdcc driver
clocksource: qcom: Remove dead code
ehci-msm: Remove dead dependency
usb: phy: msm: Remove dead code
phy: qcom-ufs: Switch dependency to ARCH_QCOM
ufs-qcom: Switch dependency to ARCH_QCOM
msm: msm_fb: Remove dead code
Documentation/arm/00-INDEX | 2 -
Documentation/arm/msm/gpiomux.txt | 176 ---
MAINTAINERS | 20 +-
arch/arm/Kconfig | 14 -
arch/arm/Kconfig.debug | 31 +-
arch/arm/Makefile | 2 -
arch/arm/configs/msm_defconfig | 121 --
arch/arm/include/debug/msm.S | 14 -
arch/arm/mach-msm/Kconfig | 109 --
arch/arm/mach-msm/Makefile | 23 -
arch/arm/mach-msm/Makefile.boot | 3 -
arch/arm/mach-msm/board-halibut.c | 104 --
arch/arm/mach-msm/board-msm7x30.c | 191 ---
arch/arm/mach-msm/board-qsd8x50.c | 248 ---
arch/arm/mach-msm/board-sapphire.c | 114 --
arch/arm/mach-msm/board-trout-gpio.c | 233 ---
arch/arm/mach-msm/board-trout-mmc.c | 185 ---
arch/arm/mach-msm/board-trout-panel.c | 292 ----
arch/arm/mach-msm/board-trout.c | 111 --
arch/arm/mach-msm/board-trout.h | 162 --
arch/arm/mach-msm/clock-pcom.c | 176 ---
arch/arm/mach-msm/clock-pcom.h | 145 --
arch/arm/mach-msm/clock.c | 28 -
arch/arm/mach-msm/clock.h | 43 -
arch/arm/mach-msm/common.h | 41 -
arch/arm/mach-msm/devices-msm7x00.c | 480 ------
arch/arm/mach-msm/devices-msm7x30.c | 246 ---
arch/arm/mach-msm/devices-qsd8x50.c | 388 -----
arch/arm/mach-msm/devices.h | 53 -
arch/arm/mach-msm/dma.c | 298 ----
arch/arm/mach-msm/gpiomux-8x50.c | 51 -
arch/arm/mach-msm/gpiomux-v1.h | 67 -
arch/arm/mach-msm/gpiomux.c | 111 --
arch/arm/mach-msm/gpiomux.h | 84 -
arch/arm/mach-msm/include/mach/clk.h | 31 -
arch/arm/mach-msm/include/mach/dma.h | 151 --
arch/arm/mach-msm/include/mach/entry-macro.S | 36 -
arch/arm/mach-msm/include/mach/hardware.h | 18 -
arch/arm/mach-msm/include/mach/irqs-7x00.h | 75 -
arch/arm/mach-msm/include/mach/irqs-7x30.h | 153 --
arch/arm/mach-msm/include/mach/irqs-8x50.h | 88 --
arch/arm/mach-msm/include/mach/irqs.h | 37 -
arch/arm/mach-msm/include/mach/msm_gpiomux.h | 38 -
arch/arm/mach-msm/include/mach/msm_iomap-7x00.h | 108 --
arch/arm/mach-msm/include/mach/msm_iomap-7x30.h | 103 --
arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | 125 --
arch/arm/mach-msm/include/mach/msm_iomap.h | 53 -
arch/arm/mach-msm/include/mach/msm_smd.h | 109 --
arch/arm/mach-msm/include/mach/sirc.h | 98 --
arch/arm/mach-msm/include/mach/vreg.h | 29 -
arch/arm/mach-msm/io.c | 161 --
arch/arm/mach-msm/irq-vic.c | 363 -----
arch/arm/mach-msm/irq.c | 151 --
arch/arm/mach-msm/last_radio_log.c | 71 -
arch/arm/mach-msm/proc_comm.c | 129 --
arch/arm/mach-msm/proc_comm.h | 258 ----
arch/arm/mach-msm/sirc.c | 172 ---
arch/arm/mach-msm/smd.c | 1034 -------------
arch/arm/mach-msm/smd_debug.c | 311 ----
arch/arm/mach-msm/smd_private.h | 403 -----
arch/arm/mach-msm/vreg.c | 220 ---
drivers/clocksource/qcom-timer.c | 59 -
drivers/gpio/Kconfig | 8 -
drivers/gpio/Makefile | 1 -
drivers/gpio/gpio-msm-v1.c | 714 ---------
drivers/mmc/host/Kconfig | 8 -
drivers/mmc/host/Makefile | 1 -
drivers/mmc/host/msm_sdcc.c | 1474 ------------------
drivers/mmc/host/msm_sdcc.h | 256 ----
drivers/net/ethernet/smsc/smc91x.h | 14 -
drivers/phy/Kconfig | 2 +-
drivers/scsi/ufs/Kconfig | 2 +-
drivers/tty/serial/Kconfig | 14 +-
drivers/tty/serial/Makefile | 1 -
drivers/tty/serial/msm_serial.h | 9 -
drivers/tty/serial/msm_serial_hs.c | 1874 -----------------------
drivers/usb/host/Kconfig | 2 +-
drivers/usb/phy/Kconfig | 2 +-
drivers/usb/phy/phy-msm-usb.c | 18 +-
drivers/video/fbdev/Kconfig | 7 -
drivers/video/fbdev/Makefile | 1 -
drivers/video/fbdev/msm/Makefile | 19 -
drivers/video/fbdev/msm/mddi.c | 821 ----------
drivers/video/fbdev/msm/mddi_client_dummy.c | 85 -
drivers/video/fbdev/msm/mddi_client_nt35399.c | 252 ---
drivers/video/fbdev/msm/mddi_client_toshiba.c | 280 ----
drivers/video/fbdev/msm/mddi_hw.h | 305 ----
drivers/video/fbdev/msm/mdp.c | 520 -------
drivers/video/fbdev/msm/mdp_csc_table.h | 582 -------
drivers/video/fbdev/msm/mdp_hw.h | 627 --------
drivers/video/fbdev/msm/mdp_ppp.c | 731 ---------
drivers/video/fbdev/msm/mdp_scale_tables.c | 766 ---------
drivers/video/fbdev/msm/mdp_scale_tables.h | 38 -
drivers/video/fbdev/msm/msm_fb.c | 659 --------
include/linux/platform_data/mmc-msm_sdcc.h | 27 -
include/linux/platform_data/msm_serial_hs.h | 49 -
include/linux/platform_data/video-msm_fb.h | 146 --
include/linux/usb/msm_hsusb.h | 4 -
98 files changed, 16 insertions(+), 19253 deletions(-)
delete mode 100644 Documentation/arm/msm/gpiomux.txt
delete mode 100644 arch/arm/configs/msm_defconfig
delete mode 100644 arch/arm/mach-msm/Kconfig
delete mode 100644 arch/arm/mach-msm/Makefile
delete mode 100644 arch/arm/mach-msm/Makefile.boot
delete mode 100644 arch/arm/mach-msm/board-halibut.c
delete mode 100644 arch/arm/mach-msm/board-msm7x30.c
delete mode 100644 arch/arm/mach-msm/board-qsd8x50.c
delete mode 100644 arch/arm/mach-msm/board-sapphire.c
delete mode 100644 arch/arm/mach-msm/board-trout-gpio.c
delete mode 100644 arch/arm/mach-msm/board-trout-mmc.c
delete mode 100644 arch/arm/mach-msm/board-trout-panel.c
delete mode 100644 arch/arm/mach-msm/board-trout.c
delete mode 100644 arch/arm/mach-msm/board-trout.h
delete mode 100644 arch/arm/mach-msm/clock-pcom.c
delete mode 100644 arch/arm/mach-msm/clock-pcom.h
delete mode 100644 arch/arm/mach-msm/clock.c
delete mode 100644 arch/arm/mach-msm/clock.h
delete mode 100644 arch/arm/mach-msm/common.h
delete mode 100644 arch/arm/mach-msm/devices-msm7x00.c
delete mode 100644 arch/arm/mach-msm/devices-msm7x30.c
delete mode 100644 arch/arm/mach-msm/devices-qsd8x50.c
delete mode 100644 arch/arm/mach-msm/devices.h
delete mode 100644 arch/arm/mach-msm/dma.c
delete mode 100644 arch/arm/mach-msm/gpiomux-8x50.c
delete mode 100644 arch/arm/mach-msm/gpiomux-v1.h
delete mode 100644 arch/arm/mach-msm/gpiomux.c
delete mode 100644 arch/arm/mach-msm/gpiomux.h
delete mode 100644 arch/arm/mach-msm/include/mach/clk.h
delete mode 100644 arch/arm/mach-msm/include/mach/dma.h
delete mode 100644 arch/arm/mach-msm/include/mach/entry-macro.S
delete mode 100644 arch/arm/mach-msm/include/mach/hardware.h
delete mode 100644 arch/arm/mach-msm/include/mach/irqs-7x00.h
delete mode 100644 arch/arm/mach-msm/include/mach/irqs-7x30.h
delete mode 100644 arch/arm/mach-msm/include/mach/irqs-8x50.h
delete mode 100644 arch/arm/mach-msm/include/mach/irqs.h
delete mode 100644 arch/arm/mach-msm/include/mach/msm_gpiomux.h
delete mode 100644 arch/arm/mach-msm/include/mach/msm_iomap-7x00.h
delete mode 100644 arch/arm/mach-msm/include/mach/msm_iomap-7x30.h
delete mode 100644 arch/arm/mach-msm/include/mach/msm_iomap-8x50.h
delete mode 100644 arch/arm/mach-msm/include/mach/msm_iomap.h
delete mode 100644 arch/arm/mach-msm/include/mach/msm_smd.h
delete mode 100644 arch/arm/mach-msm/include/mach/sirc.h
delete mode 100644 arch/arm/mach-msm/include/mach/vreg.h
delete mode 100644 arch/arm/mach-msm/io.c
delete mode 100644 arch/arm/mach-msm/irq-vic.c
delete mode 100644 arch/arm/mach-msm/irq.c
delete mode 100644 arch/arm/mach-msm/last_radio_log.c
delete mode 100644 arch/arm/mach-msm/proc_comm.c
delete mode 100644 arch/arm/mach-msm/proc_comm.h
delete mode 100644 arch/arm/mach-msm/sirc.c
delete mode 100644 arch/arm/mach-msm/smd.c
delete mode 100644 arch/arm/mach-msm/smd_debug.c
delete mode 100644 arch/arm/mach-msm/smd_private.h
delete mode 100644 arch/arm/mach-msm/vreg.c
delete mode 100644 drivers/gpio/gpio-msm-v1.c
delete mode 100644 drivers/mmc/host/msm_sdcc.c
delete mode 100644 drivers/mmc/host/msm_sdcc.h
delete mode 100644 drivers/tty/serial/msm_serial_hs.c
delete mode 100644 drivers/video/fbdev/msm/Makefile
delete mode 100644 drivers/video/fbdev/msm/mddi.c
delete mode 100644 drivers/video/fbdev/msm/mddi_client_dummy.c
delete mode 100644 drivers/video/fbdev/msm/mddi_client_nt35399.c
delete mode 100644 drivers/video/fbdev/msm/mddi_client_toshiba.c
delete mode 100644 drivers/video/fbdev/msm/mddi_hw.h
delete mode 100644 drivers/video/fbdev/msm/mdp.c
delete mode 100644 drivers/video/fbdev/msm/mdp_csc_table.h
delete mode 100644 drivers/video/fbdev/msm/mdp_hw.h
delete mode 100644 drivers/video/fbdev/msm/mdp_ppp.c
delete mode 100644 drivers/video/fbdev/msm/mdp_scale_tables.c
delete mode 100644 drivers/video/fbdev/msm/mdp_scale_tables.h
delete mode 100644 drivers/video/fbdev/msm/msm_fb.c
delete mode 100644 include/linux/platform_data/mmc-msm_sdcc.h
delete mode 100644 include/linux/platform_data/msm_serial_hs.h
delete mode 100644 include/linux/platform_data/video-msm_fb.h
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 02/12] gpio: Remove gpio-msm-v1 driver
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-18 12:02 ` Linus Walleij
2015-03-13 18:09 ` [PATCH 03/12] tty: serial: Remove orphaned serial driver Stephen Boyd
` (11 subsequent siblings)
12 siblings, 1 reply; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This driver is orphaned now that mach-msm has been removed.
Delete it.
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This can be acked and go through arm-soc or applied directly to gpio tree.
drivers/gpio/Kconfig | 8 -
drivers/gpio/Makefile | 1 -
drivers/gpio/gpio-msm-v1.c | 714 ---------------------------------------------
3 files changed, 723 deletions(-)
delete mode 100644 drivers/gpio/gpio-msm-v1.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index c1e2ca3d9a51..02087e82e77d 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -223,14 +223,6 @@ config GPIO_MPC8XXX
Say Y here if you're going to use hardware that connects to the
MPC512x/831x/834x/837x/8572/8610 GPIOs.
-config GPIO_MSM_V1
- tristate "Qualcomm MSM GPIO v1"
- depends on GPIOLIB && ARCH_MSM && (ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50)
- help
- Say yes here to support the GPIO interface on ARM v6 based
- Qualcomm MSM chips. Most of the pins on the MSM can be
- selected for GPIO, and are controlled by this driver.
-
config GPIO_MSM_V2
tristate "Qualcomm MSM GPIO v2"
depends on GPIOLIB && OF && ARCH_QCOM
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index bdda6a94d2cd..aa0f2eaa040b 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -58,7 +58,6 @@ obj-$(CONFIG_GPIO_MOXART) += gpio-moxart.o
obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc5200.o
obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o
obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o
-obj-$(CONFIG_GPIO_MSM_V1) += gpio-msm-v1.o
obj-$(CONFIG_GPIO_MSM_V2) += gpio-msm-v2.o
obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o
obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o
diff --git a/drivers/gpio/gpio-msm-v1.c b/drivers/gpio/gpio-msm-v1.c
deleted file mode 100644
index edf285e26667..000000000000
--- a/drivers/gpio/gpio-msm-v1.c
+++ /dev/null
@@ -1,714 +0,0 @@
-/*
- * Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/bitops.h>
-#include <linux/gpio.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <linux/err.h>
-
-#include <mach/msm_gpiomux.h>
-
-/* see 80-VA736-2 Rev C pp 695-751
-**
-** These are actually the *shadow* gpio registers, since the
-** real ones (which allow full access) are only available to the
-** ARM9 side of the world.
-**
-** Since the _BASE need to be page-aligned when we're mapping them
-** to virtual addresses, adjust for the additional offset in these
-** macros.
-*/
-
-#define MSM_GPIO1_REG(off) (off)
-#define MSM_GPIO2_REG(off) (off)
-#define MSM_GPIO1_SHADOW_REG(off) (off)
-#define MSM_GPIO2_SHADOW_REG(off) (off)
-
-/*
- * MSM7X00 registers
- */
-/* output value */
-#define MSM7X00_GPIO_OUT_0 MSM_GPIO1_SHADOW_REG(0x00) /* gpio 15-0 */
-#define MSM7X00_GPIO_OUT_1 MSM_GPIO2_SHADOW_REG(0x00) /* gpio 42-16 */
-#define MSM7X00_GPIO_OUT_2 MSM_GPIO1_SHADOW_REG(0x04) /* gpio 67-43 */
-#define MSM7X00_GPIO_OUT_3 MSM_GPIO1_SHADOW_REG(0x08) /* gpio 94-68 */
-#define MSM7X00_GPIO_OUT_4 MSM_GPIO1_SHADOW_REG(0x0C) /* gpio 106-95 */
-#define MSM7X00_GPIO_OUT_5 MSM_GPIO1_SHADOW_REG(0x50) /* gpio 107-121 */
-
-/* same pin map as above, output enable */
-#define MSM7X00_GPIO_OE_0 MSM_GPIO1_SHADOW_REG(0x10)
-#define MSM7X00_GPIO_OE_1 MSM_GPIO2_SHADOW_REG(0x08)
-#define MSM7X00_GPIO_OE_2 MSM_GPIO1_SHADOW_REG(0x14)
-#define MSM7X00_GPIO_OE_3 MSM_GPIO1_SHADOW_REG(0x18)
-#define MSM7X00_GPIO_OE_4 MSM_GPIO1_SHADOW_REG(0x1C)
-#define MSM7X00_GPIO_OE_5 MSM_GPIO1_SHADOW_REG(0x54)
-
-/* same pin map as above, input read */
-#define MSM7X00_GPIO_IN_0 MSM_GPIO1_SHADOW_REG(0x34)
-#define MSM7X00_GPIO_IN_1 MSM_GPIO2_SHADOW_REG(0x20)
-#define MSM7X00_GPIO_IN_2 MSM_GPIO1_SHADOW_REG(0x38)
-#define MSM7X00_GPIO_IN_3 MSM_GPIO1_SHADOW_REG(0x3C)
-#define MSM7X00_GPIO_IN_4 MSM_GPIO1_SHADOW_REG(0x40)
-#define MSM7X00_GPIO_IN_5 MSM_GPIO1_SHADOW_REG(0x44)
-
-/* same pin map as above, 1=edge 0=level interrup */
-#define MSM7X00_GPIO_INT_EDGE_0 MSM_GPIO1_SHADOW_REG(0x60)
-#define MSM7X00_GPIO_INT_EDGE_1 MSM_GPIO2_SHADOW_REG(0x50)
-#define MSM7X00_GPIO_INT_EDGE_2 MSM_GPIO1_SHADOW_REG(0x64)
-#define MSM7X00_GPIO_INT_EDGE_3 MSM_GPIO1_SHADOW_REG(0x68)
-#define MSM7X00_GPIO_INT_EDGE_4 MSM_GPIO1_SHADOW_REG(0x6C)
-#define MSM7X00_GPIO_INT_EDGE_5 MSM_GPIO1_SHADOW_REG(0xC0)
-
-/* same pin map as above, 1=positive 0=negative */
-#define MSM7X00_GPIO_INT_POS_0 MSM_GPIO1_SHADOW_REG(0x70)
-#define MSM7X00_GPIO_INT_POS_1 MSM_GPIO2_SHADOW_REG(0x58)
-#define MSM7X00_GPIO_INT_POS_2 MSM_GPIO1_SHADOW_REG(0x74)
-#define MSM7X00_GPIO_INT_POS_3 MSM_GPIO1_SHADOW_REG(0x78)
-#define MSM7X00_GPIO_INT_POS_4 MSM_GPIO1_SHADOW_REG(0x7C)
-#define MSM7X00_GPIO_INT_POS_5 MSM_GPIO1_SHADOW_REG(0xBC)
-
-/* same pin map as above, interrupt enable */
-#define MSM7X00_GPIO_INT_EN_0 MSM_GPIO1_SHADOW_REG(0x80)
-#define MSM7X00_GPIO_INT_EN_1 MSM_GPIO2_SHADOW_REG(0x60)
-#define MSM7X00_GPIO_INT_EN_2 MSM_GPIO1_SHADOW_REG(0x84)
-#define MSM7X00_GPIO_INT_EN_3 MSM_GPIO1_SHADOW_REG(0x88)
-#define MSM7X00_GPIO_INT_EN_4 MSM_GPIO1_SHADOW_REG(0x8C)
-#define MSM7X00_GPIO_INT_EN_5 MSM_GPIO1_SHADOW_REG(0xB8)
-
-/* same pin map as above, write 1 to clear interrupt */
-#define MSM7X00_GPIO_INT_CLEAR_0 MSM_GPIO1_SHADOW_REG(0x90)
-#define MSM7X00_GPIO_INT_CLEAR_1 MSM_GPIO2_SHADOW_REG(0x68)
-#define MSM7X00_GPIO_INT_CLEAR_2 MSM_GPIO1_SHADOW_REG(0x94)
-#define MSM7X00_GPIO_INT_CLEAR_3 MSM_GPIO1_SHADOW_REG(0x98)
-#define MSM7X00_GPIO_INT_CLEAR_4 MSM_GPIO1_SHADOW_REG(0x9C)
-#define MSM7X00_GPIO_INT_CLEAR_5 MSM_GPIO1_SHADOW_REG(0xB4)
-
-/* same pin map as above, 1=interrupt pending */
-#define MSM7X00_GPIO_INT_STATUS_0 MSM_GPIO1_SHADOW_REG(0xA0)
-#define MSM7X00_GPIO_INT_STATUS_1 MSM_GPIO2_SHADOW_REG(0x70)
-#define MSM7X00_GPIO_INT_STATUS_2 MSM_GPIO1_SHADOW_REG(0xA4)
-#define MSM7X00_GPIO_INT_STATUS_3 MSM_GPIO1_SHADOW_REG(0xA8)
-#define MSM7X00_GPIO_INT_STATUS_4 MSM_GPIO1_SHADOW_REG(0xAC)
-#define MSM7X00_GPIO_INT_STATUS_5 MSM_GPIO1_SHADOW_REG(0xB0)
-
-/*
- * QSD8X50 registers
- */
-/* output value */
-#define QSD8X50_GPIO_OUT_0 MSM_GPIO1_SHADOW_REG(0x00) /* gpio 15-0 */
-#define QSD8X50_GPIO_OUT_1 MSM_GPIO2_SHADOW_REG(0x00) /* gpio 42-16 */
-#define QSD8X50_GPIO_OUT_2 MSM_GPIO1_SHADOW_REG(0x04) /* gpio 67-43 */
-#define QSD8X50_GPIO_OUT_3 MSM_GPIO1_SHADOW_REG(0x08) /* gpio 94-68 */
-#define QSD8X50_GPIO_OUT_4 MSM_GPIO1_SHADOW_REG(0x0C) /* gpio 103-95 */
-#define QSD8X50_GPIO_OUT_5 MSM_GPIO1_SHADOW_REG(0x10) /* gpio 121-104 */
-#define QSD8X50_GPIO_OUT_6 MSM_GPIO1_SHADOW_REG(0x14) /* gpio 152-122 */
-#define QSD8X50_GPIO_OUT_7 MSM_GPIO1_SHADOW_REG(0x18) /* gpio 164-153 */
-
-/* same pin map as above, output enable */
-#define QSD8X50_GPIO_OE_0 MSM_GPIO1_SHADOW_REG(0x20)
-#define QSD8X50_GPIO_OE_1 MSM_GPIO2_SHADOW_REG(0x08)
-#define QSD8X50_GPIO_OE_2 MSM_GPIO1_SHADOW_REG(0x24)
-#define QSD8X50_GPIO_OE_3 MSM_GPIO1_SHADOW_REG(0x28)
-#define QSD8X50_GPIO_OE_4 MSM_GPIO1_SHADOW_REG(0x2C)
-#define QSD8X50_GPIO_OE_5 MSM_GPIO1_SHADOW_REG(0x30)
-#define QSD8X50_GPIO_OE_6 MSM_GPIO1_SHADOW_REG(0x34)
-#define QSD8X50_GPIO_OE_7 MSM_GPIO1_SHADOW_REG(0x38)
-
-/* same pin map as above, input read */
-#define QSD8X50_GPIO_IN_0 MSM_GPIO1_SHADOW_REG(0x50)
-#define QSD8X50_GPIO_IN_1 MSM_GPIO2_SHADOW_REG(0x20)
-#define QSD8X50_GPIO_IN_2 MSM_GPIO1_SHADOW_REG(0x54)
-#define QSD8X50_GPIO_IN_3 MSM_GPIO1_SHADOW_REG(0x58)
-#define QSD8X50_GPIO_IN_4 MSM_GPIO1_SHADOW_REG(0x5C)
-#define QSD8X50_GPIO_IN_5 MSM_GPIO1_SHADOW_REG(0x60)
-#define QSD8X50_GPIO_IN_6 MSM_GPIO1_SHADOW_REG(0x64)
-#define QSD8X50_GPIO_IN_7 MSM_GPIO1_SHADOW_REG(0x68)
-
-/* same pin map as above, 1=edge 0=level interrup */
-#define QSD8X50_GPIO_INT_EDGE_0 MSM_GPIO1_SHADOW_REG(0x70)
-#define QSD8X50_GPIO_INT_EDGE_1 MSM_GPIO2_SHADOW_REG(0x50)
-#define QSD8X50_GPIO_INT_EDGE_2 MSM_GPIO1_SHADOW_REG(0x74)
-#define QSD8X50_GPIO_INT_EDGE_3 MSM_GPIO1_SHADOW_REG(0x78)
-#define QSD8X50_GPIO_INT_EDGE_4 MSM_GPIO1_SHADOW_REG(0x7C)
-#define QSD8X50_GPIO_INT_EDGE_5 MSM_GPIO1_SHADOW_REG(0x80)
-#define QSD8X50_GPIO_INT_EDGE_6 MSM_GPIO1_SHADOW_REG(0x84)
-#define QSD8X50_GPIO_INT_EDGE_7 MSM_GPIO1_SHADOW_REG(0x88)
-
-/* same pin map as above, 1=positive 0=negative */
-#define QSD8X50_GPIO_INT_POS_0 MSM_GPIO1_SHADOW_REG(0x90)
-#define QSD8X50_GPIO_INT_POS_1 MSM_GPIO2_SHADOW_REG(0x58)
-#define QSD8X50_GPIO_INT_POS_2 MSM_GPIO1_SHADOW_REG(0x94)
-#define QSD8X50_GPIO_INT_POS_3 MSM_GPIO1_SHADOW_REG(0x98)
-#define QSD8X50_GPIO_INT_POS_4 MSM_GPIO1_SHADOW_REG(0x9C)
-#define QSD8X50_GPIO_INT_POS_5 MSM_GPIO1_SHADOW_REG(0xA0)
-#define QSD8X50_GPIO_INT_POS_6 MSM_GPIO1_SHADOW_REG(0xA4)
-#define QSD8X50_GPIO_INT_POS_7 MSM_GPIO1_SHADOW_REG(0xA8)
-
-/* same pin map as above, interrupt enable */
-#define QSD8X50_GPIO_INT_EN_0 MSM_GPIO1_SHADOW_REG(0xB0)
-#define QSD8X50_GPIO_INT_EN_1 MSM_GPIO2_SHADOW_REG(0x60)
-#define QSD8X50_GPIO_INT_EN_2 MSM_GPIO1_SHADOW_REG(0xB4)
-#define QSD8X50_GPIO_INT_EN_3 MSM_GPIO1_SHADOW_REG(0xB8)
-#define QSD8X50_GPIO_INT_EN_4 MSM_GPIO1_SHADOW_REG(0xBC)
-#define QSD8X50_GPIO_INT_EN_5 MSM_GPIO1_SHADOW_REG(0xC0)
-#define QSD8X50_GPIO_INT_EN_6 MSM_GPIO1_SHADOW_REG(0xC4)
-#define QSD8X50_GPIO_INT_EN_7 MSM_GPIO1_SHADOW_REG(0xC8)
-
-/* same pin map as above, write 1 to clear interrupt */
-#define QSD8X50_GPIO_INT_CLEAR_0 MSM_GPIO1_SHADOW_REG(0xD0)
-#define QSD8X50_GPIO_INT_CLEAR_1 MSM_GPIO2_SHADOW_REG(0x68)
-#define QSD8X50_GPIO_INT_CLEAR_2 MSM_GPIO1_SHADOW_REG(0xD4)
-#define QSD8X50_GPIO_INT_CLEAR_3 MSM_GPIO1_SHADOW_REG(0xD8)
-#define QSD8X50_GPIO_INT_CLEAR_4 MSM_GPIO1_SHADOW_REG(0xDC)
-#define QSD8X50_GPIO_INT_CLEAR_5 MSM_GPIO1_SHADOW_REG(0xE0)
-#define QSD8X50_GPIO_INT_CLEAR_6 MSM_GPIO1_SHADOW_REG(0xE4)
-#define QSD8X50_GPIO_INT_CLEAR_7 MSM_GPIO1_SHADOW_REG(0xE8)
-
-/* same pin map as above, 1=interrupt pending */
-#define QSD8X50_GPIO_INT_STATUS_0 MSM_GPIO1_SHADOW_REG(0xF0)
-#define QSD8X50_GPIO_INT_STATUS_1 MSM_GPIO2_SHADOW_REG(0x70)
-#define QSD8X50_GPIO_INT_STATUS_2 MSM_GPIO1_SHADOW_REG(0xF4)
-#define QSD8X50_GPIO_INT_STATUS_3 MSM_GPIO1_SHADOW_REG(0xF8)
-#define QSD8X50_GPIO_INT_STATUS_4 MSM_GPIO1_SHADOW_REG(0xFC)
-#define QSD8X50_GPIO_INT_STATUS_5 MSM_GPIO1_SHADOW_REG(0x100)
-#define QSD8X50_GPIO_INT_STATUS_6 MSM_GPIO1_SHADOW_REG(0x104)
-#define QSD8X50_GPIO_INT_STATUS_7 MSM_GPIO1_SHADOW_REG(0x108)
-
-/*
- * MSM7X30 registers
- */
-/* output value */
-#define MSM7X30_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */
-#define MSM7X30_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 43-16 */
-#define MSM7X30_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-44 */
-#define MSM7X30_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */
-#define MSM7X30_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 106-95 */
-#define MSM7X30_GPIO_OUT_5 MSM_GPIO1_REG(0x50) /* gpio 133-107 */
-#define MSM7X30_GPIO_OUT_6 MSM_GPIO1_REG(0xC4) /* gpio 150-134 */
-#define MSM7X30_GPIO_OUT_7 MSM_GPIO1_REG(0x214) /* gpio 181-151 */
-
-/* same pin map as above, output enable */
-#define MSM7X30_GPIO_OE_0 MSM_GPIO1_REG(0x10)
-#define MSM7X30_GPIO_OE_1 MSM_GPIO2_REG(0x08)
-#define MSM7X30_GPIO_OE_2 MSM_GPIO1_REG(0x14)
-#define MSM7X30_GPIO_OE_3 MSM_GPIO1_REG(0x18)
-#define MSM7X30_GPIO_OE_4 MSM_GPIO1_REG(0x1C)
-#define MSM7X30_GPIO_OE_5 MSM_GPIO1_REG(0x54)
-#define MSM7X30_GPIO_OE_6 MSM_GPIO1_REG(0xC8)
-#define MSM7X30_GPIO_OE_7 MSM_GPIO1_REG(0x218)
-
-/* same pin map as above, input read */
-#define MSM7X30_GPIO_IN_0 MSM_GPIO1_REG(0x34)
-#define MSM7X30_GPIO_IN_1 MSM_GPIO2_REG(0x20)
-#define MSM7X30_GPIO_IN_2 MSM_GPIO1_REG(0x38)
-#define MSM7X30_GPIO_IN_3 MSM_GPIO1_REG(0x3C)
-#define MSM7X30_GPIO_IN_4 MSM_GPIO1_REG(0x40)
-#define MSM7X30_GPIO_IN_5 MSM_GPIO1_REG(0x44)
-#define MSM7X30_GPIO_IN_6 MSM_GPIO1_REG(0xCC)
-#define MSM7X30_GPIO_IN_7 MSM_GPIO1_REG(0x21C)
-
-/* same pin map as above, 1=edge 0=level interrup */
-#define MSM7X30_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x60)
-#define MSM7X30_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50)
-#define MSM7X30_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x64)
-#define MSM7X30_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x68)
-#define MSM7X30_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x6C)
-#define MSM7X30_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0xC0)
-#define MSM7X30_GPIO_INT_EDGE_6 MSM_GPIO1_REG(0xD0)
-#define MSM7X30_GPIO_INT_EDGE_7 MSM_GPIO1_REG(0x240)
-
-/* same pin map as above, 1=positive 0=negative */
-#define MSM7X30_GPIO_INT_POS_0 MSM_GPIO1_REG(0x70)
-#define MSM7X30_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58)
-#define MSM7X30_GPIO_INT_POS_2 MSM_GPIO1_REG(0x74)
-#define MSM7X30_GPIO_INT_POS_3 MSM_GPIO1_REG(0x78)
-#define MSM7X30_GPIO_INT_POS_4 MSM_GPIO1_REG(0x7C)
-#define MSM7X30_GPIO_INT_POS_5 MSM_GPIO1_REG(0xBC)
-#define MSM7X30_GPIO_INT_POS_6 MSM_GPIO1_REG(0xD4)
-#define MSM7X30_GPIO_INT_POS_7 MSM_GPIO1_REG(0x228)
-
-/* same pin map as above, interrupt enable */
-#define MSM7X30_GPIO_INT_EN_0 MSM_GPIO1_REG(0x80)
-#define MSM7X30_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60)
-#define MSM7X30_GPIO_INT_EN_2 MSM_GPIO1_REG(0x84)
-#define MSM7X30_GPIO_INT_EN_3 MSM_GPIO1_REG(0x88)
-#define MSM7X30_GPIO_INT_EN_4 MSM_GPIO1_REG(0x8C)
-#define MSM7X30_GPIO_INT_EN_5 MSM_GPIO1_REG(0xB8)
-#define MSM7X30_GPIO_INT_EN_6 MSM_GPIO1_REG(0xD8)
-#define MSM7X30_GPIO_INT_EN_7 MSM_GPIO1_REG(0x22C)
-
-/* same pin map as above, write 1 to clear interrupt */
-#define MSM7X30_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0x90)
-#define MSM7X30_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68)
-#define MSM7X30_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0x94)
-#define MSM7X30_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0x98)
-#define MSM7X30_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0x9C)
-#define MSM7X30_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xB4)
-#define MSM7X30_GPIO_INT_CLEAR_6 MSM_GPIO1_REG(0xDC)
-#define MSM7X30_GPIO_INT_CLEAR_7 MSM_GPIO1_REG(0x230)
-
-/* same pin map as above, 1=interrupt pending */
-#define MSM7X30_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xA0)
-#define MSM7X30_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70)
-#define MSM7X30_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xA4)
-#define MSM7X30_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xA8)
-#define MSM7X30_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xAC)
-#define MSM7X30_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0xB0)
-#define MSM7X30_GPIO_INT_STATUS_6 MSM_GPIO1_REG(0xE0)
-#define MSM7X30_GPIO_INT_STATUS_7 MSM_GPIO1_REG(0x234)
-
-#define FIRST_GPIO_IRQ MSM_GPIO_TO_INT(0)
-
-#define MSM_GPIO_BANK(soc, bank, first, last) \
- { \
- .regs[MSM_GPIO_OUT] = soc##_GPIO_OUT_##bank, \
- .regs[MSM_GPIO_IN] = soc##_GPIO_IN_##bank, \
- .regs[MSM_GPIO_INT_STATUS] = soc##_GPIO_INT_STATUS_##bank, \
- .regs[MSM_GPIO_INT_CLEAR] = soc##_GPIO_INT_CLEAR_##bank, \
- .regs[MSM_GPIO_INT_EN] = soc##_GPIO_INT_EN_##bank, \
- .regs[MSM_GPIO_INT_EDGE] = soc##_GPIO_INT_EDGE_##bank, \
- .regs[MSM_GPIO_INT_POS] = soc##_GPIO_INT_POS_##bank, \
- .regs[MSM_GPIO_OE] = soc##_GPIO_OE_##bank, \
- .chip = { \
- .base = (first), \
- .ngpio = (last) - (first) + 1, \
- .get = msm_gpio_get, \
- .set = msm_gpio_set, \
- .direction_input = msm_gpio_direction_input, \
- .direction_output = msm_gpio_direction_output, \
- .to_irq = msm_gpio_to_irq, \
- .request = msm_gpio_request, \
- .free = msm_gpio_free, \
- } \
- }
-
-#define MSM_GPIO_BROKEN_INT_CLEAR 1
-
-enum msm_gpio_reg {
- MSM_GPIO_IN,
- MSM_GPIO_OUT,
- MSM_GPIO_INT_STATUS,
- MSM_GPIO_INT_CLEAR,
- MSM_GPIO_INT_EN,
- MSM_GPIO_INT_EDGE,
- MSM_GPIO_INT_POS,
- MSM_GPIO_OE,
- MSM_GPIO_REG_NR
-};
-
-struct msm_gpio_chip {
- spinlock_t lock;
- struct gpio_chip chip;
- unsigned long regs[MSM_GPIO_REG_NR];
-#if MSM_GPIO_BROKEN_INT_CLEAR
- unsigned int_status_copy;
-#endif
- unsigned int both_edge_detect;
- unsigned int int_enable[2]; /* 0: awake, 1: sleep */
- void __iomem *base;
-};
-
-struct msm_gpio_initdata {
- struct msm_gpio_chip *chips;
- int count;
-};
-
-static void msm_gpio_writel(struct msm_gpio_chip *chip, u32 val,
- enum msm_gpio_reg reg)
-{
- writel(val, chip->base + chip->regs[reg]);
-}
-
-static u32 msm_gpio_readl(struct msm_gpio_chip *chip, enum msm_gpio_reg reg)
-{
- return readl(chip->base + chip->regs[reg]);
-}
-
-static int msm_gpio_write(struct msm_gpio_chip *msm_chip,
- unsigned offset, unsigned on)
-{
- unsigned mask = BIT(offset);
- unsigned val;
-
- val = msm_gpio_readl(msm_chip, MSM_GPIO_OUT);
- if (on)
- msm_gpio_writel(msm_chip, val | mask, MSM_GPIO_OUT);
- else
- msm_gpio_writel(msm_chip, val & ~mask, MSM_GPIO_OUT);
- return 0;
-}
-
-static void msm_gpio_update_both_edge_detect(struct msm_gpio_chip *msm_chip)
-{
- int loop_limit = 100;
- unsigned pol, val, val2, intstat;
- do {
- val = msm_gpio_readl(msm_chip, MSM_GPIO_IN);
- pol = msm_gpio_readl(msm_chip, MSM_GPIO_INT_POS);
- pol = (pol & ~msm_chip->both_edge_detect) |
- (~val & msm_chip->both_edge_detect);
- msm_gpio_writel(msm_chip, pol, MSM_GPIO_INT_POS);
- intstat = msm_gpio_readl(msm_chip, MSM_GPIO_INT_STATUS);
- val2 = msm_gpio_readl(msm_chip, MSM_GPIO_IN);
- if (((val ^ val2) & msm_chip->both_edge_detect & ~intstat) == 0)
- return;
- } while (loop_limit-- > 0);
- printk(KERN_ERR "msm_gpio_update_both_edge_detect, "
- "failed to reach stable state %x != %x\n", val, val2);
-}
-
-static int msm_gpio_clear_detect_status(struct msm_gpio_chip *msm_chip,
- unsigned offset)
-{
- unsigned bit = BIT(offset);
-
-#if MSM_GPIO_BROKEN_INT_CLEAR
- /* Save interrupts that already triggered before we loose them. */
- /* Any interrupt that triggers between the read of int_status */
- /* and the write to int_clear will still be lost though. */
- msm_chip->int_status_copy |=
- msm_gpio_readl(msm_chip, MSM_GPIO_INT_STATUS);
- msm_chip->int_status_copy &= ~bit;
-#endif
- msm_gpio_writel(msm_chip, bit, MSM_GPIO_INT_CLEAR);
- msm_gpio_update_both_edge_detect(msm_chip);
- return 0;
-}
-
-static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
- struct msm_gpio_chip *msm_chip;
- unsigned long irq_flags;
- u32 val;
-
- msm_chip = container_of(chip, struct msm_gpio_chip, chip);
- spin_lock_irqsave(&msm_chip->lock, irq_flags);
- val = msm_gpio_readl(msm_chip, MSM_GPIO_OE) & ~BIT(offset);
- msm_gpio_writel(msm_chip, val, MSM_GPIO_OE);
- spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
- return 0;
-}
-
-static int
-msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value)
-{
- struct msm_gpio_chip *msm_chip;
- unsigned long irq_flags;
- u32 val;
-
- msm_chip = container_of(chip, struct msm_gpio_chip, chip);
- spin_lock_irqsave(&msm_chip->lock, irq_flags);
- msm_gpio_write(msm_chip, offset, value);
- val = msm_gpio_readl(msm_chip, MSM_GPIO_OE) | BIT(offset);
- msm_gpio_writel(msm_chip, val, MSM_GPIO_OE);
- spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
- return 0;
-}
-
-static int msm_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
- struct msm_gpio_chip *msm_chip;
-
- msm_chip = container_of(chip, struct msm_gpio_chip, chip);
- return (msm_gpio_readl(msm_chip, MSM_GPIO_IN) & (1U << offset)) ? 1 : 0;
-}
-
-static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
- struct msm_gpio_chip *msm_chip;
- unsigned long irq_flags;
-
- msm_chip = container_of(chip, struct msm_gpio_chip, chip);
- spin_lock_irqsave(&msm_chip->lock, irq_flags);
- msm_gpio_write(msm_chip, offset, value);
- spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-}
-
-static int msm_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
-{
- return MSM_GPIO_TO_INT(chip->base + offset);
-}
-
-#ifdef CONFIG_MSM_GPIOMUX
-static int msm_gpio_request(struct gpio_chip *chip, unsigned offset)
-{
- return msm_gpiomux_get(chip->base + offset);
-}
-
-static void msm_gpio_free(struct gpio_chip *chip, unsigned offset)
-{
- msm_gpiomux_put(chip->base + offset);
-}
-#else
-#define msm_gpio_request NULL
-#define msm_gpio_free NULL
-#endif
-
-static struct msm_gpio_chip *msm_gpio_chips;
-static int msm_gpio_count;
-
-static struct msm_gpio_chip msm_gpio_chips_msm7x01[] = {
- MSM_GPIO_BANK(MSM7X00, 0, 0, 15),
- MSM_GPIO_BANK(MSM7X00, 1, 16, 42),
- MSM_GPIO_BANK(MSM7X00, 2, 43, 67),
- MSM_GPIO_BANK(MSM7X00, 3, 68, 94),
- MSM_GPIO_BANK(MSM7X00, 4, 95, 106),
- MSM_GPIO_BANK(MSM7X00, 5, 107, 121),
-};
-
-static struct msm_gpio_initdata msm_gpio_7x01_init = {
- .chips = msm_gpio_chips_msm7x01,
- .count = ARRAY_SIZE(msm_gpio_chips_msm7x01),
-};
-
-static struct msm_gpio_chip msm_gpio_chips_msm7x30[] = {
- MSM_GPIO_BANK(MSM7X30, 0, 0, 15),
- MSM_GPIO_BANK(MSM7X30, 1, 16, 43),
- MSM_GPIO_BANK(MSM7X30, 2, 44, 67),
- MSM_GPIO_BANK(MSM7X30, 3, 68, 94),
- MSM_GPIO_BANK(MSM7X30, 4, 95, 106),
- MSM_GPIO_BANK(MSM7X30, 5, 107, 133),
- MSM_GPIO_BANK(MSM7X30, 6, 134, 150),
- MSM_GPIO_BANK(MSM7X30, 7, 151, 181),
-};
-
-static struct msm_gpio_initdata msm_gpio_7x30_init = {
- .chips = msm_gpio_chips_msm7x30,
- .count = ARRAY_SIZE(msm_gpio_chips_msm7x30),
-};
-
-static struct msm_gpio_chip msm_gpio_chips_qsd8x50[] = {
- MSM_GPIO_BANK(QSD8X50, 0, 0, 15),
- MSM_GPIO_BANK(QSD8X50, 1, 16, 42),
- MSM_GPIO_BANK(QSD8X50, 2, 43, 67),
- MSM_GPIO_BANK(QSD8X50, 3, 68, 94),
- MSM_GPIO_BANK(QSD8X50, 4, 95, 103),
- MSM_GPIO_BANK(QSD8X50, 5, 104, 121),
- MSM_GPIO_BANK(QSD8X50, 6, 122, 152),
- MSM_GPIO_BANK(QSD8X50, 7, 153, 164),
-};
-
-static struct msm_gpio_initdata msm_gpio_8x50_init = {
- .chips = msm_gpio_chips_qsd8x50,
- .count = ARRAY_SIZE(msm_gpio_chips_qsd8x50),
-};
-
-static void msm_gpio_irq_ack(struct irq_data *d)
-{
- unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
- spin_lock_irqsave(&msm_chip->lock, irq_flags);
- msm_gpio_clear_detect_status(msm_chip,
- d->irq - gpio_to_irq(msm_chip->chip.base));
- spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-}
-
-static void msm_gpio_irq_mask(struct irq_data *d)
-{
- unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
- unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
-
- spin_lock_irqsave(&msm_chip->lock, irq_flags);
- /* level triggered interrupts are also latched */
- if (!(msm_gpio_readl(msm_chip, MSM_GPIO_INT_EDGE) & BIT(offset)))
- msm_gpio_clear_detect_status(msm_chip, offset);
- msm_chip->int_enable[0] &= ~BIT(offset);
- msm_gpio_writel(msm_chip, msm_chip->int_enable[0], MSM_GPIO_INT_EN);
- spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-}
-
-static void msm_gpio_irq_unmask(struct irq_data *d)
-{
- unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
- unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
-
- spin_lock_irqsave(&msm_chip->lock, irq_flags);
- /* level triggered interrupts are also latched */
- if (!(msm_gpio_readl(msm_chip, MSM_GPIO_INT_EDGE) & BIT(offset)))
- msm_gpio_clear_detect_status(msm_chip, offset);
- msm_chip->int_enable[0] |= BIT(offset);
- msm_gpio_writel(msm_chip, msm_chip->int_enable[0], MSM_GPIO_INT_EN);
- spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
-}
-
-static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
-{
- unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
- unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
-
- spin_lock_irqsave(&msm_chip->lock, irq_flags);
-
- if (on)
- msm_chip->int_enable[1] |= BIT(offset);
- else
- msm_chip->int_enable[1] &= ~BIT(offset);
-
- spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
- return 0;
-}
-
-static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
-{
- unsigned long irq_flags;
- struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d);
- unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base);
- unsigned val, mask = BIT(offset);
-
- spin_lock_irqsave(&msm_chip->lock, irq_flags);
- val = msm_gpio_readl(msm_chip, MSM_GPIO_INT_EDGE);
- if (flow_type & IRQ_TYPE_EDGE_BOTH) {
- msm_gpio_writel(msm_chip, val | mask, MSM_GPIO_INT_EDGE);
- __irq_set_handler_locked(d->irq, handle_edge_irq);
- } else {
- msm_gpio_writel(msm_chip, val & ~mask, MSM_GPIO_INT_EDGE);
- __irq_set_handler_locked(d->irq, handle_level_irq);
- }
- if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
- msm_chip->both_edge_detect |= mask;
- msm_gpio_update_both_edge_detect(msm_chip);
- } else {
- msm_chip->both_edge_detect &= ~mask;
- val = msm_gpio_readl(msm_chip, MSM_GPIO_INT_POS);
- if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH))
- val |= mask;
- else
- val &= ~mask;
- msm_gpio_writel(msm_chip, val, MSM_GPIO_INT_POS);
- }
- spin_unlock_irqrestore(&msm_chip->lock, irq_flags);
- return 0;
-}
-
-static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
-{
- int i, j, mask;
- unsigned val;
-
- for (i = 0; i < msm_gpio_count; i++) {
- struct msm_gpio_chip *msm_chip = &msm_gpio_chips[i];
- val = msm_gpio_readl(msm_chip, MSM_GPIO_INT_STATUS);
- val &= msm_chip->int_enable[0];
- while (val) {
- mask = val & -val;
- j = fls(mask) - 1;
- /* printk("%s %08x %08x bit %d gpio %d irq %d\n",
- __func__, v, m, j, msm_chip->chip.start + j,
- FIRST_GPIO_IRQ + msm_chip->chip.start + j); */
- val &= ~mask;
- generic_handle_irq(FIRST_GPIO_IRQ +
- msm_chip->chip.base + j);
- }
- }
- desc->irq_data.chip->irq_ack(&desc->irq_data);
-}
-
-static struct irq_chip msm_gpio_irq_chip = {
- .name = "msmgpio",
- .irq_ack = msm_gpio_irq_ack,
- .irq_mask = msm_gpio_irq_mask,
- .irq_unmask = msm_gpio_irq_unmask,
- .irq_set_wake = msm_gpio_irq_set_wake,
- .irq_set_type = msm_gpio_irq_set_type,
-};
-
-static int gpio_msm_v1_probe(struct platform_device *pdev)
-{
- int i, j = 0;
- const struct platform_device_id *dev_id = platform_get_device_id(pdev);
- struct msm_gpio_initdata *data;
- int irq1, irq2;
- struct resource *res;
- void __iomem *base1, __iomem *base2;
-
- data = (struct msm_gpio_initdata *)dev_id->driver_data;
- msm_gpio_chips = data->chips;
- msm_gpio_count = data->count;
-
- irq1 = platform_get_irq(pdev, 0);
- if (irq1 < 0)
- return irq1;
-
- irq2 = platform_get_irq(pdev, 1);
- if (irq2 < 0)
- return irq2;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- base1 = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(base1))
- return PTR_ERR(base1);
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- base2 = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(base2))
- return PTR_ERR(base2);
-
- for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) {
- if (i - FIRST_GPIO_IRQ >=
- msm_gpio_chips[j].chip.base +
- msm_gpio_chips[j].chip.ngpio)
- j++;
- irq_set_chip_data(i, &msm_gpio_chips[j]);
- irq_set_chip_and_handler(i, &msm_gpio_irq_chip,
- handle_edge_irq);
- set_irq_flags(i, IRQF_VALID);
- }
-
- for (i = 0; i < msm_gpio_count; i++) {
- if (i == 1)
- msm_gpio_chips[i].base = base2;
- else
- msm_gpio_chips[i].base = base1;
- spin_lock_init(&msm_gpio_chips[i].lock);
- msm_gpio_writel(&msm_gpio_chips[i], 0, MSM_GPIO_INT_EN);
- gpiochip_add(&msm_gpio_chips[i].chip);
- }
-
- irq_set_chained_handler(irq1, msm_gpio_irq_handler);
- irq_set_chained_handler(irq2, msm_gpio_irq_handler);
- irq_set_irq_wake(irq1, 1);
- irq_set_irq_wake(irq2, 1);
- return 0;
-}
-
-static struct platform_device_id gpio_msm_v1_device_ids[] = {
- { "gpio-msm-7201", (unsigned long)&msm_gpio_7x01_init },
- { "gpio-msm-7x30", (unsigned long)&msm_gpio_7x30_init },
- { "gpio-msm-8x50", (unsigned long)&msm_gpio_8x50_init },
- { }
-};
-MODULE_DEVICE_TABLE(platform, gpio_msm_v1_device_ids);
-
-static struct platform_driver gpio_msm_v1_driver = {
- .driver = {
- .name = "gpio-msm-v1",
- },
- .probe = gpio_msm_v1_probe,
- .id_table = gpio_msm_v1_device_ids,
-};
-
-static int __init gpio_msm_v1_init(void)
-{
- return platform_driver_register(&gpio_msm_v1_driver);
-}
-postcore_initcall(gpio_msm_v1_init);
-MODULE_LICENSE("GPL v2");
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 03/12] tty: serial: Remove orphaned serial driver
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
2015-03-13 18:09 ` [PATCH 02/12] gpio: Remove gpio-msm-v1 driver Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-13 18:09 ` [PATCH 04/12] tty: serial: msm_serial: Remove dead code Stephen Boyd
` (10 subsequent siblings)
12 siblings, 0 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This driver is orphaned now that mach-msm has been removed.
Delete it.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This can be acked and go through arm-soc or applied directly to serial tree.
drivers/tty/serial/Kconfig | 12 -
drivers/tty/serial/Makefile | 1 -
drivers/tty/serial/msm_serial_hs.c | 1874 ---------------------------
include/linux/platform_data/msm_serial_hs.h | 49 -
4 files changed, 1936 deletions(-)
delete mode 100644 drivers/tty/serial/msm_serial_hs.c
delete mode 100644 include/linux/platform_data/msm_serial_hs.h
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index d2501f01cd03..965c80f9fc50 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1063,18 +1063,6 @@ config SERIAL_MSM_CONSOLE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
-config SERIAL_MSM_HS
- tristate "MSM UART High Speed: Serial Driver"
- depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
- select SERIAL_CORE
- help
- If you have a machine based on MSM family of SoCs, you
- can enable its onboard high speed serial port by enabling
- this option.
-
- Choose M here to compile it as a module. The module will be
- called msm_serial_hs.
-
config SERIAL_VT8500
bool "VIA VT8500 on-chip serial port support"
depends on ARCH_VT8500
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index 599be4b05a26..91565e8d2e4c 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -62,7 +62,6 @@ obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
obj-$(CONFIG_SERIAL_MSM) += msm_serial.o
-obj-$(CONFIG_SERIAL_MSM_HS) += msm_serial_hs.o
obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
obj-$(CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL) += nwpserial.o
diff --git a/drivers/tty/serial/msm_serial_hs.c b/drivers/tty/serial/msm_serial_hs.c
deleted file mode 100644
index 62da8534ba75..000000000000
--- a/drivers/tty/serial/msm_serial_hs.c
+++ /dev/null
@@ -1,1874 +0,0 @@
-/*
- * MSM 7k/8k High speed uart driver
- *
- * Copyright (c) 2007-2011, Code Aurora Forum. All rights reserved.
- * Copyright (c) 2008 Google Inc.
- * Modified: Nick Pelly <npelly@google.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- * See the GNU General Public License for more details.
- *
- * Has optional support for uart power management independent of linux
- * suspend/resume:
- *
- * RX wakeup.
- * UART wakeup can be triggered by RX activity (using a wakeup GPIO on the
- * UART RX pin). This should only be used if there is not a wakeup
- * GPIO on the UART CTS, and the first RX byte is known (for example, with the
- * Bluetooth Texas Instruments HCILL protocol), since the first RX byte will
- * always be lost. RTS will be asserted even while the UART is off in this mode
- * of operation. See msm_serial_hs_platform_data.rx_wakeup_irq.
- */
-
-#include <linux/module.h>
-
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/ioport.h>
-#include <linux/kernel.h>
-#include <linux/timer.h>
-#include <linux/clk.h>
-#include <linux/platform_device.h>
-#include <linux/pm_runtime.h>
-#include <linux/dma-mapping.h>
-#include <linux/dmapool.h>
-#include <linux/wait.h>
-#include <linux/workqueue.h>
-
-#include <linux/atomic.h>
-#include <asm/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/dma.h>
-#include <linux/platform_data/msm_serial_hs.h>
-
-/* HSUART Registers */
-#define UARTDM_MR1_ADDR 0x0
-#define UARTDM_MR2_ADDR 0x4
-
-/* Data Mover result codes */
-#define RSLT_FIFO_CNTR_BMSK (0xE << 28)
-#define RSLT_VLD BIT(1)
-
-/* write only register */
-#define UARTDM_CSR_ADDR 0x8
-#define UARTDM_CSR_115200 0xFF
-#define UARTDM_CSR_57600 0xEE
-#define UARTDM_CSR_38400 0xDD
-#define UARTDM_CSR_28800 0xCC
-#define UARTDM_CSR_19200 0xBB
-#define UARTDM_CSR_14400 0xAA
-#define UARTDM_CSR_9600 0x99
-#define UARTDM_CSR_7200 0x88
-#define UARTDM_CSR_4800 0x77
-#define UARTDM_CSR_3600 0x66
-#define UARTDM_CSR_2400 0x55
-#define UARTDM_CSR_1200 0x44
-#define UARTDM_CSR_600 0x33
-#define UARTDM_CSR_300 0x22
-#define UARTDM_CSR_150 0x11
-#define UARTDM_CSR_75 0x00
-
-/* write only register */
-#define UARTDM_TF_ADDR 0x70
-#define UARTDM_TF2_ADDR 0x74
-#define UARTDM_TF3_ADDR 0x78
-#define UARTDM_TF4_ADDR 0x7C
-
-/* write only register */
-#define UARTDM_CR_ADDR 0x10
-#define UARTDM_IMR_ADDR 0x14
-
-#define UARTDM_IPR_ADDR 0x18
-#define UARTDM_TFWR_ADDR 0x1c
-#define UARTDM_RFWR_ADDR 0x20
-#define UARTDM_HCR_ADDR 0x24
-#define UARTDM_DMRX_ADDR 0x34
-#define UARTDM_IRDA_ADDR 0x38
-#define UARTDM_DMEN_ADDR 0x3c
-
-/* UART_DM_NO_CHARS_FOR_TX */
-#define UARTDM_NCF_TX_ADDR 0x40
-
-#define UARTDM_BADR_ADDR 0x44
-
-#define UARTDM_SIM_CFG_ADDR 0x80
-/* Read Only register */
-#define UARTDM_SR_ADDR 0x8
-
-/* Read Only register */
-#define UARTDM_RF_ADDR 0x70
-#define UARTDM_RF2_ADDR 0x74
-#define UARTDM_RF3_ADDR 0x78
-#define UARTDM_RF4_ADDR 0x7C
-
-/* Read Only register */
-#define UARTDM_MISR_ADDR 0x10
-
-/* Read Only register */
-#define UARTDM_ISR_ADDR 0x14
-#define UARTDM_RX_TOTAL_SNAP_ADDR 0x38
-
-#define UARTDM_RXFS_ADDR 0x50
-
-/* Register field Mask Mapping */
-#define UARTDM_SR_PAR_FRAME_BMSK BIT(5)
-#define UARTDM_SR_OVERRUN_BMSK BIT(4)
-#define UARTDM_SR_TXEMT_BMSK BIT(3)
-#define UARTDM_SR_TXRDY_BMSK BIT(2)
-#define UARTDM_SR_RXRDY_BMSK BIT(0)
-
-#define UARTDM_CR_TX_DISABLE_BMSK BIT(3)
-#define UARTDM_CR_RX_DISABLE_BMSK BIT(1)
-#define UARTDM_CR_TX_EN_BMSK BIT(2)
-#define UARTDM_CR_RX_EN_BMSK BIT(0)
-
-/* UARTDM_CR channel_comman bit value (register field is bits 8:4) */
-#define RESET_RX 0x10
-#define RESET_TX 0x20
-#define RESET_ERROR_STATUS 0x30
-#define RESET_BREAK_INT 0x40
-#define START_BREAK 0x50
-#define STOP_BREAK 0x60
-#define RESET_CTS 0x70
-#define RESET_STALE_INT 0x80
-#define RFR_LOW 0xD0
-#define RFR_HIGH 0xE0
-#define CR_PROTECTION_EN 0x100
-#define STALE_EVENT_ENABLE 0x500
-#define STALE_EVENT_DISABLE 0x600
-#define FORCE_STALE_EVENT 0x400
-#define CLEAR_TX_READY 0x300
-#define RESET_TX_ERROR 0x800
-#define RESET_TX_DONE 0x810
-
-#define UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK 0xffffff00
-#define UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK 0x3f
-#define UARTDM_MR1_CTS_CTL_BMSK 0x40
-#define UARTDM_MR1_RX_RDY_CTL_BMSK 0x80
-
-#define UARTDM_MR2_ERROR_MODE_BMSK 0x40
-#define UARTDM_MR2_BITS_PER_CHAR_BMSK 0x30
-
-/* bits per character configuration */
-#define FIVE_BPC (0 << 4)
-#define SIX_BPC (1 << 4)
-#define SEVEN_BPC (2 << 4)
-#define EIGHT_BPC (3 << 4)
-
-#define UARTDM_MR2_STOP_BIT_LEN_BMSK 0xc
-#define STOP_BIT_ONE (1 << 2)
-#define STOP_BIT_TWO (3 << 2)
-
-#define UARTDM_MR2_PARITY_MODE_BMSK 0x3
-
-/* Parity configuration */
-#define NO_PARITY 0x0
-#define EVEN_PARITY 0x1
-#define ODD_PARITY 0x2
-#define SPACE_PARITY 0x3
-
-#define UARTDM_IPR_STALE_TIMEOUT_MSB_BMSK 0xffffff80
-#define UARTDM_IPR_STALE_LSB_BMSK 0x1f
-
-/* These can be used for both ISR and IMR register */
-#define UARTDM_ISR_TX_READY_BMSK BIT(7)
-#define UARTDM_ISR_CURRENT_CTS_BMSK BIT(6)
-#define UARTDM_ISR_DELTA_CTS_BMSK BIT(5)
-#define UARTDM_ISR_RXLEV_BMSK BIT(4)
-#define UARTDM_ISR_RXSTALE_BMSK BIT(3)
-#define UARTDM_ISR_RXBREAK_BMSK BIT(2)
-#define UARTDM_ISR_RXHUNT_BMSK BIT(1)
-#define UARTDM_ISR_TXLEV_BMSK BIT(0)
-
-/* Field definitions for UART_DM_DMEN*/
-#define UARTDM_TX_DM_EN_BMSK 0x1
-#define UARTDM_RX_DM_EN_BMSK 0x2
-
-#define UART_FIFOSIZE 64
-#define UARTCLK 7372800
-
-/* Rx DMA request states */
-enum flush_reason {
- FLUSH_NONE,
- FLUSH_DATA_READY,
- FLUSH_DATA_INVALID, /* values after this indicate invalid data */
- FLUSH_IGNORE = FLUSH_DATA_INVALID,
- FLUSH_STOP,
- FLUSH_SHUTDOWN,
-};
-
-/* UART clock states */
-enum msm_hs_clk_states_e {
- MSM_HS_CLK_PORT_OFF, /* port not in use */
- MSM_HS_CLK_OFF, /* clock disabled */
- MSM_HS_CLK_REQUEST_OFF, /* disable after TX and RX flushed */
- MSM_HS_CLK_ON, /* clock enabled */
-};
-
-/* Track the forced RXSTALE flush during clock off sequence.
- * These states are only valid during MSM_HS_CLK_REQUEST_OFF */
-enum msm_hs_clk_req_off_state_e {
- CLK_REQ_OFF_START,
- CLK_REQ_OFF_RXSTALE_ISSUED,
- CLK_REQ_OFF_FLUSH_ISSUED,
- CLK_REQ_OFF_RXSTALE_FLUSHED,
-};
-
-/**
- * struct msm_hs_tx
- * @tx_ready_int_en: ok to dma more tx?
- * @dma_in_flight: tx dma in progress
- * @xfer: top level DMA command pointer structure
- * @command_ptr: third level command struct pointer
- * @command_ptr_ptr: second level command list struct pointer
- * @mapped_cmd_ptr: DMA view of third level command struct
- * @mapped_cmd_ptr_ptr: DMA view of second level command list struct
- * @tx_count: number of bytes to transfer in DMA transfer
- * @dma_base: DMA view of UART xmit buffer
- *
- * This structure describes a single Tx DMA transaction. MSM DMA
- * commands have two levels of indirection. The top level command
- * ptr points to a list of command ptr which in turn points to a
- * single DMA 'command'. In our case each Tx transaction consists
- * of a single second level pointer pointing to a 'box type' command.
- */
-struct msm_hs_tx {
- unsigned int tx_ready_int_en;
- unsigned int dma_in_flight;
- struct msm_dmov_cmd xfer;
- dmov_box *command_ptr;
- u32 *command_ptr_ptr;
- dma_addr_t mapped_cmd_ptr;
- dma_addr_t mapped_cmd_ptr_ptr;
- int tx_count;
- dma_addr_t dma_base;
-};
-
-/**
- * struct msm_hs_rx
- * @flush: Rx DMA request state
- * @xfer: top level DMA command pointer structure
- * @cmdptr_dmaaddr: DMA view of second level command structure
- * @command_ptr: third level DMA command pointer structure
- * @command_ptr_ptr: second level DMA command list pointer
- * @mapped_cmd_ptr: DMA view of the third level command structure
- * @wait: wait for DMA completion before shutdown
- * @buffer: destination buffer for RX DMA
- * @rbuffer: DMA view of buffer
- * @pool: dma pool out of which coherent rx buffer is allocated
- * @tty_work: private work-queue for tty flip buffer push task
- *
- * This structure describes a single Rx DMA transaction. Rx DMA
- * transactions use box mode DMA commands.
- */
-struct msm_hs_rx {
- enum flush_reason flush;
- struct msm_dmov_cmd xfer;
- dma_addr_t cmdptr_dmaaddr;
- dmov_box *command_ptr;
- u32 *command_ptr_ptr;
- dma_addr_t mapped_cmd_ptr;
- wait_queue_head_t wait;
- dma_addr_t rbuffer;
- unsigned char *buffer;
- struct dma_pool *pool;
- struct work_struct tty_work;
-};
-
-/**
- * struct msm_hs_rx_wakeup
- * @irq: IRQ line to be configured as interrupt source on Rx activity
- * @ignore: boolean value. 1 = ignore the wakeup interrupt
- * @rx_to_inject: extra character to be inserted to Rx tty on wakeup
- * @inject_rx: 1 = insert rx_to_inject. 0 = do not insert extra character
- *
- * This is an optional structure required for UART Rx GPIO IRQ based
- * wakeup from low power state. UART wakeup can be triggered by RX activity
- * (using a wakeup GPIO on the UART RX pin). This should only be used if
- * there is not a wakeup GPIO on the UART CTS, and the first RX byte is
- * known (eg., with the Bluetooth Texas Instruments HCILL protocol),
- * since the first RX byte will always be lost. RTS will be asserted even
- * while the UART is clocked off in this mode of operation.
- */
-struct msm_hs_rx_wakeup {
- int irq; /* < 0 indicates low power wakeup disabled */
- unsigned char ignore;
- unsigned char inject_rx;
- char rx_to_inject;
-};
-
-/**
- * struct msm_hs_port
- * @uport: embedded uart port structure
- * @imr_reg: shadow value of UARTDM_IMR
- * @clk: uart input clock handle
- * @tx: Tx transaction related data structure
- * @rx: Rx transaction related data structure
- * @dma_tx_channel: Tx DMA command channel
- * @dma_rx_channel Rx DMA command channel
- * @dma_tx_crci: Tx channel rate control interface number
- * @dma_rx_crci: Rx channel rate control interface number
- * @clk_off_timer: Timer to poll DMA event completion before clock off
- * @clk_off_delay: clk_off_timer poll interval
- * @clk_state: overall clock state
- * @clk_req_off_state: post flush clock states
- * @rx_wakeup: optional rx_wakeup feature related data
- * @exit_lpm_cb: optional callback to exit low power mode
- *
- * Low level serial port structure.
- */
-struct msm_hs_port {
- struct uart_port uport;
- unsigned long imr_reg;
- struct clk *clk;
- struct msm_hs_tx tx;
- struct msm_hs_rx rx;
-
- int dma_tx_channel;
- int dma_rx_channel;
- int dma_tx_crci;
- int dma_rx_crci;
-
- struct hrtimer clk_off_timer;
- ktime_t clk_off_delay;
- enum msm_hs_clk_states_e clk_state;
- enum msm_hs_clk_req_off_state_e clk_req_off_state;
-
- struct msm_hs_rx_wakeup rx_wakeup;
- void (*exit_lpm_cb)(struct uart_port *);
-};
-
-#define MSM_UARTDM_BURST_SIZE 16 /* DM burst size (in bytes) */
-#define UARTDM_TX_BUF_SIZE UART_XMIT_SIZE
-#define UARTDM_RX_BUF_SIZE 512
-
-#define UARTDM_NR 2
-
-static struct msm_hs_port q_uart_port[UARTDM_NR];
-static struct platform_driver msm_serial_hs_platform_driver;
-static struct uart_driver msm_hs_driver;
-static struct uart_ops msm_hs_ops;
-static struct workqueue_struct *msm_hs_workqueue;
-
-#define UARTDM_TO_MSM(uart_port) \
- container_of((uart_port), struct msm_hs_port, uport)
-
-static unsigned int use_low_power_rx_wakeup(struct msm_hs_port
- *msm_uport)
-{
- return (msm_uport->rx_wakeup.irq >= 0);
-}
-
-static unsigned int msm_hs_read(struct uart_port *uport,
- unsigned int offset)
-{
- return ioread32(uport->membase + offset);
-}
-
-static void msm_hs_write(struct uart_port *uport, unsigned int offset,
- unsigned int value)
-{
- iowrite32(value, uport->membase + offset);
-}
-
-static void msm_hs_release_port(struct uart_port *port)
-{
- iounmap(port->membase);
-}
-
-static int msm_hs_request_port(struct uart_port *port)
-{
- port->membase = ioremap(port->mapbase, PAGE_SIZE);
- if (unlikely(!port->membase))
- return -ENOMEM;
-
- /* configure the CR Protection to Enable */
- msm_hs_write(port, UARTDM_CR_ADDR, CR_PROTECTION_EN);
- return 0;
-}
-
-static int msm_hs_remove(struct platform_device *pdev)
-{
-
- struct msm_hs_port *msm_uport;
- struct device *dev;
-
- if (pdev->id < 0 || pdev->id >= UARTDM_NR) {
- printk(KERN_ERR "Invalid plaform device ID = %d\n", pdev->id);
- return -EINVAL;
- }
-
- msm_uport = &q_uart_port[pdev->id];
- dev = msm_uport->uport.dev;
-
- dma_unmap_single(dev, msm_uport->rx.mapped_cmd_ptr, sizeof(dmov_box),
- DMA_TO_DEVICE);
- dma_pool_free(msm_uport->rx.pool, msm_uport->rx.buffer,
- msm_uport->rx.rbuffer);
- dma_pool_destroy(msm_uport->rx.pool);
-
- dma_unmap_single(dev, msm_uport->rx.cmdptr_dmaaddr, sizeof(u32),
- DMA_TO_DEVICE);
- dma_unmap_single(dev, msm_uport->tx.mapped_cmd_ptr_ptr, sizeof(u32),
- DMA_TO_DEVICE);
- dma_unmap_single(dev, msm_uport->tx.mapped_cmd_ptr, sizeof(dmov_box),
- DMA_TO_DEVICE);
-
- uart_remove_one_port(&msm_hs_driver, &msm_uport->uport);
- clk_put(msm_uport->clk);
-
- /* Free the tx resources */
- kfree(msm_uport->tx.command_ptr);
- kfree(msm_uport->tx.command_ptr_ptr);
-
- /* Free the rx resources */
- kfree(msm_uport->rx.command_ptr);
- kfree(msm_uport->rx.command_ptr_ptr);
-
- iounmap(msm_uport->uport.membase);
-
- return 0;
-}
-
-static int msm_hs_init_clk_locked(struct uart_port *uport)
-{
- int ret;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- ret = clk_enable(msm_uport->clk);
- if (ret) {
- printk(KERN_ERR "Error could not turn on UART clk\n");
- return ret;
- }
-
- /* Set up the MREG/NREG/DREG/MNDREG */
- ret = clk_set_rate(msm_uport->clk, uport->uartclk);
- if (ret) {
- printk(KERN_WARNING "Error setting clock rate on UART\n");
- clk_disable(msm_uport->clk);
- return ret;
- }
-
- msm_uport->clk_state = MSM_HS_CLK_ON;
- return 0;
-}
-
-/* Enable and Disable clocks (Used for power management) */
-static void msm_hs_pm(struct uart_port *uport, unsigned int state,
- unsigned int oldstate)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- if (use_low_power_rx_wakeup(msm_uport) ||
- msm_uport->exit_lpm_cb)
- return; /* ignore linux PM states,
- use msm_hs_request_clock API */
-
- switch (state) {
- case 0:
- clk_enable(msm_uport->clk);
- break;
- case 3:
- clk_disable(msm_uport->clk);
- break;
- default:
- dev_err(uport->dev, "msm_serial: Unknown PM state %d\n",
- state);
- }
-}
-
-/*
- * programs the UARTDM_CSR register with correct bit rates
- *
- * Interrupts should be disabled before we are called, as
- * we modify Set Baud rate
- * Set receive stale interrupt level, dependent on Bit Rate
- * Goal is to have around 8 ms before indicate stale.
- * roundup (((Bit Rate * .008) / 10) + 1
- */
-static void msm_hs_set_bps_locked(struct uart_port *uport,
- unsigned int bps)
-{
- unsigned long rxstale;
- unsigned long data;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- switch (bps) {
- case 300:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_75);
- rxstale = 1;
- break;
- case 600:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_150);
- rxstale = 1;
- break;
- case 1200:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_300);
- rxstale = 1;
- break;
- case 2400:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_600);
- rxstale = 1;
- break;
- case 4800:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_1200);
- rxstale = 1;
- break;
- case 9600:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_2400);
- rxstale = 2;
- break;
- case 14400:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_3600);
- rxstale = 3;
- break;
- case 19200:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_4800);
- rxstale = 4;
- break;
- case 28800:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_7200);
- rxstale = 6;
- break;
- case 38400:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_9600);
- rxstale = 8;
- break;
- case 57600:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_14400);
- rxstale = 16;
- break;
- case 76800:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_19200);
- rxstale = 16;
- break;
- case 115200:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_28800);
- rxstale = 31;
- break;
- case 230400:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_57600);
- rxstale = 31;
- break;
- case 460800:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_115200);
- rxstale = 31;
- break;
- case 4000000:
- case 3686400:
- case 3200000:
- case 3500000:
- case 3000000:
- case 2500000:
- case 1500000:
- case 1152000:
- case 1000000:
- case 921600:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_115200);
- rxstale = 31;
- break;
- default:
- msm_hs_write(uport, UARTDM_CSR_ADDR, UARTDM_CSR_2400);
- /* default to 9600 */
- bps = 9600;
- rxstale = 2;
- break;
- }
- if (bps > 460800)
- uport->uartclk = bps * 16;
- else
- uport->uartclk = UARTCLK;
-
- if (clk_set_rate(msm_uport->clk, uport->uartclk)) {
- printk(KERN_WARNING "Error setting clock rate on UART\n");
- return;
- }
-
- data = rxstale & UARTDM_IPR_STALE_LSB_BMSK;
- data |= UARTDM_IPR_STALE_TIMEOUT_MSB_BMSK & (rxstale << 2);
-
- msm_hs_write(uport, UARTDM_IPR_ADDR, data);
-}
-
-/*
- * termios : new ktermios
- * oldtermios: old ktermios previous setting
- *
- * Configure the serial port
- */
-static void msm_hs_set_termios(struct uart_port *uport,
- struct ktermios *termios,
- struct ktermios *oldtermios)
-{
- unsigned int bps;
- unsigned long data;
- unsigned long flags;
- unsigned int c_cflag = termios->c_cflag;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- spin_lock_irqsave(&uport->lock, flags);
- clk_enable(msm_uport->clk);
-
- /* 300 is the minimum baud support by the driver */
- bps = uart_get_baud_rate(uport, termios, oldtermios, 200, 4000000);
-
- /* Temporary remapping 200 BAUD to 3.2 mbps */
- if (bps == 200)
- bps = 3200000;
-
- msm_hs_set_bps_locked(uport, bps);
-
- data = msm_hs_read(uport, UARTDM_MR2_ADDR);
- data &= ~UARTDM_MR2_PARITY_MODE_BMSK;
- /* set parity */
- if (PARENB == (c_cflag & PARENB)) {
- if (PARODD == (c_cflag & PARODD))
- data |= ODD_PARITY;
- else if (CMSPAR == (c_cflag & CMSPAR))
- data |= SPACE_PARITY;
- else
- data |= EVEN_PARITY;
- }
-
- /* Set bits per char */
- data &= ~UARTDM_MR2_BITS_PER_CHAR_BMSK;
-
- switch (c_cflag & CSIZE) {
- case CS5:
- data |= FIVE_BPC;
- break;
- case CS6:
- data |= SIX_BPC;
- break;
- case CS7:
- data |= SEVEN_BPC;
- break;
- default:
- data |= EIGHT_BPC;
- break;
- }
- /* stop bits */
- if (c_cflag & CSTOPB) {
- data |= STOP_BIT_TWO;
- } else {
- /* otherwise 1 stop bit */
- data |= STOP_BIT_ONE;
- }
- data |= UARTDM_MR2_ERROR_MODE_BMSK;
- /* write parity/bits per char/stop bit configuration */
- msm_hs_write(uport, UARTDM_MR2_ADDR, data);
-
- /* Configure HW flow control */
- data = msm_hs_read(uport, UARTDM_MR1_ADDR);
-
- data &= ~(UARTDM_MR1_CTS_CTL_BMSK | UARTDM_MR1_RX_RDY_CTL_BMSK);
-
- if (c_cflag & CRTSCTS) {
- data |= UARTDM_MR1_CTS_CTL_BMSK;
- data |= UARTDM_MR1_RX_RDY_CTL_BMSK;
- }
-
- msm_hs_write(uport, UARTDM_MR1_ADDR, data);
-
- uport->ignore_status_mask = termios->c_iflag & INPCK;
- uport->ignore_status_mask |= termios->c_iflag & IGNPAR;
- uport->read_status_mask = (termios->c_cflag & CREAD);
-
- msm_hs_write(uport, UARTDM_IMR_ADDR, 0);
-
- /* Set Transmit software time out */
- uart_update_timeout(uport, c_cflag, bps);
-
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_RX);
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_TX);
-
- if (msm_uport->rx.flush == FLUSH_NONE) {
- msm_uport->rx.flush = FLUSH_IGNORE;
- msm_dmov_stop_cmd(msm_uport->dma_rx_channel, NULL, 1);
- }
-
- msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
-
- clk_disable(msm_uport->clk);
- spin_unlock_irqrestore(&uport->lock, flags);
-}
-
-/*
- * Standard API, Transmitter
- * Any character in the transmit shift register is sent
- */
-static unsigned int msm_hs_tx_empty(struct uart_port *uport)
-{
- unsigned int data;
- unsigned int ret = 0;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- clk_enable(msm_uport->clk);
-
- data = msm_hs_read(uport, UARTDM_SR_ADDR);
- if (data & UARTDM_SR_TXEMT_BMSK)
- ret = TIOCSER_TEMT;
-
- clk_disable(msm_uport->clk);
-
- return ret;
-}
-
-/*
- * Standard API, Stop transmitter.
- * Any character in the transmit shift register is sent as
- * well as the current data mover transfer .
- */
-static void msm_hs_stop_tx_locked(struct uart_port *uport)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- msm_uport->tx.tx_ready_int_en = 0;
-}
-
-/*
- * Standard API, Stop receiver as soon as possible.
- *
- * Function immediately terminates the operation of the
- * channel receiver and any incoming characters are lost. None
- * of the receiver status bits are affected by this command and
- * characters that are already in the receive FIFO there.
- */
-static void msm_hs_stop_rx_locked(struct uart_port *uport)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
- unsigned int data;
-
- clk_enable(msm_uport->clk);
-
- /* disable dlink */
- data = msm_hs_read(uport, UARTDM_DMEN_ADDR);
- data &= ~UARTDM_RX_DM_EN_BMSK;
- msm_hs_write(uport, UARTDM_DMEN_ADDR, data);
-
- /* Disable the receiver */
- if (msm_uport->rx.flush == FLUSH_NONE)
- msm_dmov_stop_cmd(msm_uport->dma_rx_channel, NULL, 1);
-
- if (msm_uport->rx.flush != FLUSH_SHUTDOWN)
- msm_uport->rx.flush = FLUSH_STOP;
-
- clk_disable(msm_uport->clk);
-}
-
-/* Transmit the next chunk of data */
-static void msm_hs_submit_tx_locked(struct uart_port *uport)
-{
- int left;
- int tx_count;
- dma_addr_t src_addr;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
- struct msm_hs_tx *tx = &msm_uport->tx;
- struct circ_buf *tx_buf = &msm_uport->uport.state->xmit;
-
- if (uart_circ_empty(tx_buf) || uport->state->port.tty->stopped) {
- msm_hs_stop_tx_locked(uport);
- return;
- }
-
- tx->dma_in_flight = 1;
-
- tx_count = uart_circ_chars_pending(tx_buf);
-
- if (UARTDM_TX_BUF_SIZE < tx_count)
- tx_count = UARTDM_TX_BUF_SIZE;
-
- left = UART_XMIT_SIZE - tx_buf->tail;
-
- if (tx_count > left)
- tx_count = left;
-
- src_addr = tx->dma_base + tx_buf->tail;
- dma_sync_single_for_device(uport->dev, src_addr, tx_count,
- DMA_TO_DEVICE);
-
- tx->command_ptr->num_rows = (((tx_count + 15) >> 4) << 16) |
- ((tx_count + 15) >> 4);
- tx->command_ptr->src_row_addr = src_addr;
-
- dma_sync_single_for_device(uport->dev, tx->mapped_cmd_ptr,
- sizeof(dmov_box), DMA_TO_DEVICE);
-
- *tx->command_ptr_ptr = CMD_PTR_LP | DMOV_CMD_ADDR(tx->mapped_cmd_ptr);
-
- dma_sync_single_for_device(uport->dev, tx->mapped_cmd_ptr_ptr,
- sizeof(u32), DMA_TO_DEVICE);
-
- /* Save tx_count to use in Callback */
- tx->tx_count = tx_count;
- msm_hs_write(uport, UARTDM_NCF_TX_ADDR, tx_count);
-
- /* Disable the tx_ready interrupt */
- msm_uport->imr_reg &= ~UARTDM_ISR_TX_READY_BMSK;
- msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
- msm_dmov_enqueue_cmd(msm_uport->dma_tx_channel, &tx->xfer);
-}
-
-/* Start to receive the next chunk of data */
-static void msm_hs_start_rx_locked(struct uart_port *uport)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_STALE_INT);
- msm_hs_write(uport, UARTDM_DMRX_ADDR, UARTDM_RX_BUF_SIZE);
- msm_hs_write(uport, UARTDM_CR_ADDR, STALE_EVENT_ENABLE);
- msm_uport->imr_reg |= UARTDM_ISR_RXLEV_BMSK;
- msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
-
- msm_uport->rx.flush = FLUSH_NONE;
- msm_dmov_enqueue_cmd(msm_uport->dma_rx_channel, &msm_uport->rx.xfer);
-
- /* might have finished RX and be ready to clock off */
- hrtimer_start(&msm_uport->clk_off_timer, msm_uport->clk_off_delay,
- HRTIMER_MODE_REL);
-}
-
-/* Enable the transmitter Interrupt */
-static void msm_hs_start_tx_locked(struct uart_port *uport)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- clk_enable(msm_uport->clk);
-
- if (msm_uport->exit_lpm_cb)
- msm_uport->exit_lpm_cb(uport);
-
- if (msm_uport->tx.tx_ready_int_en == 0) {
- msm_uport->tx.tx_ready_int_en = 1;
- msm_hs_submit_tx_locked(uport);
- }
-
- clk_disable(msm_uport->clk);
-}
-
-/*
- * This routine is called when we are done with a DMA transfer
- *
- * This routine is registered with Data mover when we set
- * up a Data Mover transfer. It is called from Data mover ISR
- * when the DMA transfer is done.
- */
-static void msm_hs_dmov_tx_callback(struct msm_dmov_cmd *cmd_ptr,
- unsigned int result,
- struct msm_dmov_errdata *err)
-{
- unsigned long flags;
- struct msm_hs_port *msm_uport;
-
- /* DMA did not finish properly */
- WARN_ON((((result & RSLT_FIFO_CNTR_BMSK) >> 28) == 1) &&
- !(result & RSLT_VLD));
-
- msm_uport = container_of(cmd_ptr, struct msm_hs_port, tx.xfer);
-
- spin_lock_irqsave(&msm_uport->uport.lock, flags);
- clk_enable(msm_uport->clk);
-
- msm_uport->imr_reg |= UARTDM_ISR_TX_READY_BMSK;
- msm_hs_write(&msm_uport->uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
-
- clk_disable(msm_uport->clk);
- spin_unlock_irqrestore(&msm_uport->uport.lock, flags);
-}
-
-/*
- * This routine is called when we are done with a DMA transfer or the
- * a flush has been sent to the data mover driver.
- *
- * This routine is registered with Data mover when we set up a Data Mover
- * transfer. It is called from Data mover ISR when the DMA transfer is done.
- */
-static void msm_hs_dmov_rx_callback(struct msm_dmov_cmd *cmd_ptr,
- unsigned int result,
- struct msm_dmov_errdata *err)
-{
- int retval;
- int rx_count;
- unsigned long status;
- unsigned int error_f = 0;
- unsigned long flags;
- unsigned int flush;
- struct tty_port *port;
- struct uart_port *uport;
- struct msm_hs_port *msm_uport;
-
- msm_uport = container_of(cmd_ptr, struct msm_hs_port, rx.xfer);
- uport = &msm_uport->uport;
-
- spin_lock_irqsave(&uport->lock, flags);
- clk_enable(msm_uport->clk);
-
- port = &uport->state->port;
-
- msm_hs_write(uport, UARTDM_CR_ADDR, STALE_EVENT_DISABLE);
-
- status = msm_hs_read(uport, UARTDM_SR_ADDR);
-
- /* overflow is not connect to data in a FIFO */
- if (unlikely((status & UARTDM_SR_OVERRUN_BMSK) &&
- (uport->read_status_mask & CREAD))) {
- tty_insert_flip_char(port, 0, TTY_OVERRUN);
- uport->icount.buf_overrun++;
- error_f = 1;
- }
-
- if (!(uport->ignore_status_mask & INPCK))
- status = status & ~(UARTDM_SR_PAR_FRAME_BMSK);
-
- if (unlikely(status & UARTDM_SR_PAR_FRAME_BMSK)) {
- /* Can not tell difference between parity & frame error */
- uport->icount.parity++;
- error_f = 1;
- if (uport->ignore_status_mask & IGNPAR)
- tty_insert_flip_char(port, 0, TTY_PARITY);
- }
-
- if (error_f)
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_ERROR_STATUS);
-
- if (msm_uport->clk_req_off_state == CLK_REQ_OFF_FLUSH_ISSUED)
- msm_uport->clk_req_off_state = CLK_REQ_OFF_RXSTALE_FLUSHED;
-
- flush = msm_uport->rx.flush;
- if (flush == FLUSH_IGNORE)
- msm_hs_start_rx_locked(uport);
- if (flush == FLUSH_STOP)
- msm_uport->rx.flush = FLUSH_SHUTDOWN;
- if (flush >= FLUSH_DATA_INVALID)
- goto out;
-
- rx_count = msm_hs_read(uport, UARTDM_RX_TOTAL_SNAP_ADDR);
-
- if (0 != (uport->read_status_mask & CREAD)) {
- retval = tty_insert_flip_string(port, msm_uport->rx.buffer,
- rx_count);
- BUG_ON(retval != rx_count);
- }
-
- msm_hs_start_rx_locked(uport);
-
-out:
- clk_disable(msm_uport->clk);
-
- spin_unlock_irqrestore(&uport->lock, flags);
-
- if (flush < FLUSH_DATA_INVALID)
- queue_work(msm_hs_workqueue, &msm_uport->rx.tty_work);
-}
-
-static void msm_hs_tty_flip_buffer_work(struct work_struct *work)
-{
- struct msm_hs_port *msm_uport =
- container_of(work, struct msm_hs_port, rx.tty_work);
-
- tty_flip_buffer_push(&msm_uport->uport.state->port);
-}
-
-/*
- * Standard API, Current states of modem control inputs
- *
- * Since CTS can be handled entirely by HARDWARE we always
- * indicate clear to send and count on the TX FIFO to block when
- * it fills up.
- *
- * - TIOCM_DCD
- * - TIOCM_CTS
- * - TIOCM_DSR
- * - TIOCM_RI
- * (Unsupported) DCD and DSR will return them high. RI will return low.
- */
-static unsigned int msm_hs_get_mctrl_locked(struct uart_port *uport)
-{
- return TIOCM_DSR | TIOCM_CAR | TIOCM_CTS;
-}
-
-/*
- * True enables UART auto RFR, which indicates we are ready for data if the RX
- * buffer is not full. False disables auto RFR, and deasserts RFR to indicate
- * we are not ready for data. Must be called with UART clock on.
- */
-static void set_rfr_locked(struct uart_port *uport, int auto_rfr)
-{
- unsigned int data;
-
- data = msm_hs_read(uport, UARTDM_MR1_ADDR);
-
- if (auto_rfr) {
- /* enable auto ready-for-receiving */
- data |= UARTDM_MR1_RX_RDY_CTL_BMSK;
- msm_hs_write(uport, UARTDM_MR1_ADDR, data);
- } else {
- /* disable auto ready-for-receiving */
- data &= ~UARTDM_MR1_RX_RDY_CTL_BMSK;
- msm_hs_write(uport, UARTDM_MR1_ADDR, data);
- /* RFR is active low, set high */
- msm_hs_write(uport, UARTDM_CR_ADDR, RFR_HIGH);
- }
-}
-
-/*
- * Standard API, used to set or clear RFR
- */
-static void msm_hs_set_mctrl_locked(struct uart_port *uport,
- unsigned int mctrl)
-{
- unsigned int auto_rfr;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- clk_enable(msm_uport->clk);
-
- auto_rfr = TIOCM_RTS & mctrl ? 1 : 0;
- set_rfr_locked(uport, auto_rfr);
-
- clk_disable(msm_uport->clk);
-}
-
-/* Standard API, Enable modem status (CTS) interrupt */
-static void msm_hs_enable_ms_locked(struct uart_port *uport)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- clk_enable(msm_uport->clk);
-
- /* Enable DELTA_CTS Interrupt */
- msm_uport->imr_reg |= UARTDM_ISR_DELTA_CTS_BMSK;
- msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
-
- clk_disable(msm_uport->clk);
-
-}
-
-/*
- * Standard API, Break Signal
- *
- * Control the transmission of a break signal. ctl eq 0 => break
- * signal terminate ctl ne 0 => start break signal
- */
-static void msm_hs_break_ctl(struct uart_port *uport, int ctl)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- clk_enable(msm_uport->clk);
- msm_hs_write(uport, UARTDM_CR_ADDR, ctl ? START_BREAK : STOP_BREAK);
- clk_disable(msm_uport->clk);
-}
-
-static void msm_hs_config_port(struct uart_port *uport, int cfg_flags)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&uport->lock, flags);
- if (cfg_flags & UART_CONFIG_TYPE) {
- uport->type = PORT_MSM;
- msm_hs_request_port(uport);
- }
- spin_unlock_irqrestore(&uport->lock, flags);
-}
-
-/* Handle CTS changes (Called from interrupt handler) */
-static void msm_hs_handle_delta_cts_locked(struct uart_port *uport)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- clk_enable(msm_uport->clk);
-
- /* clear interrupt */
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_CTS);
- uport->icount.cts++;
-
- clk_disable(msm_uport->clk);
-
- /* clear the IOCTL TIOCMIWAIT if called */
- wake_up_interruptible(&uport->state->port.delta_msr_wait);
-}
-
-/* check if the TX path is flushed, and if so clock off
- * returns 0 did not clock off, need to retry (still sending final byte)
- * -1 did not clock off, do not retry
- * 1 if we clocked off
- */
-static int msm_hs_check_clock_off_locked(struct uart_port *uport)
-{
- unsigned long sr_status;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
- struct circ_buf *tx_buf = &uport->state->xmit;
-
- /* Cancel if tx tty buffer is not empty, dma is in flight,
- * or tx fifo is not empty, or rx fifo is not empty */
- if (msm_uport->clk_state != MSM_HS_CLK_REQUEST_OFF ||
- !uart_circ_empty(tx_buf) || msm_uport->tx.dma_in_flight ||
- (msm_uport->imr_reg & UARTDM_ISR_TXLEV_BMSK) ||
- !(msm_uport->imr_reg & UARTDM_ISR_RXLEV_BMSK)) {
- return -1;
- }
-
- /* Make sure the uart is finished with the last byte */
- sr_status = msm_hs_read(uport, UARTDM_SR_ADDR);
- if (!(sr_status & UARTDM_SR_TXEMT_BMSK))
- return 0; /* retry */
-
- /* Make sure forced RXSTALE flush complete */
- switch (msm_uport->clk_req_off_state) {
- case CLK_REQ_OFF_START:
- msm_uport->clk_req_off_state = CLK_REQ_OFF_RXSTALE_ISSUED;
- msm_hs_write(uport, UARTDM_CR_ADDR, FORCE_STALE_EVENT);
- return 0; /* RXSTALE flush not complete - retry */
- case CLK_REQ_OFF_RXSTALE_ISSUED:
- case CLK_REQ_OFF_FLUSH_ISSUED:
- return 0; /* RXSTALE flush not complete - retry */
- case CLK_REQ_OFF_RXSTALE_FLUSHED:
- break; /* continue */
- }
-
- if (msm_uport->rx.flush != FLUSH_SHUTDOWN) {
- if (msm_uport->rx.flush == FLUSH_NONE)
- msm_hs_stop_rx_locked(uport);
- return 0; /* come back later to really clock off */
- }
-
- /* we really want to clock off */
- clk_disable(msm_uport->clk);
- msm_uport->clk_state = MSM_HS_CLK_OFF;
-
- if (use_low_power_rx_wakeup(msm_uport)) {
- msm_uport->rx_wakeup.ignore = 1;
- enable_irq(msm_uport->rx_wakeup.irq);
- }
- return 1;
-}
-
-static enum hrtimer_restart msm_hs_clk_off_retry(struct hrtimer *timer)
-{
- unsigned long flags;
- int ret = HRTIMER_NORESTART;
- struct msm_hs_port *msm_uport = container_of(timer, struct msm_hs_port,
- clk_off_timer);
- struct uart_port *uport = &msm_uport->uport;
-
- spin_lock_irqsave(&uport->lock, flags);
-
- if (!msm_hs_check_clock_off_locked(uport)) {
- hrtimer_forward_now(timer, msm_uport->clk_off_delay);
- ret = HRTIMER_RESTART;
- }
-
- spin_unlock_irqrestore(&uport->lock, flags);
-
- return ret;
-}
-
-static irqreturn_t msm_hs_isr(int irq, void *dev)
-{
- unsigned long flags;
- unsigned long isr_status;
- struct msm_hs_port *msm_uport = dev;
- struct uart_port *uport = &msm_uport->uport;
- struct circ_buf *tx_buf = &uport->state->xmit;
- struct msm_hs_tx *tx = &msm_uport->tx;
- struct msm_hs_rx *rx = &msm_uport->rx;
-
- spin_lock_irqsave(&uport->lock, flags);
-
- isr_status = msm_hs_read(uport, UARTDM_MISR_ADDR);
-
- /* Uart RX starting */
- if (isr_status & UARTDM_ISR_RXLEV_BMSK) {
- msm_uport->imr_reg &= ~UARTDM_ISR_RXLEV_BMSK;
- msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
- }
- /* Stale rx interrupt */
- if (isr_status & UARTDM_ISR_RXSTALE_BMSK) {
- msm_hs_write(uport, UARTDM_CR_ADDR, STALE_EVENT_DISABLE);
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_STALE_INT);
-
- if (msm_uport->clk_req_off_state == CLK_REQ_OFF_RXSTALE_ISSUED)
- msm_uport->clk_req_off_state =
- CLK_REQ_OFF_FLUSH_ISSUED;
- if (rx->flush == FLUSH_NONE) {
- rx->flush = FLUSH_DATA_READY;
- msm_dmov_stop_cmd(msm_uport->dma_rx_channel, NULL, 1);
- }
- }
- /* tx ready interrupt */
- if (isr_status & UARTDM_ISR_TX_READY_BMSK) {
- /* Clear TX Ready */
- msm_hs_write(uport, UARTDM_CR_ADDR, CLEAR_TX_READY);
-
- if (msm_uport->clk_state == MSM_HS_CLK_REQUEST_OFF) {
- msm_uport->imr_reg |= UARTDM_ISR_TXLEV_BMSK;
- msm_hs_write(uport, UARTDM_IMR_ADDR,
- msm_uport->imr_reg);
- }
-
- /* Complete DMA TX transactions and submit new transactions */
- tx_buf->tail = (tx_buf->tail + tx->tx_count) & ~UART_XMIT_SIZE;
-
- tx->dma_in_flight = 0;
-
- uport->icount.tx += tx->tx_count;
- if (tx->tx_ready_int_en)
- msm_hs_submit_tx_locked(uport);
-
- if (uart_circ_chars_pending(tx_buf) < WAKEUP_CHARS)
- uart_write_wakeup(uport);
- }
- if (isr_status & UARTDM_ISR_TXLEV_BMSK) {
- /* TX FIFO is empty */
- msm_uport->imr_reg &= ~UARTDM_ISR_TXLEV_BMSK;
- msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
- if (!msm_hs_check_clock_off_locked(uport))
- hrtimer_start(&msm_uport->clk_off_timer,
- msm_uport->clk_off_delay,
- HRTIMER_MODE_REL);
- }
-
- /* Change in CTS interrupt */
- if (isr_status & UARTDM_ISR_DELTA_CTS_BMSK)
- msm_hs_handle_delta_cts_locked(uport);
-
- spin_unlock_irqrestore(&uport->lock, flags);
-
- return IRQ_HANDLED;
-}
-
-void msm_hs_request_clock_off_locked(struct uart_port *uport)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- if (msm_uport->clk_state == MSM_HS_CLK_ON) {
- msm_uport->clk_state = MSM_HS_CLK_REQUEST_OFF;
- msm_uport->clk_req_off_state = CLK_REQ_OFF_START;
- if (!use_low_power_rx_wakeup(msm_uport))
- set_rfr_locked(uport, 0);
- msm_uport->imr_reg |= UARTDM_ISR_TXLEV_BMSK;
- msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
- }
-}
-
-/**
- * msm_hs_request_clock_off - request to (i.e. asynchronously) turn off uart
- * clock once pending TX is flushed and Rx DMA command is terminated.
- * @uport: uart_port structure for the device instance.
- *
- * This functions puts the device into a partially active low power mode. It
- * waits to complete all pending tx transactions, flushes ongoing Rx DMA
- * command and terminates UART side Rx transaction, puts UART HW in non DMA
- * mode and then clocks off the device. A client calls this when no UART
- * data is expected. msm_request_clock_on() must be called before any further
- * UART can be sent or received.
- */
-void msm_hs_request_clock_off(struct uart_port *uport)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&uport->lock, flags);
- msm_hs_request_clock_off_locked(uport);
- spin_unlock_irqrestore(&uport->lock, flags);
-}
-
-void msm_hs_request_clock_on_locked(struct uart_port *uport)
-{
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
- unsigned int data;
-
- switch (msm_uport->clk_state) {
- case MSM_HS_CLK_OFF:
- clk_enable(msm_uport->clk);
- disable_irq_nosync(msm_uport->rx_wakeup.irq);
- /* fall-through */
- case MSM_HS_CLK_REQUEST_OFF:
- if (msm_uport->rx.flush == FLUSH_STOP ||
- msm_uport->rx.flush == FLUSH_SHUTDOWN) {
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_RX);
- data = msm_hs_read(uport, UARTDM_DMEN_ADDR);
- data |= UARTDM_RX_DM_EN_BMSK;
- msm_hs_write(uport, UARTDM_DMEN_ADDR, data);
- }
- hrtimer_try_to_cancel(&msm_uport->clk_off_timer);
- if (msm_uport->rx.flush == FLUSH_SHUTDOWN)
- msm_hs_start_rx_locked(uport);
- if (!use_low_power_rx_wakeup(msm_uport))
- set_rfr_locked(uport, 1);
- if (msm_uport->rx.flush == FLUSH_STOP)
- msm_uport->rx.flush = FLUSH_IGNORE;
- msm_uport->clk_state = MSM_HS_CLK_ON;
- break;
- case MSM_HS_CLK_ON:
- break;
- case MSM_HS_CLK_PORT_OFF:
- break;
- }
-}
-
-/**
- * msm_hs_request_clock_on - Switch the device from partially active low
- * power mode to fully active (i.e. clock on) mode.
- * @uport: uart_port structure for the device.
- *
- * This function switches on the input clock, puts UART HW into DMA mode
- * and enqueues an Rx DMA command if the device was in partially active
- * mode. It has no effect if called with the device in inactive state.
- */
-void msm_hs_request_clock_on(struct uart_port *uport)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&uport->lock, flags);
- msm_hs_request_clock_on_locked(uport);
- spin_unlock_irqrestore(&uport->lock, flags);
-}
-
-static irqreturn_t msm_hs_rx_wakeup_isr(int irq, void *dev)
-{
- unsigned int wakeup = 0;
- unsigned long flags;
- struct msm_hs_port *msm_uport = dev;
- struct uart_port *uport = &msm_uport->uport;
-
- spin_lock_irqsave(&uport->lock, flags);
- if (msm_uport->clk_state == MSM_HS_CLK_OFF) {
- /* ignore the first irq - it is a pending irq that occurred
- * before enable_irq() */
- if (msm_uport->rx_wakeup.ignore)
- msm_uport->rx_wakeup.ignore = 0;
- else
- wakeup = 1;
- }
-
- if (wakeup) {
- /* the uart was clocked off during an rx, wake up and
- * optionally inject char into tty rx */
- msm_hs_request_clock_on_locked(uport);
- if (msm_uport->rx_wakeup.inject_rx) {
- tty_insert_flip_char(&uport->state->port,
- msm_uport->rx_wakeup.rx_to_inject,
- TTY_NORMAL);
- queue_work(msm_hs_workqueue, &msm_uport->rx.tty_work);
- }
- }
-
- spin_unlock_irqrestore(&uport->lock, flags);
-
- return IRQ_HANDLED;
-}
-
-static const char *msm_hs_type(struct uart_port *port)
-{
- return (port->type == PORT_MSM) ? "MSM_HS_UART" : NULL;
-}
-
-/* Called when port is opened */
-static int msm_hs_startup(struct uart_port *uport)
-{
- int ret;
- int rfr_level;
- unsigned long flags;
- unsigned int data;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
- struct circ_buf *tx_buf = &uport->state->xmit;
- struct msm_hs_tx *tx = &msm_uport->tx;
- struct msm_hs_rx *rx = &msm_uport->rx;
-
- rfr_level = uport->fifosize;
- if (rfr_level > 16)
- rfr_level -= 16;
-
- tx->dma_base = dma_map_single(uport->dev, tx_buf->buf, UART_XMIT_SIZE,
- DMA_TO_DEVICE);
-
- /* do not let tty layer execute RX in global workqueue, use a
- * dedicated workqueue managed by this driver */
- uport->state->port.low_latency = 1;
-
- /* turn on uart clk */
- ret = msm_hs_init_clk_locked(uport);
- if (unlikely(ret)) {
- printk(KERN_ERR "Turning uartclk failed!\n");
- goto err_msm_hs_init_clk;
- }
-
- /* Set auto RFR Level */
- data = msm_hs_read(uport, UARTDM_MR1_ADDR);
- data &= ~UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK;
- data &= ~UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK;
- data |= (UARTDM_MR1_AUTO_RFR_LEVEL1_BMSK & (rfr_level << 2));
- data |= (UARTDM_MR1_AUTO_RFR_LEVEL0_BMSK & rfr_level);
- msm_hs_write(uport, UARTDM_MR1_ADDR, data);
-
- /* Make sure RXSTALE count is non-zero */
- data = msm_hs_read(uport, UARTDM_IPR_ADDR);
- if (!data) {
- data |= 0x1f & UARTDM_IPR_STALE_LSB_BMSK;
- msm_hs_write(uport, UARTDM_IPR_ADDR, data);
- }
-
- /* Enable Data Mover Mode */
- data = UARTDM_TX_DM_EN_BMSK | UARTDM_RX_DM_EN_BMSK;
- msm_hs_write(uport, UARTDM_DMEN_ADDR, data);
-
- /* Reset TX */
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_TX);
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_RX);
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_ERROR_STATUS);
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_BREAK_INT);
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_STALE_INT);
- msm_hs_write(uport, UARTDM_CR_ADDR, RESET_CTS);
- msm_hs_write(uport, UARTDM_CR_ADDR, RFR_LOW);
- /* Turn on Uart Receiver */
- msm_hs_write(uport, UARTDM_CR_ADDR, UARTDM_CR_RX_EN_BMSK);
-
- /* Turn on Uart Transmitter */
- msm_hs_write(uport, UARTDM_CR_ADDR, UARTDM_CR_TX_EN_BMSK);
-
- /* Initialize the tx */
- tx->tx_ready_int_en = 0;
- tx->dma_in_flight = 0;
-
- tx->xfer.complete_func = msm_hs_dmov_tx_callback;
- tx->xfer.execute_func = NULL;
-
- tx->command_ptr->cmd = CMD_LC |
- CMD_DST_CRCI(msm_uport->dma_tx_crci) | CMD_MODE_BOX;
-
- tx->command_ptr->src_dst_len = (MSM_UARTDM_BURST_SIZE << 16)
- | (MSM_UARTDM_BURST_SIZE);
-
- tx->command_ptr->row_offset = (MSM_UARTDM_BURST_SIZE << 16);
-
- tx->command_ptr->dst_row_addr =
- msm_uport->uport.mapbase + UARTDM_TF_ADDR;
-
-
- /* Turn on Uart Receive */
- rx->xfer.complete_func = msm_hs_dmov_rx_callback;
- rx->xfer.execute_func = NULL;
-
- rx->command_ptr->cmd = CMD_LC |
- CMD_SRC_CRCI(msm_uport->dma_rx_crci) | CMD_MODE_BOX;
-
- rx->command_ptr->src_dst_len = (MSM_UARTDM_BURST_SIZE << 16)
- | (MSM_UARTDM_BURST_SIZE);
- rx->command_ptr->row_offset = MSM_UARTDM_BURST_SIZE;
- rx->command_ptr->src_row_addr = uport->mapbase + UARTDM_RF_ADDR;
-
-
- msm_uport->imr_reg |= UARTDM_ISR_RXSTALE_BMSK;
- /* Enable reading the current CTS, no harm even if CTS is ignored */
- msm_uport->imr_reg |= UARTDM_ISR_CURRENT_CTS_BMSK;
-
- msm_hs_write(uport, UARTDM_TFWR_ADDR, 0); /* TXLEV on empty TX fifo */
-
-
- ret = request_irq(uport->irq, msm_hs_isr, IRQF_TRIGGER_HIGH,
- "msm_hs_uart", msm_uport);
- if (unlikely(ret)) {
- printk(KERN_ERR "Request msm_hs_uart IRQ failed!\n");
- goto err_request_irq;
- }
- if (use_low_power_rx_wakeup(msm_uport)) {
- ret = request_irq(msm_uport->rx_wakeup.irq,
- msm_hs_rx_wakeup_isr,
- IRQF_TRIGGER_FALLING,
- "msm_hs_rx_wakeup", msm_uport);
- if (unlikely(ret)) {
- printk(KERN_ERR "Request msm_hs_rx_wakeup IRQ failed!\n");
- free_irq(uport->irq, msm_uport);
- goto err_request_irq;
- }
- disable_irq(msm_uport->rx_wakeup.irq);
- }
-
- spin_lock_irqsave(&uport->lock, flags);
-
- msm_hs_write(uport, UARTDM_RFWR_ADDR, 0);
- msm_hs_start_rx_locked(uport);
-
- spin_unlock_irqrestore(&uport->lock, flags);
- ret = pm_runtime_set_active(uport->dev);
- if (ret)
- dev_err(uport->dev, "set active error:%d\n", ret);
- pm_runtime_enable(uport->dev);
-
- return 0;
-
-err_request_irq:
-err_msm_hs_init_clk:
- dma_unmap_single(uport->dev, tx->dma_base,
- UART_XMIT_SIZE, DMA_TO_DEVICE);
- return ret;
-}
-
-/* Initialize tx and rx data structures */
-static int uartdm_init_port(struct uart_port *uport)
-{
- int ret = 0;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
- struct msm_hs_tx *tx = &msm_uport->tx;
- struct msm_hs_rx *rx = &msm_uport->rx;
-
- /* Allocate the command pointer. Needs to be 64 bit aligned */
- tx->command_ptr = kmalloc(sizeof(dmov_box), GFP_KERNEL | __GFP_DMA);
- if (!tx->command_ptr)
- return -ENOMEM;
-
- tx->command_ptr_ptr = kmalloc(sizeof(u32), GFP_KERNEL | __GFP_DMA);
- if (!tx->command_ptr_ptr) {
- ret = -ENOMEM;
- goto err_tx_command_ptr_ptr;
- }
-
- tx->mapped_cmd_ptr = dma_map_single(uport->dev, tx->command_ptr,
- sizeof(dmov_box), DMA_TO_DEVICE);
- tx->mapped_cmd_ptr_ptr = dma_map_single(uport->dev,
- tx->command_ptr_ptr,
- sizeof(u32), DMA_TO_DEVICE);
- tx->xfer.cmdptr = DMOV_CMD_ADDR(tx->mapped_cmd_ptr_ptr);
-
- init_waitqueue_head(&rx->wait);
-
- rx->pool = dma_pool_create("rx_buffer_pool", uport->dev,
- UARTDM_RX_BUF_SIZE, 16, 0);
- if (!rx->pool) {
- pr_err("%s(): cannot allocate rx_buffer_pool", __func__);
- ret = -ENOMEM;
- goto err_dma_pool_create;
- }
-
- rx->buffer = dma_pool_alloc(rx->pool, GFP_KERNEL, &rx->rbuffer);
- if (!rx->buffer) {
- pr_err("%s(): cannot allocate rx->buffer", __func__);
- ret = -ENOMEM;
- goto err_dma_pool_alloc;
- }
-
- /* Allocate the command pointer. Needs to be 64 bit aligned */
- rx->command_ptr = kmalloc(sizeof(dmov_box), GFP_KERNEL | __GFP_DMA);
- if (!rx->command_ptr) {
- pr_err("%s(): cannot allocate rx->command_ptr", __func__);
- ret = -ENOMEM;
- goto err_rx_command_ptr;
- }
-
- rx->command_ptr_ptr = kmalloc(sizeof(u32), GFP_KERNEL | __GFP_DMA);
- if (!rx->command_ptr_ptr) {
- pr_err("%s(): cannot allocate rx->command_ptr_ptr", __func__);
- ret = -ENOMEM;
- goto err_rx_command_ptr_ptr;
- }
-
- rx->command_ptr->num_rows = ((UARTDM_RX_BUF_SIZE >> 4) << 16) |
- (UARTDM_RX_BUF_SIZE >> 4);
-
- rx->command_ptr->dst_row_addr = rx->rbuffer;
-
- rx->mapped_cmd_ptr = dma_map_single(uport->dev, rx->command_ptr,
- sizeof(dmov_box), DMA_TO_DEVICE);
-
- *rx->command_ptr_ptr = CMD_PTR_LP | DMOV_CMD_ADDR(rx->mapped_cmd_ptr);
-
- rx->cmdptr_dmaaddr = dma_map_single(uport->dev, rx->command_ptr_ptr,
- sizeof(u32), DMA_TO_DEVICE);
- rx->xfer.cmdptr = DMOV_CMD_ADDR(rx->cmdptr_dmaaddr);
-
- INIT_WORK(&rx->tty_work, msm_hs_tty_flip_buffer_work);
-
- return ret;
-
-err_rx_command_ptr_ptr:
- kfree(rx->command_ptr);
-err_rx_command_ptr:
- dma_pool_free(msm_uport->rx.pool, msm_uport->rx.buffer,
- msm_uport->rx.rbuffer);
-err_dma_pool_alloc:
- dma_pool_destroy(msm_uport->rx.pool);
-err_dma_pool_create:
- dma_unmap_single(uport->dev, msm_uport->tx.mapped_cmd_ptr_ptr,
- sizeof(u32), DMA_TO_DEVICE);
- dma_unmap_single(uport->dev, msm_uport->tx.mapped_cmd_ptr,
- sizeof(dmov_box), DMA_TO_DEVICE);
- kfree(msm_uport->tx.command_ptr_ptr);
-err_tx_command_ptr_ptr:
- kfree(msm_uport->tx.command_ptr);
- return ret;
-}
-
-static int msm_hs_probe(struct platform_device *pdev)
-{
- int ret;
- struct uart_port *uport;
- struct msm_hs_port *msm_uport;
- struct resource *resource;
- const struct msm_serial_hs_platform_data *pdata =
- dev_get_platdata(&pdev->dev);
-
- if (pdev->id < 0 || pdev->id >= UARTDM_NR) {
- printk(KERN_ERR "Invalid plaform device ID = %d\n", pdev->id);
- return -EINVAL;
- }
-
- msm_uport = &q_uart_port[pdev->id];
- uport = &msm_uport->uport;
-
- uport->dev = &pdev->dev;
-
- resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (unlikely(!resource))
- return -ENXIO;
-
- uport->mapbase = resource->start;
- uport->irq = platform_get_irq(pdev, 0);
- if (unlikely(uport->irq < 0))
- return -ENXIO;
-
- if (unlikely(irq_set_irq_wake(uport->irq, 1)))
- return -ENXIO;
-
- if (pdata == NULL || pdata->rx_wakeup_irq < 0)
- msm_uport->rx_wakeup.irq = -1;
- else {
- msm_uport->rx_wakeup.irq = pdata->rx_wakeup_irq;
- msm_uport->rx_wakeup.ignore = 1;
- msm_uport->rx_wakeup.inject_rx = pdata->inject_rx_on_wakeup;
- msm_uport->rx_wakeup.rx_to_inject = pdata->rx_to_inject;
-
- if (unlikely(msm_uport->rx_wakeup.irq < 0))
- return -ENXIO;
-
- if (unlikely(irq_set_irq_wake(msm_uport->rx_wakeup.irq, 1)))
- return -ENXIO;
- }
-
- if (pdata == NULL)
- msm_uport->exit_lpm_cb = NULL;
- else
- msm_uport->exit_lpm_cb = pdata->exit_lpm_cb;
-
- resource = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- "uartdm_channels");
- if (unlikely(!resource))
- return -ENXIO;
-
- msm_uport->dma_tx_channel = resource->start;
- msm_uport->dma_rx_channel = resource->end;
-
- resource = platform_get_resource_byname(pdev, IORESOURCE_DMA,
- "uartdm_crci");
- if (unlikely(!resource))
- return -ENXIO;
-
- msm_uport->dma_tx_crci = resource->start;
- msm_uport->dma_rx_crci = resource->end;
-
- uport->iotype = UPIO_MEM;
- uport->fifosize = UART_FIFOSIZE;
- uport->ops = &msm_hs_ops;
- uport->flags = UPF_BOOT_AUTOCONF;
- uport->uartclk = UARTCLK;
- msm_uport->imr_reg = 0x0;
- msm_uport->clk = clk_get(&pdev->dev, "uartdm_clk");
- if (IS_ERR(msm_uport->clk))
- return PTR_ERR(msm_uport->clk);
-
- ret = uartdm_init_port(uport);
- if (unlikely(ret))
- return ret;
-
- msm_uport->clk_state = MSM_HS_CLK_PORT_OFF;
- hrtimer_init(&msm_uport->clk_off_timer, CLOCK_MONOTONIC,
- HRTIMER_MODE_REL);
- msm_uport->clk_off_timer.function = msm_hs_clk_off_retry;
- msm_uport->clk_off_delay = ktime_set(0, 1000000); /* 1ms */
-
- uport->line = pdev->id;
- return uart_add_one_port(&msm_hs_driver, uport);
-}
-
-static int __init msm_serial_hs_init(void)
-{
- int ret, i;
-
- /* Init all UARTS as non-configured */
- for (i = 0; i < UARTDM_NR; i++)
- q_uart_port[i].uport.type = PORT_UNKNOWN;
-
- msm_hs_workqueue = create_singlethread_workqueue("msm_serial_hs");
- if (unlikely(!msm_hs_workqueue))
- return -ENOMEM;
-
- ret = uart_register_driver(&msm_hs_driver);
- if (unlikely(ret)) {
- printk(KERN_ERR "%s failed to load\n", __func__);
- goto err_uart_register_driver;
- }
-
- ret = platform_driver_register(&msm_serial_hs_platform_driver);
- if (ret) {
- printk(KERN_ERR "%s failed to load\n", __func__);
- goto err_platform_driver_register;
- }
-
- return ret;
-
-err_platform_driver_register:
- uart_unregister_driver(&msm_hs_driver);
-err_uart_register_driver:
- destroy_workqueue(msm_hs_workqueue);
- return ret;
-}
-module_init(msm_serial_hs_init);
-
-/*
- * Called by the upper layer when port is closed.
- * - Disables the port
- * - Unhook the ISR
- */
-static void msm_hs_shutdown(struct uart_port *uport)
-{
- unsigned long flags;
- struct msm_hs_port *msm_uport = UARTDM_TO_MSM(uport);
-
- BUG_ON(msm_uport->rx.flush < FLUSH_STOP);
-
- spin_lock_irqsave(&uport->lock, flags);
- clk_enable(msm_uport->clk);
-
- /* Disable the transmitter */
- msm_hs_write(uport, UARTDM_CR_ADDR, UARTDM_CR_TX_DISABLE_BMSK);
- /* Disable the receiver */
- msm_hs_write(uport, UARTDM_CR_ADDR, UARTDM_CR_RX_DISABLE_BMSK);
-
- pm_runtime_disable(uport->dev);
- pm_runtime_set_suspended(uport->dev);
-
- /* Free the interrupt */
- free_irq(uport->irq, msm_uport);
- if (use_low_power_rx_wakeup(msm_uport))
- free_irq(msm_uport->rx_wakeup.irq, msm_uport);
-
- msm_uport->imr_reg = 0;
- msm_hs_write(uport, UARTDM_IMR_ADDR, msm_uport->imr_reg);
-
- wait_event(msm_uport->rx.wait, msm_uport->rx.flush == FLUSH_SHUTDOWN);
-
- clk_disable(msm_uport->clk); /* to balance local clk_enable() */
- if (msm_uport->clk_state != MSM_HS_CLK_OFF)
- clk_disable(msm_uport->clk); /* to balance clk_state */
- msm_uport->clk_state = MSM_HS_CLK_PORT_OFF;
-
- dma_unmap_single(uport->dev, msm_uport->tx.dma_base,
- UART_XMIT_SIZE, DMA_TO_DEVICE);
-
- spin_unlock_irqrestore(&uport->lock, flags);
-
- if (cancel_work_sync(&msm_uport->rx.tty_work))
- msm_hs_tty_flip_buffer_work(&msm_uport->rx.tty_work);
-}
-
-static void __exit msm_serial_hs_exit(void)
-{
- flush_workqueue(msm_hs_workqueue);
- destroy_workqueue(msm_hs_workqueue);
- platform_driver_unregister(&msm_serial_hs_platform_driver);
- uart_unregister_driver(&msm_hs_driver);
-}
-module_exit(msm_serial_hs_exit);
-
-#ifdef CONFIG_PM
-static int msm_hs_runtime_idle(struct device *dev)
-{
- /*
- * returning success from idle results in runtime suspend to be
- * called
- */
- return 0;
-}
-
-static int msm_hs_runtime_resume(struct device *dev)
-{
- struct platform_device *pdev = container_of(dev, struct
- platform_device, dev);
- struct msm_hs_port *msm_uport = &q_uart_port[pdev->id];
-
- msm_hs_request_clock_on(&msm_uport->uport);
- return 0;
-}
-
-static int msm_hs_runtime_suspend(struct device *dev)
-{
- struct platform_device *pdev = container_of(dev, struct
- platform_device, dev);
- struct msm_hs_port *msm_uport = &q_uart_port[pdev->id];
-
- msm_hs_request_clock_off(&msm_uport->uport);
- return 0;
-}
-#else
-#define msm_hs_runtime_idle NULL
-#define msm_hs_runtime_resume NULL
-#define msm_hs_runtime_suspend NULL
-#endif
-
-static const struct dev_pm_ops msm_hs_dev_pm_ops = {
- .runtime_suspend = msm_hs_runtime_suspend,
- .runtime_resume = msm_hs_runtime_resume,
- .runtime_idle = msm_hs_runtime_idle,
-};
-
-static struct platform_driver msm_serial_hs_platform_driver = {
- .probe = msm_hs_probe,
- .remove = msm_hs_remove,
- .driver = {
- .name = "msm_serial_hs",
- .pm = &msm_hs_dev_pm_ops,
- },
-};
-
-static struct uart_driver msm_hs_driver = {
- .owner = THIS_MODULE,
- .driver_name = "msm_serial_hs",
- .dev_name = "ttyHS",
- .nr = UARTDM_NR,
- .cons = 0,
-};
-
-static struct uart_ops msm_hs_ops = {
- .tx_empty = msm_hs_tx_empty,
- .set_mctrl = msm_hs_set_mctrl_locked,
- .get_mctrl = msm_hs_get_mctrl_locked,
- .stop_tx = msm_hs_stop_tx_locked,
- .start_tx = msm_hs_start_tx_locked,
- .stop_rx = msm_hs_stop_rx_locked,
- .enable_ms = msm_hs_enable_ms_locked,
- .break_ctl = msm_hs_break_ctl,
- .startup = msm_hs_startup,
- .shutdown = msm_hs_shutdown,
- .set_termios = msm_hs_set_termios,
- .pm = msm_hs_pm,
- .type = msm_hs_type,
- .config_port = msm_hs_config_port,
- .release_port = msm_hs_release_port,
- .request_port = msm_hs_request_port,
-};
-
-MODULE_DESCRIPTION("High Speed UART Driver for the MSM chipset");
-MODULE_VERSION("1.2");
-MODULE_LICENSE("GPL v2");
diff --git a/include/linux/platform_data/msm_serial_hs.h b/include/linux/platform_data/msm_serial_hs.h
deleted file mode 100644
index 98a2046f8b31..000000000000
--- a/include/linux/platform_data/msm_serial_hs.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Copyright (C) 2008 Google, Inc.
- * Author: Nick Pelly <npelly@google.com>
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_ARCH_MSM_SERIAL_HS_H
-#define __ASM_ARCH_MSM_SERIAL_HS_H
-
-#include <linux/serial_core.h>
-
-/* API to request the uart clock off or on for low power management
- * Clients should call request_clock_off() when no uart data is expected,
- * and must call request_clock_on() before any further uart data can be
- * received. */
-extern void msm_hs_request_clock_off(struct uart_port *uport);
-extern void msm_hs_request_clock_on(struct uart_port *uport);
-
-/**
- * struct msm_serial_hs_platform_data
- * @rx_wakeup_irq: Rx activity irq
- * @rx_to_inject: extra character to be inserted to Rx tty on wakeup
- * @inject_rx: 1 = insert rx_to_inject. 0 = do not insert extra character
- * @exit_lpm_cb: function called before every Tx transaction
- *
- * This is an optional structure required for UART Rx GPIO IRQ based
- * wakeup from low power state. UART wakeup can be triggered by RX activity
- * (using a wakeup GPIO on the UART RX pin). This should only be used if
- * there is not a wakeup GPIO on the UART CTS, and the first RX byte is
- * known (eg., with the Bluetooth Texas Instruments HCILL protocol),
- * since the first RX byte will always be lost. RTS will be asserted even
- * while the UART is clocked off in this mode of operation.
- */
-struct msm_serial_hs_platform_data {
- int rx_wakeup_irq;
- unsigned char inject_rx_on_wakeup;
- char rx_to_inject;
- void (*exit_lpm_cb)(struct uart_port *);
-};
-
-#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 04/12] tty: serial: msm_serial: Remove dead code
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
2015-03-13 18:09 ` [PATCH 02/12] gpio: Remove gpio-msm-v1 driver Stephen Boyd
2015-03-13 18:09 ` [PATCH 03/12] tty: serial: Remove orphaned serial driver Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-13 18:09 ` [PATCH 05/12] net: smc91x: " Stephen Boyd
` (9 subsequent siblings)
12 siblings, 0 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This config no longer exists now that mach-msm has been removed.
Delete it and the associated code.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This can be acked and go through arm-soc or applied directly to serial tree.
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/msm_serial.h | 9 ---------
2 files changed, 1 insertion(+), 10 deletions(-)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 965c80f9fc50..049b9eb2e3e3 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1054,7 +1054,7 @@ config SERIAL_SGI_IOC3
config SERIAL_MSM
bool "MSM on-chip serial port support"
- depends on ARCH_MSM || ARCH_QCOM
+ depends on ARCH_QCOM
select SERIAL_CORE
config SERIAL_MSM_CONSOLE
diff --git a/drivers/tty/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h
index 3e1c7138d8cd..737f69fe7113 100644
--- a/drivers/tty/serial/msm_serial.h
+++ b/drivers/tty/serial/msm_serial.h
@@ -170,15 +170,6 @@ void msm_serial_set_mnd_regs_from_uartclk(struct uart_port *port)
msm_serial_set_mnd_regs_tcxoby4(port);
}
-/*
- * TROUT has a specific defect that makes it report it's uartclk
- * as 19.2Mhz (TCXO) when it's actually 4.8Mhz (TCXO/4). This special
- * cases TROUT to use the right clock.
- */
-#ifdef CONFIG_MACH_TROUT
-#define msm_serial_set_mnd_regs msm_serial_set_mnd_regs_tcxoby4
-#else
#define msm_serial_set_mnd_regs msm_serial_set_mnd_regs_from_uartclk
-#endif
#endif /* __DRIVERS_SERIAL_MSM_SERIAL_H */
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 05/12] net: smc91x: Remove dead code
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
` (2 preceding siblings ...)
2015-03-13 18:09 ` [PATCH 04/12] tty: serial: msm_serial: Remove dead code Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-13 19:52 ` Arnd Bergmann
2015-03-13 18:09 ` [PATCH 06/12] mmc: Remove msm_sdcc driver Stephen Boyd
` (8 subsequent siblings)
12 siblings, 1 reply; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This config no longer exists now that mach-msm has been removed.
Delete it and the associated code.
Cc: David S. Miller <davem@davemloft.net>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This can be acked and go through arm-soc or applied directly.
drivers/net/ethernet/smsc/smc91x.h | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/drivers/net/ethernet/smsc/smc91x.h b/drivers/net/ethernet/smsc/smc91x.h
index be67baf5f677..6fd5643c4fba 100644
--- a/drivers/net/ethernet/smsc/smc91x.h
+++ b/drivers/net/ethernet/smsc/smc91x.h
@@ -237,20 +237,6 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
#define RPC_LSA_DEFAULT RPC_LED_100_10
#define RPC_LSB_DEFAULT RPC_LED_TX_RX
-#elif defined(CONFIG_ARCH_MSM)
-
-#define SMC_CAN_USE_8BIT 0
-#define SMC_CAN_USE_16BIT 1
-#define SMC_CAN_USE_32BIT 0
-#define SMC_NOWAIT 1
-
-#define SMC_inw(a, r) readw((a) + (r))
-#define SMC_outw(v, a, r) writew(v, (a) + (r))
-#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
-#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
-
-#define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH
-
#elif defined(CONFIG_COLDFIRE)
#define SMC_CAN_USE_8BIT 0
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 06/12] mmc: Remove msm_sdcc driver
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
` (3 preceding siblings ...)
2015-03-13 18:09 ` [PATCH 05/12] net: smc91x: " Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-16 11:04 ` Ulf Hansson
2015-03-13 18:09 ` [PATCH 07/12] clocksource: qcom: Remove dead code Stephen Boyd
` (7 subsequent siblings)
12 siblings, 1 reply; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This driver is orphaned now that mach-msm has been removed.
Delete it.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Chris Ball <chris@printf.net>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
I'd appreciate an ack here from mmc maintainers so this can go with patch 1
through arm-soc.
drivers/mmc/host/Kconfig | 8 -
drivers/mmc/host/Makefile | 1 -
drivers/mmc/host/msm_sdcc.c | 1474 ----------------------------
drivers/mmc/host/msm_sdcc.h | 256 -----
include/linux/platform_data/mmc-msm_sdcc.h | 27 -
5 files changed, 1766 deletions(-)
delete mode 100644 drivers/mmc/host/msm_sdcc.c
delete mode 100644 drivers/mmc/host/msm_sdcc.h
delete mode 100644 include/linux/platform_data/mmc-msm_sdcc.h
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 61ac63a3776a..37d1d80fdf04 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -393,14 +393,6 @@ config MMC_SDHCI_MSM
If unsure, say N.
-config MMC_MSM
- tristate "Qualcomm SDCC Controller Support"
- depends on MMC && (ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50)
- help
- This provides support for the SD/MMC cell found in the
- MSM and QSD SOCs from Qualcomm. The controller also has
- support for SDIO devices.
-
config MMC_MXC
tristate "Freescale i.MX21/27/31 or MPC512x Multimedia Card support"
depends on ARCH_MXC || PPC_MPC512x
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 6a7cfe0de332..47f9421d0281 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -24,7 +24,6 @@ obj-$(CONFIG_MMC_OMAP) += omap.o
obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
-obj-$(CONFIG_MMC_MSM) += msm_sdcc.o
obj-$(CONFIG_MMC_MVSDIO) += mvsdio.o
obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o
obj-$(CONFIG_MMC_GOLDFISH) += android-goldfish.o
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
deleted file mode 100644
index 90c60fd4ff6e..000000000000
--- a/drivers/mmc/host/msm_sdcc.c
+++ /dev/null
@@ -1,1474 +0,0 @@
-/*
- * linux/drivers/mmc/host/msm_sdcc.c - Qualcomm MSM 7X00A SDCC Driver
- *
- * Copyright (C) 2007 Google Inc,
- * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
- * Copyright (C) 2009, Code Aurora Forum. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Based on mmci.c
- *
- * Author: San Mehat (san at android.com)
- *
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/device.h>
-#include <linux/interrupt.h>
-#include <linux/delay.h>
-#include <linux/err.h>
-#include <linux/highmem.h>
-#include <linux/log2.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/card.h>
-#include <linux/mmc/sdio.h>
-#include <linux/clk.h>
-#include <linux/scatterlist.h>
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/debugfs.h>
-#include <linux/io.h>
-#include <linux/memory.h>
-#include <linux/gfp.h>
-#include <linux/gpio.h>
-
-#include <asm/cacheflush.h>
-#include <asm/div64.h>
-#include <asm/sizes.h>
-
-#include <linux/platform_data/mmc-msm_sdcc.h>
-#include <mach/dma.h>
-#include <mach/clk.h>
-
-#include "msm_sdcc.h"
-
-#define DRIVER_NAME "msm-sdcc"
-
-#define BUSCLK_PWRSAVE 1
-#define BUSCLK_TIMEOUT (HZ)
-static unsigned int msmsdcc_fmin = 144000;
-static unsigned int msmsdcc_fmax = 50000000;
-static unsigned int msmsdcc_4bit = 1;
-static unsigned int msmsdcc_pwrsave = 1;
-static unsigned int msmsdcc_piopoll = 1;
-static unsigned int msmsdcc_sdioirq;
-
-#define PIO_SPINMAX 30
-#define CMD_SPINMAX 20
-
-
-static inline void
-msmsdcc_disable_clocks(struct msmsdcc_host *host, int deferr)
-{
- WARN_ON(!host->clks_on);
-
- BUG_ON(host->curr.mrq);
-
- if (deferr) {
- mod_timer(&host->busclk_timer, jiffies + BUSCLK_TIMEOUT);
- } else {
- del_timer_sync(&host->busclk_timer);
- /* Need to check clks_on again in case the busclk
- * timer fired
- */
- if (host->clks_on) {
- clk_disable(host->clk);
- clk_disable(host->pclk);
- host->clks_on = 0;
- }
- }
-}
-
-static inline int
-msmsdcc_enable_clocks(struct msmsdcc_host *host)
-{
- int rc;
-
- del_timer_sync(&host->busclk_timer);
-
- if (!host->clks_on) {
- rc = clk_enable(host->pclk);
- if (rc)
- return rc;
- rc = clk_enable(host->clk);
- if (rc) {
- clk_disable(host->pclk);
- return rc;
- }
- udelay(1 + ((3 * USEC_PER_SEC) /
- (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
- host->clks_on = 1;
- }
- return 0;
-}
-
-static inline unsigned int
-msmsdcc_readl(struct msmsdcc_host *host, unsigned int reg)
-{
- return readl(host->base + reg);
-}
-
-static inline void
-msmsdcc_writel(struct msmsdcc_host *host, u32 data, unsigned int reg)
-{
- writel(data, host->base + reg);
- /* 3 clk delay required! */
- udelay(1 + ((3 * USEC_PER_SEC) /
- (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
-}
-
-static void
-msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd,
- u32 c);
-
-static void msmsdcc_reset_and_restore(struct msmsdcc_host *host)
-{
- u32 mci_clk = 0;
- u32 mci_mask0 = 0;
- int ret = 0;
-
- /* Save the controller state */
- mci_clk = readl(host->base + MMCICLOCK);
- mci_mask0 = readl(host->base + MMCIMASK0);
-
- /* Reset the controller */
- ret = clk_reset(host->clk, CLK_RESET_ASSERT);
- if (ret)
- pr_err("%s: Clock assert failed at %u Hz with err %d\n",
- mmc_hostname(host->mmc), host->clk_rate, ret);
-
- ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
- if (ret)
- pr_err("%s: Clock deassert failed at %u Hz with err %d\n",
- mmc_hostname(host->mmc), host->clk_rate, ret);
-
- pr_info("%s: Controller has been re-initialiazed\n",
- mmc_hostname(host->mmc));
-
- /* Restore the contoller state */
- writel(host->pwr, host->base + MMCIPOWER);
- writel(mci_clk, host->base + MMCICLOCK);
- writel(mci_mask0, host->base + MMCIMASK0);
- ret = clk_set_rate(host->clk, host->clk_rate);
- if (ret)
- pr_err("%s: Failed to set clk rate %u Hz (%d)\n",
- mmc_hostname(host->mmc), host->clk_rate, ret);
-}
-
-static void
-msmsdcc_request_end(struct msmsdcc_host *host, struct mmc_request *mrq)
-{
- BUG_ON(host->curr.data);
-
- host->curr.mrq = NULL;
- host->curr.cmd = NULL;
-
- if (mrq->data)
- mrq->data->bytes_xfered = host->curr.data_xfered;
- if (mrq->cmd->error == -ETIMEDOUT)
- mdelay(5);
-
-#if BUSCLK_PWRSAVE
- msmsdcc_disable_clocks(host, 1);
-#endif
- /*
- * Need to drop the host lock here; mmc_request_done may call
- * back into the driver...
- */
- spin_unlock(&host->lock);
- mmc_request_done(host->mmc, mrq);
- spin_lock(&host->lock);
-}
-
-static void
-msmsdcc_stop_data(struct msmsdcc_host *host)
-{
- host->curr.data = NULL;
- host->curr.got_dataend = 0;
-}
-
-uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host)
-{
- return host->memres->start + MMCIFIFO;
-}
-
-static inline void
-msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c) {
- msmsdcc_writel(host, arg, MMCIARGUMENT);
- msmsdcc_writel(host, c, MMCICOMMAND);
-}
-
-static void
-msmsdcc_dma_exec_func(struct msm_dmov_cmd *cmd)
-{
- struct msmsdcc_host *host = (struct msmsdcc_host *)cmd->data;
-
- msmsdcc_writel(host, host->cmd_timeout, MMCIDATATIMER);
- msmsdcc_writel(host, (unsigned int)host->curr.xfer_size,
- MMCIDATALENGTH);
- msmsdcc_writel(host, (msmsdcc_readl(host, MMCIMASK0) &
- (~MCI_IRQ_PIO)) | host->cmd_pio_irqmask, MMCIMASK0);
- msmsdcc_writel(host, host->cmd_datactrl, MMCIDATACTRL);
-
- if (host->cmd_cmd) {
- msmsdcc_start_command_exec(host,
- (u32) host->cmd_cmd->arg,
- (u32) host->cmd_c);
- }
- host->dma.active = 1;
-}
-
-static void
-msmsdcc_dma_complete_tlet(unsigned long data)
-{
- struct msmsdcc_host *host = (struct msmsdcc_host *)data;
- unsigned long flags;
- struct mmc_request *mrq;
- struct msm_dmov_errdata err;
-
- spin_lock_irqsave(&host->lock, flags);
- host->dma.active = 0;
-
- err = host->dma.err;
- mrq = host->curr.mrq;
- BUG_ON(!mrq);
- WARN_ON(!mrq->data);
-
- if (!(host->dma.result & DMOV_RSLT_VALID)) {
- pr_err("msmsdcc: Invalid DataMover result\n");
- goto out;
- }
-
- if (host->dma.result & DMOV_RSLT_DONE) {
- host->curr.data_xfered = host->curr.xfer_size;
- } else {
- /* Error or flush */
- if (host->dma.result & DMOV_RSLT_ERROR)
- pr_err("%s: DMA error (0x%.8x)\n",
- mmc_hostname(host->mmc), host->dma.result);
- if (host->dma.result & DMOV_RSLT_FLUSH)
- pr_err("%s: DMA channel flushed (0x%.8x)\n",
- mmc_hostname(host->mmc), host->dma.result);
-
- pr_err("Flush data: %.8x %.8x %.8x %.8x %.8x %.8x\n",
- err.flush[0], err.flush[1], err.flush[2],
- err.flush[3], err.flush[4], err.flush[5]);
-
- msmsdcc_reset_and_restore(host);
- if (!mrq->data->error)
- mrq->data->error = -EIO;
- }
- dma_unmap_sg(mmc_dev(host->mmc), host->dma.sg, host->dma.num_ents,
- host->dma.dir);
-
- host->dma.sg = NULL;
- host->dma.busy = 0;
-
- if (host->curr.got_dataend || mrq->data->error) {
-
- /*
- * If we've already gotten our DATAEND / DATABLKEND
- * for this request, then complete it through here.
- */
- msmsdcc_stop_data(host);
-
- if (!mrq->data->error)
- host->curr.data_xfered = host->curr.xfer_size;
- if (!mrq->data->stop || mrq->cmd->error) {
- host->curr.mrq = NULL;
- host->curr.cmd = NULL;
- mrq->data->bytes_xfered = host->curr.data_xfered;
-
- spin_unlock_irqrestore(&host->lock, flags);
-#if BUSCLK_PWRSAVE
- msmsdcc_disable_clocks(host, 1);
-#endif
- mmc_request_done(host->mmc, mrq);
- return;
- } else
- msmsdcc_start_command(host, mrq->data->stop, 0);
- }
-
-out:
- spin_unlock_irqrestore(&host->lock, flags);
- return;
-}
-
-static void
-msmsdcc_dma_complete_func(struct msm_dmov_cmd *cmd,
- unsigned int result,
- struct msm_dmov_errdata *err)
-{
- struct msmsdcc_dma_data *dma_data =
- container_of(cmd, struct msmsdcc_dma_data, hdr);
- struct msmsdcc_host *host = dma_data->host;
-
- dma_data->result = result;
- if (err)
- memcpy(&dma_data->err, err, sizeof(struct msm_dmov_errdata));
-
- tasklet_schedule(&host->dma_tlet);
-}
-
-static int validate_dma(struct msmsdcc_host *host, struct mmc_data *data)
-{
- if (host->dma.channel == -1)
- return -ENOENT;
-
- if ((data->blksz * data->blocks) < MCI_FIFOSIZE)
- return -EINVAL;
- if ((data->blksz * data->blocks) % MCI_FIFOSIZE)
- return -EINVAL;
- return 0;
-}
-
-static int msmsdcc_config_dma(struct msmsdcc_host *host, struct mmc_data *data)
-{
- struct msmsdcc_nc_dmadata *nc;
- dmov_box *box;
- uint32_t rows;
- uint32_t crci;
- unsigned int n;
- int i, rc;
- struct scatterlist *sg = data->sg;
-
- rc = validate_dma(host, data);
- if (rc)
- return rc;
-
- host->dma.sg = data->sg;
- host->dma.num_ents = data->sg_len;
-
- BUG_ON(host->dma.num_ents > NR_SG); /* Prevent memory corruption */
-
- nc = host->dma.nc;
-
- switch (host->pdev_id) {
- case 1:
- crci = MSMSDCC_CRCI_SDC1;
- break;
- case 2:
- crci = MSMSDCC_CRCI_SDC2;
- break;
- case 3:
- crci = MSMSDCC_CRCI_SDC3;
- break;
- case 4:
- crci = MSMSDCC_CRCI_SDC4;
- break;
- default:
- host->dma.sg = NULL;
- host->dma.num_ents = 0;
- return -ENOENT;
- }
-
- if (data->flags & MMC_DATA_READ)
- host->dma.dir = DMA_FROM_DEVICE;
- else
- host->dma.dir = DMA_TO_DEVICE;
-
- host->curr.user_pages = 0;
-
- box = &nc->cmd[0];
-
- /* location of command block must be 64 bit aligned */
- BUG_ON(host->dma.cmd_busaddr & 0x07);
-
- nc->cmdptr = (host->dma.cmd_busaddr >> 3) | CMD_PTR_LP;
- host->dma.hdr.cmdptr = DMOV_CMD_PTR_LIST |
- DMOV_CMD_ADDR(host->dma.cmdptr_busaddr);
- host->dma.hdr.complete_func = msmsdcc_dma_complete_func;
-
- n = dma_map_sg(mmc_dev(host->mmc), host->dma.sg,
- host->dma.num_ents, host->dma.dir);
- if (n == 0) {
- pr_err("%s: Unable to map in all sg elements\n",
- mmc_hostname(host->mmc));
- host->dma.sg = NULL;
- host->dma.num_ents = 0;
- return -ENOMEM;
- }
-
- for_each_sg(host->dma.sg, sg, n, i) {
-
- box->cmd = CMD_MODE_BOX;
-
- if (i == n - 1)
- box->cmd |= CMD_LC;
- rows = (sg_dma_len(sg) % MCI_FIFOSIZE) ?
- (sg_dma_len(sg) / MCI_FIFOSIZE) + 1 :
- (sg_dma_len(sg) / MCI_FIFOSIZE) ;
-
- if (data->flags & MMC_DATA_READ) {
- box->src_row_addr = msmsdcc_fifo_addr(host);
- box->dst_row_addr = sg_dma_address(sg);
-
- box->src_dst_len = (MCI_FIFOSIZE << 16) |
- (MCI_FIFOSIZE);
- box->row_offset = MCI_FIFOSIZE;
-
- box->num_rows = rows * ((1 << 16) + 1);
- box->cmd |= CMD_SRC_CRCI(crci);
- } else {
- box->src_row_addr = sg_dma_address(sg);
- box->dst_row_addr = msmsdcc_fifo_addr(host);
-
- box->src_dst_len = (MCI_FIFOSIZE << 16) |
- (MCI_FIFOSIZE);
- box->row_offset = (MCI_FIFOSIZE << 16);
-
- box->num_rows = rows * ((1 << 16) + 1);
- box->cmd |= CMD_DST_CRCI(crci);
- }
- box++;
- }
-
- return 0;
-}
-
-static int
-snoop_cccr_abort(struct mmc_command *cmd)
-{
- if ((cmd->opcode == 52) &&
- (cmd->arg & 0x80000000) &&
- (((cmd->arg >> 9) & 0x1ffff) == SDIO_CCCR_ABORT))
- return 1;
- return 0;
-}
-
-static void
-msmsdcc_start_command_deferred(struct msmsdcc_host *host,
- struct mmc_command *cmd, u32 *c)
-{
- *c |= (cmd->opcode | MCI_CPSM_ENABLE);
-
- if (cmd->flags & MMC_RSP_PRESENT) {
- if (cmd->flags & MMC_RSP_136)
- *c |= MCI_CPSM_LONGRSP;
- *c |= MCI_CPSM_RESPONSE;
- }
-
- if (/*interrupt*/0)
- *c |= MCI_CPSM_INTERRUPT;
-
- if ((((cmd->opcode == 17) || (cmd->opcode == 18)) ||
- ((cmd->opcode == 24) || (cmd->opcode == 25))) ||
- (cmd->opcode == 53))
- *c |= MCI_CSPM_DATCMD;
-
- if (host->prog_scan && (cmd->opcode == 12)) {
- *c |= MCI_CPSM_PROGENA;
- host->prog_enable = true;
- }
-
- if (cmd == cmd->mrq->stop)
- *c |= MCI_CSPM_MCIABORT;
-
- if (snoop_cccr_abort(cmd))
- *c |= MCI_CSPM_MCIABORT;
-
- if (host->curr.cmd != NULL) {
- pr_err("%s: Overlapping command requests\n",
- mmc_hostname(host->mmc));
- }
- host->curr.cmd = cmd;
-}
-
-static void
-msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data,
- struct mmc_command *cmd, u32 c)
-{
- unsigned int datactrl, timeout;
- unsigned long long clks;
- unsigned int pio_irqmask = 0;
-
- host->curr.data = data;
- host->curr.xfer_size = data->blksz * data->blocks;
- host->curr.xfer_remain = host->curr.xfer_size;
- host->curr.data_xfered = 0;
- host->curr.got_dataend = 0;
-
- memset(&host->pio, 0, sizeof(host->pio));
-
- datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
-
- if (!msmsdcc_config_dma(host, data))
- datactrl |= MCI_DPSM_DMAENABLE;
- else {
- host->pio.sg = data->sg;
- host->pio.sg_len = data->sg_len;
- host->pio.sg_off = 0;
-
- if (data->flags & MMC_DATA_READ) {
- pio_irqmask = MCI_RXFIFOHALFFULLMASK;
- if (host->curr.xfer_remain < MCI_FIFOSIZE)
- pio_irqmask |= MCI_RXDATAAVLBLMASK;
- } else
- pio_irqmask = MCI_TXFIFOHALFEMPTYMASK;
- }
-
- if (data->flags & MMC_DATA_READ)
- datactrl |= MCI_DPSM_DIRECTION;
-
- clks = (unsigned long long)data->timeout_ns * host->clk_rate;
- do_div(clks, NSEC_PER_SEC);
- timeout = data->timeout_clks + (unsigned int)clks*2 ;
-
- if (datactrl & MCI_DPSM_DMAENABLE) {
- /* Save parameters for the exec function */
- host->cmd_timeout = timeout;
- host->cmd_pio_irqmask = pio_irqmask;
- host->cmd_datactrl = datactrl;
- host->cmd_cmd = cmd;
-
- host->dma.hdr.execute_func = msmsdcc_dma_exec_func;
- host->dma.hdr.data = (void *)host;
- host->dma.busy = 1;
-
- if (cmd) {
- msmsdcc_start_command_deferred(host, cmd, &c);
- host->cmd_c = c;
- }
- msm_dmov_enqueue_cmd(host->dma.channel, &host->dma.hdr);
- if (data->flags & MMC_DATA_WRITE)
- host->prog_scan = true;
- } else {
- msmsdcc_writel(host, timeout, MMCIDATATIMER);
-
- msmsdcc_writel(host, host->curr.xfer_size, MMCIDATALENGTH);
-
- msmsdcc_writel(host, (msmsdcc_readl(host, MMCIMASK0) &
- (~MCI_IRQ_PIO)) | pio_irqmask, MMCIMASK0);
-
- msmsdcc_writel(host, datactrl, MMCIDATACTRL);
-
- if (cmd) {
- /* Daisy-chain the command if requested */
- msmsdcc_start_command(host, cmd, c);
- }
- }
-}
-
-static void
-msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd, u32 c)
-{
- if (cmd == cmd->mrq->stop)
- c |= MCI_CSPM_MCIABORT;
-
- host->stats.cmds++;
-
- msmsdcc_start_command_deferred(host, cmd, &c);
- msmsdcc_start_command_exec(host, cmd->arg, c);
-}
-
-static void
-msmsdcc_data_err(struct msmsdcc_host *host, struct mmc_data *data,
- unsigned int status)
-{
- if (status & MCI_DATACRCFAIL) {
- pr_err("%s: Data CRC error\n", mmc_hostname(host->mmc));
- pr_err("%s: opcode 0x%.8x\n", __func__,
- data->mrq->cmd->opcode);
- pr_err("%s: blksz %d, blocks %d\n", __func__,
- data->blksz, data->blocks);
- data->error = -EILSEQ;
- } else if (status & MCI_DATATIMEOUT) {
- pr_err("%s: Data timeout\n", mmc_hostname(host->mmc));
- data->error = -ETIMEDOUT;
- } else if (status & MCI_RXOVERRUN) {
- pr_err("%s: RX overrun\n", mmc_hostname(host->mmc));
- data->error = -EIO;
- } else if (status & MCI_TXUNDERRUN) {
- pr_err("%s: TX underrun\n", mmc_hostname(host->mmc));
- data->error = -EIO;
- } else {
- pr_err("%s: Unknown error (0x%.8x)\n",
- mmc_hostname(host->mmc), status);
- data->error = -EIO;
- }
-}
-
-
-static int
-msmsdcc_pio_read(struct msmsdcc_host *host, char *buffer, unsigned int remain)
-{
- uint32_t *ptr = (uint32_t *) buffer;
- int count = 0;
-
- if (remain % 4)
- remain = ((remain >> 2) + 1) << 2;
-
- while (msmsdcc_readl(host, MMCISTATUS) & MCI_RXDATAAVLBL) {
- *ptr = msmsdcc_readl(host, MMCIFIFO + (count % MCI_FIFOSIZE));
- ptr++;
- count += sizeof(uint32_t);
-
- remain -= sizeof(uint32_t);
- if (remain == 0)
- break;
- }
- return count;
-}
-
-static int
-msmsdcc_pio_write(struct msmsdcc_host *host, char *buffer,
- unsigned int remain, u32 status)
-{
- void __iomem *base = host->base;
- char *ptr = buffer;
-
- do {
- unsigned int count, maxcnt, sz;
-
- maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE :
- MCI_FIFOHALFSIZE;
- count = min(remain, maxcnt);
-
- sz = count % 4 ? (count >> 2) + 1 : (count >> 2);
- writesl(base + MMCIFIFO, ptr, sz);
- ptr += count;
- remain -= count;
-
- if (remain == 0)
- break;
-
- status = msmsdcc_readl(host, MMCISTATUS);
- } while (status & MCI_TXFIFOHALFEMPTY);
-
- return ptr - buffer;
-}
-
-static int
-msmsdcc_spin_on_status(struct msmsdcc_host *host, uint32_t mask, int maxspin)
-{
- while (maxspin) {
- if ((msmsdcc_readl(host, MMCISTATUS) & mask))
- return 0;
- udelay(1);
- --maxspin;
- }
- return -ETIMEDOUT;
-}
-
-static irqreturn_t
-msmsdcc_pio_irq(int irq, void *dev_id)
-{
- struct msmsdcc_host *host = dev_id;
- uint32_t status;
- u32 mci_mask0;
-
- status = msmsdcc_readl(host, MMCISTATUS);
- mci_mask0 = msmsdcc_readl(host, MMCIMASK0);
-
- if (((mci_mask0 & status) & MCI_IRQ_PIO) == 0)
- return IRQ_NONE;
-
- do {
- unsigned long flags;
- unsigned int remain, len;
- char *buffer;
-
- if (!(status & (MCI_TXFIFOHALFEMPTY | MCI_RXDATAAVLBL))) {
- if (host->curr.xfer_remain == 0 || !msmsdcc_piopoll)
- break;
-
- if (msmsdcc_spin_on_status(host,
- (MCI_TXFIFOHALFEMPTY |
- MCI_RXDATAAVLBL),
- PIO_SPINMAX)) {
- break;
- }
- }
-
- /* Map the current scatter buffer */
- local_irq_save(flags);
- buffer = kmap_atomic(sg_page(host->pio.sg))
- + host->pio.sg->offset;
- buffer += host->pio.sg_off;
- remain = host->pio.sg->length - host->pio.sg_off;
- len = 0;
- if (status & MCI_RXACTIVE)
- len = msmsdcc_pio_read(host, buffer, remain);
- if (status & MCI_TXACTIVE)
- len = msmsdcc_pio_write(host, buffer, remain, status);
-
- /* Unmap the buffer */
- kunmap_atomic(buffer);
- local_irq_restore(flags);
-
- host->pio.sg_off += len;
- host->curr.xfer_remain -= len;
- host->curr.data_xfered += len;
- remain -= len;
-
- if (remain == 0) {
- /* This sg page is full - do some housekeeping */
- if (status & MCI_RXACTIVE && host->curr.user_pages)
- flush_dcache_page(sg_page(host->pio.sg));
-
- if (!--host->pio.sg_len) {
- memset(&host->pio, 0, sizeof(host->pio));
- break;
- }
-
- /* Advance to next sg */
- host->pio.sg++;
- host->pio.sg_off = 0;
- }
-
- status = msmsdcc_readl(host, MMCISTATUS);
- } while (1);
-
- if (status & MCI_RXACTIVE && host->curr.xfer_remain < MCI_FIFOSIZE)
- msmsdcc_writel(host, (mci_mask0 & (~MCI_IRQ_PIO)) |
- MCI_RXDATAAVLBLMASK, MMCIMASK0);
-
- if (!host->curr.xfer_remain)
- msmsdcc_writel(host, (mci_mask0 & (~MCI_IRQ_PIO)) | 0,
- MMCIMASK0);
-
- return IRQ_HANDLED;
-}
-
-static void msmsdcc_do_cmdirq(struct msmsdcc_host *host, uint32_t status)
-{
- struct mmc_command *cmd = host->curr.cmd;
-
- host->curr.cmd = NULL;
- cmd->resp[0] = msmsdcc_readl(host, MMCIRESPONSE0);
- cmd->resp[1] = msmsdcc_readl(host, MMCIRESPONSE1);
- cmd->resp[2] = msmsdcc_readl(host, MMCIRESPONSE2);
- cmd->resp[3] = msmsdcc_readl(host, MMCIRESPONSE3);
-
- if (status & MCI_CMDTIMEOUT) {
- cmd->error = -ETIMEDOUT;
- } else if (status & MCI_CMDCRCFAIL &&
- cmd->flags & MMC_RSP_CRC) {
- pr_err("%s: Command CRC error\n", mmc_hostname(host->mmc));
- cmd->error = -EILSEQ;
- }
-
- if (!cmd->data || cmd->error) {
- if (host->curr.data && host->dma.sg)
- msm_dmov_stop_cmd(host->dma.channel,
- &host->dma.hdr, 0);
- else if (host->curr.data) { /* Non DMA */
- msmsdcc_reset_and_restore(host);
- msmsdcc_stop_data(host);
- msmsdcc_request_end(host, cmd->mrq);
- } else { /* host->data == NULL */
- if (!cmd->error && host->prog_enable) {
- if (status & MCI_PROGDONE) {
- host->prog_scan = false;
- host->prog_enable = false;
- msmsdcc_request_end(host, cmd->mrq);
- } else {
- host->curr.cmd = cmd;
- }
- } else {
- if (host->prog_enable) {
- host->prog_scan = false;
- host->prog_enable = false;
- }
- msmsdcc_request_end(host, cmd->mrq);
- }
- }
- } else if (cmd->data)
- if (!(cmd->data->flags & MMC_DATA_READ))
- msmsdcc_start_data(host, cmd->data,
- NULL, 0);
-}
-
-static void
-msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status,
- void __iomem *base)
-{
- struct mmc_data *data = host->curr.data;
-
- if (status & (MCI_CMDSENT | MCI_CMDRESPEND | MCI_CMDCRCFAIL |
- MCI_CMDTIMEOUT | MCI_PROGDONE) && host->curr.cmd) {
- msmsdcc_do_cmdirq(host, status);
- }
-
- if (!data)
- return;
-
- /* Check for data errors */
- if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT |
- MCI_TXUNDERRUN | MCI_RXOVERRUN)) {
- msmsdcc_data_err(host, data, status);
- host->curr.data_xfered = 0;
- if (host->dma.sg)
- msm_dmov_stop_cmd(host->dma.channel,
- &host->dma.hdr, 0);
- else {
- msmsdcc_reset_and_restore(host);
- if (host->curr.data)
- msmsdcc_stop_data(host);
- if (!data->stop)
- msmsdcc_request_end(host, data->mrq);
- else
- msmsdcc_start_command(host, data->stop, 0);
- }
- }
-
- /* Check for data done */
- if (!host->curr.got_dataend && (status & MCI_DATAEND))
- host->curr.got_dataend = 1;
-
- /*
- * If DMA is still in progress, we complete via the completion handler
- */
- if (host->curr.got_dataend && !host->dma.busy) {
- /*
- * There appears to be an issue in the controller where
- * if you request a small block transfer (< fifo size),
- * you may get your DATAEND/DATABLKEND irq without the
- * PIO data irq.
- *
- * Check to see if there is still data to be read,
- * and simulate a PIO irq.
- */
- if (readl(base + MMCISTATUS) & MCI_RXDATAAVLBL)
- msmsdcc_pio_irq(1, host);
-
- msmsdcc_stop_data(host);
- if (!data->error)
- host->curr.data_xfered = host->curr.xfer_size;
-
- if (!data->stop)
- msmsdcc_request_end(host, data->mrq);
- else
- msmsdcc_start_command(host, data->stop, 0);
- }
-}
-
-static irqreturn_t
-msmsdcc_irq(int irq, void *dev_id)
-{
- struct msmsdcc_host *host = dev_id;
- void __iomem *base = host->base;
- u32 status;
- int ret = 0;
- int cardint = 0;
-
- spin_lock(&host->lock);
-
- do {
- status = msmsdcc_readl(host, MMCISTATUS);
- status &= msmsdcc_readl(host, MMCIMASK0);
- if ((status & (~MCI_IRQ_PIO)) == 0)
- break;
- msmsdcc_writel(host, status, MMCICLEAR);
-
- if (status & MCI_SDIOINTR)
- status &= ~MCI_SDIOINTR;
-
- if (!status)
- break;
-
- msmsdcc_handle_irq_data(host, status, base);
-
- if (status & MCI_SDIOINTOPER) {
- cardint = 1;
- status &= ~MCI_SDIOINTOPER;
- }
- ret = 1;
- } while (status);
-
- spin_unlock(&host->lock);
-
- /*
- * We have to delay handling the card interrupt as it calls
- * back into the driver.
- */
- if (cardint)
- mmc_signal_sdio_irq(host->mmc);
-
- return IRQ_RETVAL(ret);
-}
-
-static void
-msmsdcc_request(struct mmc_host *mmc, struct mmc_request *mrq)
-{
- struct msmsdcc_host *host = mmc_priv(mmc);
- unsigned long flags;
-
- WARN_ON(host->curr.mrq != NULL);
- WARN_ON(host->pwr == 0);
-
- spin_lock_irqsave(&host->lock, flags);
-
- host->stats.reqs++;
-
- if (host->eject) {
- if (mrq->data && !(mrq->data->flags & MMC_DATA_READ)) {
- mrq->cmd->error = 0;
- mrq->data->bytes_xfered = mrq->data->blksz *
- mrq->data->blocks;
- } else
- mrq->cmd->error = -ENOMEDIUM;
-
- spin_unlock_irqrestore(&host->lock, flags);
- mmc_request_done(mmc, mrq);
- return;
- }
-
- msmsdcc_enable_clocks(host);
-
- host->curr.mrq = mrq;
-
- if (mrq->data && mrq->data->flags & MMC_DATA_READ)
- /* Queue/read data, daisy-chain command when data starts */
- msmsdcc_start_data(host, mrq->data, mrq->cmd, 0);
- else
- msmsdcc_start_command(host, mrq->cmd, 0);
-
- if (host->cmdpoll && !msmsdcc_spin_on_status(host,
- MCI_CMDRESPEND|MCI_CMDCRCFAIL|MCI_CMDTIMEOUT,
- CMD_SPINMAX)) {
- uint32_t status = msmsdcc_readl(host, MMCISTATUS);
- msmsdcc_do_cmdirq(host, status);
- msmsdcc_writel(host,
- MCI_CMDRESPEND | MCI_CMDCRCFAIL | MCI_CMDTIMEOUT,
- MMCICLEAR);
- host->stats.cmdpoll_hits++;
- } else {
- host->stats.cmdpoll_misses++;
- }
- spin_unlock_irqrestore(&host->lock, flags);
-}
-
-static void msmsdcc_setup_gpio(struct msmsdcc_host *host, bool enable)
-{
- struct msm_mmc_gpio_data *curr;
- int i, rc = 0;
-
- if (!host->plat->gpio_data || host->gpio_config_status == enable)
- return;
-
- curr = host->plat->gpio_data;
- for (i = 0; i < curr->size; i++) {
- if (enable) {
- rc = gpio_request(curr->gpio[i].no,
- curr->gpio[i].name);
- if (rc) {
- pr_err("%s: gpio_request(%d, %s) failed %d\n",
- mmc_hostname(host->mmc),
- curr->gpio[i].no,
- curr->gpio[i].name, rc);
- goto free_gpios;
- }
- } else {
- gpio_free(curr->gpio[i].no);
- }
- }
- host->gpio_config_status = enable;
- return;
-
-free_gpios:
- for (; i >= 0; i--)
- gpio_free(curr->gpio[i].no);
-}
-
-static void
-msmsdcc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
-{
- struct msmsdcc_host *host = mmc_priv(mmc);
- u32 clk = 0, pwr = 0;
- int rc;
- unsigned long flags;
-
- spin_lock_irqsave(&host->lock, flags);
-
- msmsdcc_enable_clocks(host);
-
- spin_unlock_irqrestore(&host->lock, flags);
-
- if (ios->clock) {
- if (ios->clock != host->clk_rate) {
- rc = clk_set_rate(host->clk, ios->clock);
- if (rc < 0)
- pr_err("%s: Error setting clock rate (%d)\n",
- mmc_hostname(host->mmc), rc);
- else
- host->clk_rate = ios->clock;
- }
- clk |= MCI_CLK_ENABLE;
- }
-
- if (ios->bus_width == MMC_BUS_WIDTH_4)
- clk |= (2 << 10); /* Set WIDEBUS */
-
- if (ios->clock > 400000 && msmsdcc_pwrsave)
- clk |= (1 << 9); /* PWRSAVE */
-
- clk |= (1 << 12); /* FLOW_ENA */
- clk |= (1 << 15); /* feedback clock */
-
- if (host->plat->translate_vdd)
- pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
-
- switch (ios->power_mode) {
- case MMC_POWER_OFF:
- msmsdcc_setup_gpio(host, false);
- break;
- case MMC_POWER_UP:
- pwr |= MCI_PWR_UP;
- msmsdcc_setup_gpio(host, true);
- break;
- case MMC_POWER_ON:
- pwr |= MCI_PWR_ON;
- break;
- }
-
- if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
- pwr |= MCI_OD;
-
- msmsdcc_writel(host, clk, MMCICLOCK);
-
- if (host->pwr != pwr) {
- host->pwr = pwr;
- msmsdcc_writel(host, pwr, MMCIPOWER);
- }
-#if BUSCLK_PWRSAVE
- spin_lock_irqsave(&host->lock, flags);
- msmsdcc_disable_clocks(host, 1);
- spin_unlock_irqrestore(&host->lock, flags);
-#endif
-}
-
-static void msmsdcc_enable_sdio_irq(struct mmc_host *mmc, int enable)
-{
- struct msmsdcc_host *host = mmc_priv(mmc);
- unsigned long flags;
- u32 status;
-
- spin_lock_irqsave(&host->lock, flags);
- if (msmsdcc_sdioirq == 1) {
- status = msmsdcc_readl(host, MMCIMASK0);
- if (enable)
- status |= MCI_SDIOINTOPERMASK;
- else
- status &= ~MCI_SDIOINTOPERMASK;
- host->saved_irq0mask = status;
- msmsdcc_writel(host, status, MMCIMASK0);
- }
- spin_unlock_irqrestore(&host->lock, flags);
-}
-
-static void msmsdcc_init_card(struct mmc_host *mmc, struct mmc_card *card)
-{
- struct msmsdcc_host *host = mmc_priv(mmc);
-
- if (host->plat->init_card)
- host->plat->init_card(card);
-}
-
-static const struct mmc_host_ops msmsdcc_ops = {
- .request = msmsdcc_request,
- .set_ios = msmsdcc_set_ios,
- .enable_sdio_irq = msmsdcc_enable_sdio_irq,
- .init_card = msmsdcc_init_card,
-};
-
-static void
-msmsdcc_check_status(unsigned long data)
-{
- struct msmsdcc_host *host = (struct msmsdcc_host *)data;
- unsigned int status;
-
- if (!host->plat->status) {
- mmc_detect_change(host->mmc, 0);
- goto out;
- }
-
- status = host->plat->status(mmc_dev(host->mmc));
- host->eject = !status;
- if (status ^ host->oldstat) {
- pr_info("%s: Slot status change detected (%d -> %d)\n",
- mmc_hostname(host->mmc), host->oldstat, status);
- if (status)
- mmc_detect_change(host->mmc, (5 * HZ) / 2);
- else
- mmc_detect_change(host->mmc, 0);
- }
-
- host->oldstat = status;
-
-out:
- if (host->timer.function)
- mod_timer(&host->timer, jiffies + HZ);
-}
-
-static irqreturn_t
-msmsdcc_platform_status_irq(int irq, void *dev_id)
-{
- struct msmsdcc_host *host = dev_id;
-
- pr_debug("%s: %d\n", __func__, irq);
- msmsdcc_check_status((unsigned long) host);
- return IRQ_HANDLED;
-}
-
-static void
-msmsdcc_status_notify_cb(int card_present, void *dev_id)
-{
- struct msmsdcc_host *host = dev_id;
-
- pr_debug("%s: card_present %d\n", mmc_hostname(host->mmc),
- card_present);
- msmsdcc_check_status((unsigned long) host);
-}
-
-static void
-msmsdcc_busclk_expired(unsigned long _data)
-{
- struct msmsdcc_host *host = (struct msmsdcc_host *) _data;
-
- if (host->clks_on)
- msmsdcc_disable_clocks(host, 0);
-}
-
-static int
-msmsdcc_init_dma(struct msmsdcc_host *host)
-{
- memset(&host->dma, 0, sizeof(struct msmsdcc_dma_data));
- host->dma.host = host;
- host->dma.channel = -1;
-
- if (!host->dmares)
- return -ENODEV;
-
- host->dma.nc = dma_alloc_coherent(NULL,
- sizeof(struct msmsdcc_nc_dmadata),
- &host->dma.nc_busaddr,
- GFP_KERNEL);
- if (host->dma.nc == NULL) {
- pr_err("Unable to allocate DMA buffer\n");
- return -ENOMEM;
- }
- memset(host->dma.nc, 0x00, sizeof(struct msmsdcc_nc_dmadata));
- host->dma.cmd_busaddr = host->dma.nc_busaddr;
- host->dma.cmdptr_busaddr = host->dma.nc_busaddr +
- offsetof(struct msmsdcc_nc_dmadata, cmdptr);
- host->dma.channel = host->dmares->start;
-
- return 0;
-}
-
-static int
-msmsdcc_probe(struct platform_device *pdev)
-{
- struct msm_mmc_platform_data *plat = pdev->dev.platform_data;
- struct msmsdcc_host *host;
- struct mmc_host *mmc;
- struct resource *cmd_irqres = NULL;
- struct resource *stat_irqres = NULL;
- struct resource *memres = NULL;
- struct resource *dmares = NULL;
- int ret;
-
- /* must have platform data */
- if (!plat) {
- pr_err("%s: Platform data not available\n", __func__);
- ret = -EINVAL;
- goto out;
- }
-
- if (pdev->id < 1 || pdev->id > 4)
- return -EINVAL;
-
- if (pdev->resource == NULL || pdev->num_resources < 2) {
- pr_err("%s: Invalid resource\n", __func__);
- return -ENXIO;
- }
-
- memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
- cmd_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
- "cmd_irq");
- stat_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
- "status_irq");
-
- if (!cmd_irqres || !memres) {
- pr_err("%s: Invalid resource\n", __func__);
- return -ENXIO;
- }
-
- /*
- * Setup our host structure
- */
-
- mmc = mmc_alloc_host(sizeof(struct msmsdcc_host), &pdev->dev);
- if (!mmc) {
- ret = -ENOMEM;
- goto out;
- }
-
- host = mmc_priv(mmc);
- host->pdev_id = pdev->id;
- host->plat = plat;
- host->mmc = mmc;
- host->curr.cmd = NULL;
- init_timer(&host->busclk_timer);
- host->busclk_timer.data = (unsigned long) host;
- host->busclk_timer.function = msmsdcc_busclk_expired;
-
-
- host->cmdpoll = 1;
-
- host->base = ioremap(memres->start, PAGE_SIZE);
- if (!host->base) {
- ret = -ENOMEM;
- goto host_free;
- }
-
- host->cmd_irqres = cmd_irqres;
- host->memres = memres;
- host->dmares = dmares;
- spin_lock_init(&host->lock);
-
- tasklet_init(&host->dma_tlet, msmsdcc_dma_complete_tlet,
- (unsigned long)host);
-
- /*
- * Setup DMA
- */
- if (host->dmares) {
- ret = msmsdcc_init_dma(host);
- if (ret)
- goto ioremap_free;
- } else {
- host->dma.channel = -1;
- }
-
- /* Get our clocks */
- host->pclk = clk_get(&pdev->dev, "sdc_pclk");
- if (IS_ERR(host->pclk)) {
- ret = PTR_ERR(host->pclk);
- goto dma_free;
- }
-
- host->clk = clk_get(&pdev->dev, "sdc_clk");
- if (IS_ERR(host->clk)) {
- ret = PTR_ERR(host->clk);
- goto pclk_put;
- }
-
- ret = clk_set_rate(host->clk, msmsdcc_fmin);
- if (ret) {
- pr_err("%s: Clock rate set failed (%d)\n", __func__, ret);
- goto clk_put;
- }
-
- ret = clk_prepare(host->pclk);
- if (ret)
- goto clk_put;
-
- ret = clk_prepare(host->clk);
- if (ret)
- goto clk_unprepare_p;
-
- /* Enable clocks */
- ret = msmsdcc_enable_clocks(host);
- if (ret)
- goto clk_unprepare;
-
- host->pclk_rate = clk_get_rate(host->pclk);
- host->clk_rate = clk_get_rate(host->clk);
-
- /*
- * Setup MMC host structure
- */
- mmc->ops = &msmsdcc_ops;
- mmc->f_min = msmsdcc_fmin;
- mmc->f_max = msmsdcc_fmax;
- mmc->ocr_avail = plat->ocr_mask;
-
- if (msmsdcc_4bit)
- mmc->caps |= MMC_CAP_4_BIT_DATA;
- if (msmsdcc_sdioirq)
- mmc->caps |= MMC_CAP_SDIO_IRQ;
- mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
-
- mmc->max_segs = NR_SG;
- mmc->max_blk_size = 4096; /* MCI_DATA_CTL BLOCKSIZE up to 4096 */
- mmc->max_blk_count = 65536;
-
- mmc->max_req_size = 33554432; /* MCI_DATA_LENGTH is 25 bits */
- mmc->max_seg_size = mmc->max_req_size;
-
- msmsdcc_writel(host, 0, MMCIMASK0);
- msmsdcc_writel(host, 0x5e007ff, MMCICLEAR);
-
- msmsdcc_writel(host, MCI_IRQENABLE, MMCIMASK0);
- host->saved_irq0mask = MCI_IRQENABLE;
-
- /*
- * Setup card detect change
- */
-
- memset(&host->timer, 0, sizeof(host->timer));
-
- if (stat_irqres && !(stat_irqres->flags & IORESOURCE_DISABLED)) {
- unsigned long irqflags = IRQF_SHARED |
- (stat_irqres->flags & IRQF_TRIGGER_MASK);
-
- host->stat_irq = stat_irqres->start;
- ret = request_irq(host->stat_irq,
- msmsdcc_platform_status_irq,
- irqflags,
- DRIVER_NAME " (slot)",
- host);
- if (ret) {
- pr_err("%s: Unable to get slot IRQ %d (%d)\n",
- mmc_hostname(mmc), host->stat_irq, ret);
- goto clk_disable;
- }
- } else if (plat->register_status_notify) {
- plat->register_status_notify(msmsdcc_status_notify_cb, host);
- } else if (!plat->status)
- pr_err("%s: No card detect facilities available\n",
- mmc_hostname(mmc));
- else {
- init_timer(&host->timer);
- host->timer.data = (unsigned long)host;
- host->timer.function = msmsdcc_check_status;
- host->timer.expires = jiffies + HZ;
- add_timer(&host->timer);
- }
-
- if (plat->status) {
- host->oldstat = host->plat->status(mmc_dev(host->mmc));
- host->eject = !host->oldstat;
- }
-
- ret = request_irq(cmd_irqres->start, msmsdcc_irq, IRQF_SHARED,
- DRIVER_NAME " (cmd)", host);
- if (ret)
- goto stat_irq_free;
-
- ret = request_irq(cmd_irqres->start, msmsdcc_pio_irq, IRQF_SHARED,
- DRIVER_NAME " (pio)", host);
- if (ret)
- goto cmd_irq_free;
-
- platform_set_drvdata(pdev, mmc);
- mmc_add_host(mmc);
-
- pr_info("%s: Qualcomm MSM SDCC at 0x%016llx irq %d,%d dma %d\n",
- mmc_hostname(mmc), (unsigned long long)memres->start,
- (unsigned int) cmd_irqres->start,
- (unsigned int) host->stat_irq, host->dma.channel);
- pr_info("%s: 4 bit data mode %s\n", mmc_hostname(mmc),
- (mmc->caps & MMC_CAP_4_BIT_DATA ? "enabled" : "disabled"));
- pr_info("%s: MMC clock %u -> %u Hz, PCLK %u Hz\n",
- mmc_hostname(mmc), msmsdcc_fmin, msmsdcc_fmax, host->pclk_rate);
- pr_info("%s: Slot eject status = %d\n", mmc_hostname(mmc), host->eject);
- pr_info("%s: Power save feature enable = %d\n",
- mmc_hostname(mmc), msmsdcc_pwrsave);
-
- if (host->dma.channel != -1) {
- pr_info("%s: DM non-cached buffer at %p, dma_addr 0x%.8x\n",
- mmc_hostname(mmc), host->dma.nc, host->dma.nc_busaddr);
- pr_info("%s: DM cmd busaddr 0x%.8x, cmdptr busaddr 0x%.8x\n",
- mmc_hostname(mmc), host->dma.cmd_busaddr,
- host->dma.cmdptr_busaddr);
- } else
- pr_info("%s: PIO transfer enabled\n", mmc_hostname(mmc));
- if (host->timer.function)
- pr_info("%s: Polling status mode enabled\n", mmc_hostname(mmc));
-
- return 0;
- cmd_irq_free:
- free_irq(cmd_irqres->start, host);
- stat_irq_free:
- if (host->stat_irq)
- free_irq(host->stat_irq, host);
- clk_disable:
- msmsdcc_disable_clocks(host, 0);
- clk_unprepare:
- clk_unprepare(host->clk);
- clk_unprepare_p:
- clk_unprepare(host->pclk);
- clk_put:
- clk_put(host->clk);
- pclk_put:
- clk_put(host->pclk);
-dma_free:
- if (host->dmares)
- dma_free_coherent(NULL, sizeof(struct msmsdcc_nc_dmadata),
- host->dma.nc, host->dma.nc_busaddr);
-ioremap_free:
- tasklet_kill(&host->dma_tlet);
- iounmap(host->base);
- host_free:
- mmc_free_host(mmc);
- out:
- return ret;
-}
-
-#ifdef CONFIG_PM
-static int
-msmsdcc_suspend(struct platform_device *dev, pm_message_t state)
-{
- struct mmc_host *mmc = platform_get_drvdata(dev);
-
- if (mmc) {
- struct msmsdcc_host *host = mmc_priv(mmc);
-
- if (host->stat_irq)
- disable_irq(host->stat_irq);
-
- msmsdcc_writel(host, 0, MMCIMASK0);
- if (host->clks_on)
- msmsdcc_disable_clocks(host, 0);
- }
- return 0;
-}
-
-static int
-msmsdcc_resume(struct platform_device *dev)
-{
- struct mmc_host *mmc = platform_get_drvdata(dev);
-
- if (mmc) {
- struct msmsdcc_host *host = mmc_priv(mmc);
-
- msmsdcc_enable_clocks(host);
-
- msmsdcc_writel(host, host->saved_irq0mask, MMCIMASK0);
-
- if (host->stat_irq)
- enable_irq(host->stat_irq);
-#if BUSCLK_PWRSAVE
- msmsdcc_disable_clocks(host, 1);
-#endif
- }
- return 0;
-}
-#else
-#define msmsdcc_suspend 0
-#define msmsdcc_resume 0
-#endif
-
-static struct platform_driver msmsdcc_driver = {
- .probe = msmsdcc_probe,
- .suspend = msmsdcc_suspend,
- .resume = msmsdcc_resume,
- .driver = {
- .name = "msm_sdcc",
- },
-};
-
-module_platform_driver(msmsdcc_driver);
-
-MODULE_DESCRIPTION("Qualcomm MSM 7X00A Multimedia Card Interface driver");
-MODULE_LICENSE("GPL");
diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
deleted file mode 100644
index 402028d16b86..000000000000
--- a/drivers/mmc/host/msm_sdcc.h
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * linux/drivers/mmc/host/msmsdcc.h - QCT MSM7K SDC Controller
- *
- * Copyright (C) 2008 Google, All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * - Based on mmci.h
- */
-
-#ifndef _MSM_SDCC_H
-#define _MSM_SDCC_H
-
-#define MSMSDCC_CRCI_SDC1 6
-#define MSMSDCC_CRCI_SDC2 7
-#define MSMSDCC_CRCI_SDC3 12
-#define MSMSDCC_CRCI_SDC4 13
-
-#define MMCIPOWER 0x000
-#define MCI_PWR_OFF 0x00
-#define MCI_PWR_UP 0x02
-#define MCI_PWR_ON 0x03
-#define MCI_OD (1 << 6)
-
-#define MMCICLOCK 0x004
-#define MCI_CLK_ENABLE (1 << 8)
-#define MCI_CLK_PWRSAVE (1 << 9)
-#define MCI_CLK_WIDEBUS (1 << 10)
-#define MCI_CLK_FLOWENA (1 << 12)
-#define MCI_CLK_INVERTOUT (1 << 13)
-#define MCI_CLK_SELECTIN (1 << 14)
-
-#define MMCIARGUMENT 0x008
-#define MMCICOMMAND 0x00c
-#define MCI_CPSM_RESPONSE (1 << 6)
-#define MCI_CPSM_LONGRSP (1 << 7)
-#define MCI_CPSM_INTERRUPT (1 << 8)
-#define MCI_CPSM_PENDING (1 << 9)
-#define MCI_CPSM_ENABLE (1 << 10)
-#define MCI_CPSM_PROGENA (1 << 11)
-#define MCI_CSPM_DATCMD (1 << 12)
-#define MCI_CSPM_MCIABORT (1 << 13)
-#define MCI_CSPM_CCSENABLE (1 << 14)
-#define MCI_CSPM_CCSDISABLE (1 << 15)
-
-
-#define MMCIRESPCMD 0x010
-#define MMCIRESPONSE0 0x014
-#define MMCIRESPONSE1 0x018
-#define MMCIRESPONSE2 0x01c
-#define MMCIRESPONSE3 0x020
-#define MMCIDATATIMER 0x024
-#define MMCIDATALENGTH 0x028
-
-#define MMCIDATACTRL 0x02c
-#define MCI_DPSM_ENABLE (1 << 0)
-#define MCI_DPSM_DIRECTION (1 << 1)
-#define MCI_DPSM_MODE (1 << 2)
-#define MCI_DPSM_DMAENABLE (1 << 3)
-
-#define MMCIDATACNT 0x030
-#define MMCISTATUS 0x034
-#define MCI_CMDCRCFAIL (1 << 0)
-#define MCI_DATACRCFAIL (1 << 1)
-#define MCI_CMDTIMEOUT (1 << 2)
-#define MCI_DATATIMEOUT (1 << 3)
-#define MCI_TXUNDERRUN (1 << 4)
-#define MCI_RXOVERRUN (1 << 5)
-#define MCI_CMDRESPEND (1 << 6)
-#define MCI_CMDSENT (1 << 7)
-#define MCI_DATAEND (1 << 8)
-#define MCI_DATABLOCKEND (1 << 10)
-#define MCI_CMDACTIVE (1 << 11)
-#define MCI_TXACTIVE (1 << 12)
-#define MCI_RXACTIVE (1 << 13)
-#define MCI_TXFIFOHALFEMPTY (1 << 14)
-#define MCI_RXFIFOHALFFULL (1 << 15)
-#define MCI_TXFIFOFULL (1 << 16)
-#define MCI_RXFIFOFULL (1 << 17)
-#define MCI_TXFIFOEMPTY (1 << 18)
-#define MCI_RXFIFOEMPTY (1 << 19)
-#define MCI_TXDATAAVLBL (1 << 20)
-#define MCI_RXDATAAVLBL (1 << 21)
-#define MCI_SDIOINTR (1 << 22)
-#define MCI_PROGDONE (1 << 23)
-#define MCI_ATACMDCOMPL (1 << 24)
-#define MCI_SDIOINTOPER (1 << 25)
-#define MCI_CCSTIMEOUT (1 << 26)
-
-#define MMCICLEAR 0x038
-#define MCI_CMDCRCFAILCLR (1 << 0)
-#define MCI_DATACRCFAILCLR (1 << 1)
-#define MCI_CMDTIMEOUTCLR (1 << 2)
-#define MCI_DATATIMEOUTCLR (1 << 3)
-#define MCI_TXUNDERRUNCLR (1 << 4)
-#define MCI_RXOVERRUNCLR (1 << 5)
-#define MCI_CMDRESPENDCLR (1 << 6)
-#define MCI_CMDSENTCLR (1 << 7)
-#define MCI_DATAENDCLR (1 << 8)
-#define MCI_DATABLOCKENDCLR (1 << 10)
-
-#define MMCIMASK0 0x03c
-#define MCI_CMDCRCFAILMASK (1 << 0)
-#define MCI_DATACRCFAILMASK (1 << 1)
-#define MCI_CMDTIMEOUTMASK (1 << 2)
-#define MCI_DATATIMEOUTMASK (1 << 3)
-#define MCI_TXUNDERRUNMASK (1 << 4)
-#define MCI_RXOVERRUNMASK (1 << 5)
-#define MCI_CMDRESPENDMASK (1 << 6)
-#define MCI_CMDSENTMASK (1 << 7)
-#define MCI_DATAENDMASK (1 << 8)
-#define MCI_DATABLOCKENDMASK (1 << 10)
-#define MCI_CMDACTIVEMASK (1 << 11)
-#define MCI_TXACTIVEMASK (1 << 12)
-#define MCI_RXACTIVEMASK (1 << 13)
-#define MCI_TXFIFOHALFEMPTYMASK (1 << 14)
-#define MCI_RXFIFOHALFFULLMASK (1 << 15)
-#define MCI_TXFIFOFULLMASK (1 << 16)
-#define MCI_RXFIFOFULLMASK (1 << 17)
-#define MCI_TXFIFOEMPTYMASK (1 << 18)
-#define MCI_RXFIFOEMPTYMASK (1 << 19)
-#define MCI_TXDATAAVLBLMASK (1 << 20)
-#define MCI_RXDATAAVLBLMASK (1 << 21)
-#define MCI_SDIOINTMASK (1 << 22)
-#define MCI_PROGDONEMASK (1 << 23)
-#define MCI_ATACMDCOMPLMASK (1 << 24)
-#define MCI_SDIOINTOPERMASK (1 << 25)
-#define MCI_CCSTIMEOUTMASK (1 << 26)
-
-#define MMCIMASK1 0x040
-#define MMCIFIFOCNT 0x044
-#define MCICCSTIMER 0x058
-
-#define MMCIFIFO 0x080 /* to 0x0bc */
-
-#define MCI_IRQENABLE \
- (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \
- MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \
- MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATAENDMASK|MCI_PROGDONEMASK)
-
-#define MCI_IRQ_PIO \
- (MCI_RXDATAAVLBLMASK | MCI_TXDATAAVLBLMASK | MCI_RXFIFOEMPTYMASK | \
- MCI_TXFIFOEMPTYMASK | MCI_RXFIFOFULLMASK | MCI_TXFIFOFULLMASK | \
- MCI_RXFIFOHALFFULLMASK | MCI_TXFIFOHALFEMPTYMASK | \
- MCI_RXACTIVEMASK | MCI_TXACTIVEMASK)
-/*
- * The size of the FIFO in bytes.
- */
-#define MCI_FIFOSIZE (16*4)
-
-#define MCI_FIFOHALFSIZE (MCI_FIFOSIZE / 2)
-
-#define NR_SG 32
-
-struct clk;
-
-struct msmsdcc_nc_dmadata {
- dmov_box cmd[NR_SG];
- uint32_t cmdptr;
-};
-
-struct msmsdcc_dma_data {
- struct msmsdcc_nc_dmadata *nc;
- dma_addr_t nc_busaddr;
- dma_addr_t cmd_busaddr;
- dma_addr_t cmdptr_busaddr;
-
- struct msm_dmov_cmd hdr;
- enum dma_data_direction dir;
-
- struct scatterlist *sg;
- int num_ents;
-
- int channel;
- struct msmsdcc_host *host;
- int busy; /* Set if DM is busy */
- int active;
- unsigned int result;
- struct msm_dmov_errdata err;
-};
-
-struct msmsdcc_pio_data {
- struct scatterlist *sg;
- unsigned int sg_len;
- unsigned int sg_off;
-};
-
-struct msmsdcc_curr_req {
- struct mmc_request *mrq;
- struct mmc_command *cmd;
- struct mmc_data *data;
- unsigned int xfer_size; /* Total data size */
- unsigned int xfer_remain; /* Bytes remaining to send */
- unsigned int data_xfered; /* Bytes acked by BLKEND irq */
- int got_dataend;
- int user_pages;
-};
-
-struct msmsdcc_stats {
- unsigned int reqs;
- unsigned int cmds;
- unsigned int cmdpoll_hits;
- unsigned int cmdpoll_misses;
-};
-
-struct msmsdcc_host {
- struct resource *cmd_irqres;
- struct resource *memres;
- struct resource *dmares;
- void __iomem *base;
- int pdev_id;
- unsigned int stat_irq;
-
- struct msmsdcc_curr_req curr;
-
- struct mmc_host *mmc;
- struct clk *clk; /* main MMC bus clock */
- struct clk *pclk; /* SDCC peripheral bus clock */
- unsigned int clks_on; /* set if clocks are enabled */
- struct timer_list busclk_timer;
-
- unsigned int eject; /* eject state */
-
- spinlock_t lock;
-
- unsigned int clk_rate; /* Current clock rate */
- unsigned int pclk_rate;
-
- u32 pwr;
- u32 saved_irq0mask; /* MMCIMASK0 reg value */
- struct msm_mmc_platform_data *plat;
-
- struct timer_list timer;
- unsigned int oldstat;
-
- struct msmsdcc_dma_data dma;
- struct msmsdcc_pio_data pio;
- int cmdpoll;
- struct msmsdcc_stats stats;
-
- struct tasklet_struct dma_tlet;
- /* Command parameters */
- unsigned int cmd_timeout;
- unsigned int cmd_pio_irqmask;
- unsigned int cmd_datactrl;
- struct mmc_command *cmd_cmd;
- u32 cmd_c;
- bool gpio_config_status;
-
- bool prog_scan;
- bool prog_enable;
-};
-
-#endif
diff --git a/include/linux/platform_data/mmc-msm_sdcc.h b/include/linux/platform_data/mmc-msm_sdcc.h
deleted file mode 100644
index 55aa873c9396..000000000000
--- a/include/linux/platform_data/mmc-msm_sdcc.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef __MMC_MSM_SDCC_H
-#define __MMC_MSM_SDCC_H
-
-#include <linux/mmc/host.h>
-#include <linux/mmc/card.h>
-#include <linux/mmc/sdio_func.h>
-
-struct msm_mmc_gpio {
- unsigned no;
- const char *name;
-};
-
-struct msm_mmc_gpio_data {
- struct msm_mmc_gpio *gpio;
- u8 size;
-};
-
-struct msm_mmc_platform_data {
- unsigned int ocr_mask; /* available voltages */
- u32 (*translate_vdd)(struct device *, unsigned int);
- unsigned int (*status)(struct device *);
- int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id);
- struct msm_mmc_gpio_data *gpio_data;
- void (*init_card)(struct mmc_card *card);
-};
-
-#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 07/12] clocksource: qcom: Remove dead code
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
` (4 preceding siblings ...)
2015-03-13 18:09 ` [PATCH 06/12] mmc: Remove msm_sdcc driver Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-13 18:14 ` Daniel Lezcano
2015-03-13 18:09 ` [PATCH 08/12] ehci-msm: Remove dead dependency Stephen Boyd
` (6 subsequent siblings)
12 siblings, 1 reply; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This can be acked and go through arm-soc or applied directly to clocksource
tree.
drivers/clocksource/qcom-timer.c | 59 ----------------------------------------
1 file changed, 59 deletions(-)
diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c
index 098c542e5c53..cba2d015564c 100644
--- a/drivers/clocksource/qcom-timer.c
+++ b/drivers/clocksource/qcom-timer.c
@@ -40,8 +40,6 @@
#define GPT_HZ 32768
-#define MSM_DGT_SHIFT 5
-
static void __iomem *event_base;
static void __iomem *sts_base;
@@ -232,7 +230,6 @@ err:
register_current_timer_delay(&msm_delay_timer);
}
-#ifdef CONFIG_ARCH_QCOM
static void __init msm_dt_timer_init(struct device_node *np)
{
u32 freq;
@@ -285,59 +282,3 @@ static void __init msm_dt_timer_init(struct device_node *np)
}
CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
-#else
-
-static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
- u32 sts)
-{
- void __iomem *base;
-
- base = ioremap(addr, SZ_256);
- if (!base) {
- pr_err("Failed to map timer base\n");
- return -ENOMEM;
- }
- event_base = base + event;
- source_base = base + source;
- if (sts)
- sts_base = base + sts;
-
- return 0;
-}
-
-static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
-{
- /*
- * Shift timer count down by a constant due to unreliable lower bits
- * on some targets.
- */
- return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
-}
-
-void __init msm7x01_timer_init(void)
-{
- struct clocksource *cs = &msm_clocksource;
-
- if (msm_timer_map(0xc0100000, 0x0, 0x10, 0x0))
- return;
- cs->read = msm_read_timer_count_shift;
- cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT));
- /* 600 KHz */
- msm_timer_init(19200000 >> MSM_DGT_SHIFT, 32 - MSM_DGT_SHIFT, 7,
- false);
-}
-
-void __init msm7x30_timer_init(void)
-{
- if (msm_timer_map(0xc0100000, 0x4, 0x24, 0x80))
- return;
- msm_timer_init(24576000 / 4, 32, 1, false);
-}
-
-void __init qsd8x50_timer_init(void)
-{
- if (msm_timer_map(0xAC100000, 0x0, 0x10, 0x34))
- return;
- msm_timer_init(19200000 / 4, 32, 7, false);
-}
-#endif
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 08/12] ehci-msm: Remove dead dependency
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
` (5 preceding siblings ...)
2015-03-13 18:09 ` [PATCH 07/12] clocksource: qcom: Remove dead code Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-13 18:09 ` [PATCH 09/12] usb: phy: msm: Remove dead code Stephen Boyd
` (5 subsequent siblings)
12 siblings, 0 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This dependency no longer exists now that mach-msm has been
removed. Delete it.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: linux-usb at vger.kernel.org
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This can be acked and go through arm-soc or applied directly to usb tree.
drivers/usb/host/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 5ad60e46dc2b..197a6a3e613b 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -198,7 +198,7 @@ config USB_EHCI_HCD_AT91
config USB_EHCI_MSM
tristate "Support for Qualcomm QSD/MSM on-chip EHCI USB controller"
- depends on ARCH_MSM || ARCH_QCOM
+ depends on ARCH_QCOM
select USB_EHCI_ROOT_HUB_TT
---help---
Enables support for the USB Host controller present on the
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 09/12] usb: phy: msm: Remove dead code
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
` (6 preceding siblings ...)
2015-03-13 18:09 ` [PATCH 08/12] ehci-msm: Remove dead dependency Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-13 18:09 ` [PATCH 10/12] phy: qcom-ufs: Switch dependency to ARCH_QCOM Stephen Boyd
` (4 subsequent siblings)
12 siblings, 0 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: Felipe Balbi <balbi@ti.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-usb at vger.kernel.org
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This needs an ack to go through arm-soc with patch 1 that removes the platform
code using these ops.
drivers/usb/phy/Kconfig | 2 +-
drivers/usb/phy/phy-msm-usb.c | 18 ++----------------
include/linux/usb/msm_hsusb.h | 4 ----
3 files changed, 3 insertions(+), 21 deletions(-)
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index 52d3d58252e1..2fb3828b5089 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -139,7 +139,7 @@ config USB_ISP1301
config USB_MSM_OTG
tristate "Qualcomm on-chip USB OTG controller support"
- depends on (USB || USB_GADGET) && (ARCH_MSM || ARCH_QCOM || COMPILE_TEST)
+ depends on (USB || USB_GADGET) && (ARCH_QCOM || COMPILE_TEST)
depends on RESET_CONTROLLER
select USB_PHY
help
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 000fd892455f..b50c45c62da7 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
@@ -263,9 +263,7 @@ static int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert)
{
int ret;
- if (motg->pdata->link_clk_reset)
- ret = motg->pdata->link_clk_reset(motg->clk, assert);
- else if (assert)
+ if (assert)
ret = reset_control_assert(motg->link_rst);
else
ret = reset_control_deassert(motg->link_rst);
@@ -281,9 +279,7 @@ static int msm_otg_phy_clk_reset(struct msm_otg *motg)
{
int ret = 0;
- if (motg->pdata->phy_clk_reset)
- ret = motg->pdata->phy_clk_reset(motg->phy_reset_clk);
- else if (motg->phy_rst)
+ if (motg->phy_rst)
ret = reset_control_reset(motg->phy_rst);
if (ret)
@@ -1551,16 +1547,6 @@ static int msm_otg_probe(struct platform_device *pdev)
phy = &motg->phy;
phy->dev = &pdev->dev;
- if (motg->pdata->phy_clk_reset) {
- motg->phy_reset_clk = devm_clk_get(&pdev->dev,
- np ? "phy" : "usb_phy_clk");
-
- if (IS_ERR(motg->phy_reset_clk)) {
- dev_err(&pdev->dev, "failed to get usb_phy_clk\n");
- return PTR_ERR(motg->phy_reset_clk);
- }
- }
-
motg->clk = devm_clk_get(&pdev->dev, np ? "core" : "usb_hs_clk");
if (IS_ERR(motg->clk)) {
dev_err(&pdev->dev, "failed to get usb_hs_clk\n");
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index b0a39243295a..7dbecf9a4656 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -117,8 +117,6 @@ struct msm_otg_platform_data {
enum otg_control_type otg_control;
enum msm_usb_phy_type phy_type;
void (*setup_gpio)(enum usb_otg_state state);
- int (*link_clk_reset)(struct clk *link_clk, bool assert);
- int (*phy_clk_reset)(struct clk *phy_clk);
};
/**
@@ -128,7 +126,6 @@ struct msm_otg_platform_data {
* @irq: IRQ number assigned for HSUSB controller.
* @clk: clock struct of usb_hs_clk.
* @pclk: clock struct of usb_hs_pclk.
- * @phy_reset_clk: clock struct of usb_phy_clk.
* @core_clk: clock struct of usb_hs_core_clk.
* @regs: ioremapped register base address.
* @inputs: OTG state machine inputs(Id, SessValid etc).
@@ -148,7 +145,6 @@ struct msm_otg {
int irq;
struct clk *clk;
struct clk *pclk;
- struct clk *phy_reset_clk;
struct clk *core_clk;
void __iomem *regs;
#define ID 0
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 10/12] phy: qcom-ufs: Switch dependency to ARCH_QCOM
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
` (7 preceding siblings ...)
2015-03-13 18:09 ` [PATCH 09/12] usb: phy: msm: Remove dead code Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
2015-03-13 18:09 ` [PATCH 11/12] ufs-qcom: " Stephen Boyd
` (3 subsequent siblings)
12 siblings, 0 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This phy only exists on platforms under ARCH_QCOM, not ARCH_MSM.
Cc: Yaniv Gardi <ygardi@codeaurora.org>
Cc: Dov Levenglick <dovl@codeaurora.org>
Cc: Christoph Hellwig <hch@lst.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This can be acked and go through arm-soc or applied directly to phy tree.
drivers/phy/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 2962de205ba7..9b1ff313bd51 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -286,7 +286,7 @@ config PHY_STIH41X_USB
config PHY_QCOM_UFS
tristate "Qualcomm UFS PHY driver"
- depends on OF && ARCH_MSM
+ depends on OF && ARCH_QCOM
select GENERIC_PHY
help
Support for UFS PHY on QCOM chipsets.
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 11/12] ufs-qcom: Switch dependency to ARCH_QCOM
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
` (8 preceding siblings ...)
2015-03-13 18:09 ` [PATCH 10/12] phy: qcom-ufs: Switch dependency to ARCH_QCOM Stephen Boyd
@ 2015-03-13 18:09 ` Stephen Boyd
[not found] ` <1426270185-19510-2-git-send-email-sboyd@codeaurora.org>
` (2 subsequent siblings)
12 siblings, 0 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:09 UTC (permalink / raw)
To: linux-arm-kernel
This device only exists on platforms under ARCH_QCOM, not
ARCH_MSM.
Cc: Yaniv Gardi <ygardi@codeaurora.org>
Cc: Dov Levenglick <dovl@codeaurora.org>
Cc: Christoph Hellwig <hch@lst.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
This can be acked and go through arm-soc or applied directly.
drivers/scsi/ufs/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 8a1f4b355416..e94538362536 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -73,7 +73,7 @@ config SCSI_UFSHCD_PLATFORM
config SCSI_UFS_QCOM
bool "QCOM specific hooks to UFS controller platform driver"
- depends on SCSI_UFSHCD_PLATFORM && ARCH_MSM
+ depends on SCSI_UFSHCD_PLATFORM && ARCH_QCOM
select PHY_QCOM_UFS
help
This selects the QCOM specific additions to UFSHCD platform driver.
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 07/12] clocksource: qcom: Remove dead code
2015-03-13 18:09 ` [PATCH 07/12] clocksource: qcom: Remove dead code Stephen Boyd
@ 2015-03-13 18:14 ` Daniel Lezcano
2015-03-13 18:22 ` Stephen Boyd
0 siblings, 1 reply; 28+ messages in thread
From: Daniel Lezcano @ 2015-03-13 18:14 UTC (permalink / raw)
To: linux-arm-kernel
On 03/13/2015 07:09 PM, Stephen Boyd wrote:
> This code is no longer used now that mach-msm has been removed.
> Delete it.
>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
>
> This can be acked and go through arm-soc or applied directly to clocksource
> tree.
>
> drivers/clocksource/qcom-timer.c | 59 ----------------------------------------
> 1 file changed, 59 deletions(-)
Applied to my tree for 4.1.
Thanks
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 07/12] clocksource: qcom: Remove dead code
2015-03-13 18:14 ` Daniel Lezcano
@ 2015-03-13 18:22 ` Stephen Boyd
2015-03-13 21:11 ` Daniel Lezcano
0 siblings, 1 reply; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 18:22 UTC (permalink / raw)
To: linux-arm-kernel
On 03/13/15 11:14, Daniel Lezcano wrote:
> On 03/13/2015 07:09 PM, Stephen Boyd wrote:
>> This code is no longer used now that mach-msm has been removed.
>> Delete it.
>>
>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
>> Cc: David Brown <davidb@codeaurora.org>
>> Cc: Bryan Huntsman <bryanh@codeaurora.org>
>> Cc: Daniel Walker <dwalker@fifo99.com>
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> ---
>>
>> This can be acked and go through arm-soc or applied directly to
>> clocksource
>> tree.
>>
>> drivers/clocksource/qcom-timer.c | 59
>> ----------------------------------------
>> 1 file changed, 59 deletions(-)
>
> Applied to my tree for 4.1.
>
Ah sorry, this one has to go with patch 1 through arm-soc, because it
deletes symbols that patch 1 is using.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 01/12] ARM: Remove mach-msm and associated ARM architecture code
[not found] ` <1426270185-19510-2-git-send-email-sboyd@codeaurora.org>
@ 2015-03-13 19:36 ` Paul Bolle
2015-03-13 20:44 ` Stephen Boyd
0 siblings, 1 reply; 28+ messages in thread
From: Paul Bolle @ 2015-03-13 19:36 UTC (permalink / raw)
To: linux-arm-kernel
I've checked this series with my local Kconfig checker (for no other
reason than that it removes board-sapphire.c and I had promised to do so
too a week ago).
On Fri, 2015-03-13 at 11:09 -0700, Stephen Boyd wrote:
> --- a/arch/arm/mach-msm/Kconfig
> +++ /dev/null
> -config MSM_SMD
> - bool
After this series MSM_SMD is still referenced in drivers/char/Kconfig
(sin the entry for MSM_SMD_PKT) and drivers/tty/serial/Kconfig (in the
entry for SERIAL_MSM_SMD).
So I think those two Kconfing entries, drivers/char/msm_smd_pkt.c,
drivers/tty/serial/msm_smd_tty.c, and the related lines in the two
Makefiles involved, can be removed too. (A quick glance at those tow
entries and those two files suggests there are no second order effects
from removing all that.)
Paul Bolle
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 05/12] net: smc91x: Remove dead code
2015-03-13 18:09 ` [PATCH 05/12] net: smc91x: " Stephen Boyd
@ 2015-03-13 19:52 ` Arnd Bergmann
0 siblings, 0 replies; 28+ messages in thread
From: Arnd Bergmann @ 2015-03-13 19:52 UTC (permalink / raw)
To: linux-arm-kernel
On Friday 13 March 2015 11:09:38 Stephen Boyd wrote:
> This config no longer exists now that mach-msm has been removed.
> Delete it and the associated code.
>
> Cc: David S. Miller <davem@davemloft.net>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
>
> This can be acked and go through arm-soc or applied directly.
>
> drivers/net/ethernet/smsc/smc91x.h | 14 --------------
> 1 file changed, 14 deletions(-)
>
David Miller already merged a patch that removes this and the other
platform specific parts of that file that are no longer needed.
Arnd
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 00/12] Remove mach-msm and associated code
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
` (10 preceding siblings ...)
[not found] ` <1426270185-19510-2-git-send-email-sboyd@codeaurora.org>
@ 2015-03-13 19:55 ` Arnd Bergmann
2015-03-13 19:56 ` Arnd Bergmann
2015-03-13 20:45 ` Stephen Boyd
[not found] ` <1426270185-19510-13-git-send-email-sboyd@codeaurora.org>
12 siblings, 2 replies; 28+ messages in thread
From: Arnd Bergmann @ 2015-03-13 19:55 UTC (permalink / raw)
To: linux-arm-kernel
On Friday 13 March 2015 11:09:33 Stephen Boyd wrote:
> The maintainers for mach-msm no longer have any plans to support
> or test the platforms supported by this architecture[1]. Most likely
> there aren't any active users of this code anyway, so let's
> delete it and the associated drivers/code. We should probably merge
> this as one big series through arm-soc. Although some patches
> should be fine to take through maintainers, some things like
> mmc and usb have header file dependencies for platform_data.
>
> [1] http://lkml.kernel.org/r/20150307031212.GA8434 at fifo99.com
>
As I wrote, I'd have a mild preference for doing the multiplatform
conversion first and then removing the support in the following merge
window, just in case someone wants that code back.
If everyone wants to see that code die rather sooner than later,
that's fine with me as well.
I think the MMC driver should also be removed when the platform
code is deleted, new code would use the mmci driver anyway.
Arnd
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 00/12] Remove mach-msm and associated code
2015-03-13 19:55 ` [PATCH 00/12] Remove mach-msm and associated code Arnd Bergmann
@ 2015-03-13 19:56 ` Arnd Bergmann
2015-03-13 20:45 ` Stephen Boyd
1 sibling, 0 replies; 28+ messages in thread
From: Arnd Bergmann @ 2015-03-13 19:56 UTC (permalink / raw)
To: linux-arm-kernel
On Friday 13 March 2015 20:55:30 Arnd Bergmann wrote:
>
> I think the MMC driver should also be removed when the platform
> code is deleted, new code would use the mmci driver anyway.
Nevermind, I now see patch 6/12, which does just this.
Arnd
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 01/12] ARM: Remove mach-msm and associated ARM architecture code
2015-03-13 19:36 ` [PATCH 01/12] ARM: Remove mach-msm and associated ARM architecture code Paul Bolle
@ 2015-03-13 20:44 ` Stephen Boyd
0 siblings, 0 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 20:44 UTC (permalink / raw)
To: linux-arm-kernel
On 03/13/15 12:36, Paul Bolle wrote:
> I've checked this series with my local Kconfig checker (for no other
> reason than that it removes board-sapphire.c and I had promised to do so
> too a week ago).
>
> On Fri, 2015-03-13 at 11:09 -0700, Stephen Boyd wrote:
>> --- a/arch/arm/mach-msm/Kconfig
>> +++ /dev/null
>> -config MSM_SMD
>> - bool
> After this series MSM_SMD is still referenced in drivers/char/Kconfig
> (sin the entry for MSM_SMD_PKT) and drivers/tty/serial/Kconfig (in the
> entry for SERIAL_MSM_SMD).
>
> So I think those two Kconfing entries, drivers/char/msm_smd_pkt.c,
> drivers/tty/serial/msm_smd_tty.c, and the related lines in the two
> Makefiles involved, can be removed too. (A quick glance at those tow
> entries and those two files suggests there are no second order effects
> from removing all that.)
>
Oh yeah I missed those. We can delete them now and reintroduce them when
they're needed.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 00/12] Remove mach-msm and associated code
2015-03-13 19:55 ` [PATCH 00/12] Remove mach-msm and associated code Arnd Bergmann
2015-03-13 19:56 ` Arnd Bergmann
@ 2015-03-13 20:45 ` Stephen Boyd
2015-03-17 16:18 ` dwalker at fifo99.com
1 sibling, 1 reply; 28+ messages in thread
From: Stephen Boyd @ 2015-03-13 20:45 UTC (permalink / raw)
To: linux-arm-kernel
On 03/13/15 12:55, Arnd Bergmann wrote:
> On Friday 13 March 2015 11:09:33 Stephen Boyd wrote:
>> The maintainers for mach-msm no longer have any plans to support
>> or test the platforms supported by this architecture[1]. Most likely
>> there aren't any active users of this code anyway, so let's
>> delete it and the associated drivers/code. We should probably merge
>> this as one big series through arm-soc. Although some patches
>> should be fine to take through maintainers, some things like
>> mmc and usb have header file dependencies for platform_data.
>>
>> [1] http://lkml.kernel.org/r/20150307031212.GA8434 at fifo99.com
>>
> As I wrote, I'd have a mild preference for doing the multiplatform
> conversion first and then removing the support in the following merge
> window, just in case someone wants that code back.
>
> If everyone wants to see that code die rather sooner than later,
> that's fine with me as well.
I think everyone wants to see the code die now. They can always pull the
multi-platform patches from the list. I'll stash away my 7200 DT
conversion in case someone cares but I really doubt anybody does.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 07/12] clocksource: qcom: Remove dead code
2015-03-13 18:22 ` Stephen Boyd
@ 2015-03-13 21:11 ` Daniel Lezcano
0 siblings, 0 replies; 28+ messages in thread
From: Daniel Lezcano @ 2015-03-13 21:11 UTC (permalink / raw)
To: linux-arm-kernel
On 03/13/2015 07:22 PM, Stephen Boyd wrote:
> On 03/13/15 11:14, Daniel Lezcano wrote:
>> On 03/13/2015 07:09 PM, Stephen Boyd wrote:
>>> This code is no longer used now that mach-msm has been removed.
>>> Delete it.
>>>
>>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
>>> Cc: David Brown <davidb@codeaurora.org>
>>> Cc: Bryan Huntsman <bryanh@codeaurora.org>
>>> Cc: Daniel Walker <dwalker@fifo99.com>
>>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>>> ---
>>>
>>> This can be acked and go through arm-soc or applied directly to
>>> clocksource
>>> tree.
>>>
>>> drivers/clocksource/qcom-timer.c | 59
>>> ----------------------------------------
>>> 1 file changed, 59 deletions(-)
>>
>> Applied to my tree for 4.1.
>>
>
>
> Ah sorry, this one has to go with patch 1 through arm-soc, because it
> deletes symbols that patch 1 is using.
Ok. Removed from my tree.
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 06/12] mmc: Remove msm_sdcc driver
2015-03-13 18:09 ` [PATCH 06/12] mmc: Remove msm_sdcc driver Stephen Boyd
@ 2015-03-16 11:04 ` Ulf Hansson
0 siblings, 0 replies; 28+ messages in thread
From: Ulf Hansson @ 2015-03-16 11:04 UTC (permalink / raw)
To: linux-arm-kernel
On 13 March 2015 at 19:09, Stephen Boyd <sboyd@codeaurora.org> wrote:
> This driver is orphaned now that mach-msm has been removed.
> Delete it.
>
> Cc: Ulf Hansson <ulf.hansson@linaro.org>
> Cc: Chris Ball <chris@printf.net>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
> ---
>
> I'd appreciate an ack here from mmc maintainers so this can go with patch 1
> through arm-soc.
>
> drivers/mmc/host/Kconfig | 8 -
> drivers/mmc/host/Makefile | 1 -
> drivers/mmc/host/msm_sdcc.c | 1474 ----------------------------
> drivers/mmc/host/msm_sdcc.h | 256 -----
> include/linux/platform_data/mmc-msm_sdcc.h | 27 -
> 5 files changed, 1766 deletions(-)
> delete mode 100644 drivers/mmc/host/msm_sdcc.c
> delete mode 100644 drivers/mmc/host/msm_sdcc.h
> delete mode 100644 include/linux/platform_data/mmc-msm_sdcc.h
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 61ac63a3776a..37d1d80fdf04 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -393,14 +393,6 @@ config MMC_SDHCI_MSM
>
> If unsure, say N.
>
> -config MMC_MSM
> - tristate "Qualcomm SDCC Controller Support"
> - depends on MMC && (ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50)
> - help
> - This provides support for the SD/MMC cell found in the
> - MSM and QSD SOCs from Qualcomm. The controller also has
> - support for SDIO devices.
> -
> config MMC_MXC
> tristate "Freescale i.MX21/27/31 or MPC512x Multimedia Card support"
> depends on ARCH_MXC || PPC_MPC512x
> diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
> index 6a7cfe0de332..47f9421d0281 100644
> --- a/drivers/mmc/host/Makefile
> +++ b/drivers/mmc/host/Makefile
> @@ -24,7 +24,6 @@ obj-$(CONFIG_MMC_OMAP) += omap.o
> obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
> obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o
> obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
> -obj-$(CONFIG_MMC_MSM) += msm_sdcc.o
> obj-$(CONFIG_MMC_MVSDIO) += mvsdio.o
> obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o
> obj-$(CONFIG_MMC_GOLDFISH) += android-goldfish.o
> diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
> deleted file mode 100644
> index 90c60fd4ff6e..000000000000
> --- a/drivers/mmc/host/msm_sdcc.c
> +++ /dev/null
> @@ -1,1474 +0,0 @@
> -/*
> - * linux/drivers/mmc/host/msm_sdcc.c - Qualcomm MSM 7X00A SDCC Driver
> - *
> - * Copyright (C) 2007 Google Inc,
> - * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
> - * Copyright (C) 2009, Code Aurora Forum. All Rights Reserved.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - *
> - * Based on mmci.c
> - *
> - * Author: San Mehat (san at android.com)
> - *
> - */
> -
> -#include <linux/module.h>
> -#include <linux/moduleparam.h>
> -#include <linux/init.h>
> -#include <linux/ioport.h>
> -#include <linux/device.h>
> -#include <linux/interrupt.h>
> -#include <linux/delay.h>
> -#include <linux/err.h>
> -#include <linux/highmem.h>
> -#include <linux/log2.h>
> -#include <linux/mmc/host.h>
> -#include <linux/mmc/card.h>
> -#include <linux/mmc/sdio.h>
> -#include <linux/clk.h>
> -#include <linux/scatterlist.h>
> -#include <linux/platform_device.h>
> -#include <linux/dma-mapping.h>
> -#include <linux/debugfs.h>
> -#include <linux/io.h>
> -#include <linux/memory.h>
> -#include <linux/gfp.h>
> -#include <linux/gpio.h>
> -
> -#include <asm/cacheflush.h>
> -#include <asm/div64.h>
> -#include <asm/sizes.h>
> -
> -#include <linux/platform_data/mmc-msm_sdcc.h>
> -#include <mach/dma.h>
> -#include <mach/clk.h>
> -
> -#include "msm_sdcc.h"
> -
> -#define DRIVER_NAME "msm-sdcc"
> -
> -#define BUSCLK_PWRSAVE 1
> -#define BUSCLK_TIMEOUT (HZ)
> -static unsigned int msmsdcc_fmin = 144000;
> -static unsigned int msmsdcc_fmax = 50000000;
> -static unsigned int msmsdcc_4bit = 1;
> -static unsigned int msmsdcc_pwrsave = 1;
> -static unsigned int msmsdcc_piopoll = 1;
> -static unsigned int msmsdcc_sdioirq;
> -
> -#define PIO_SPINMAX 30
> -#define CMD_SPINMAX 20
> -
> -
> -static inline void
> -msmsdcc_disable_clocks(struct msmsdcc_host *host, int deferr)
> -{
> - WARN_ON(!host->clks_on);
> -
> - BUG_ON(host->curr.mrq);
> -
> - if (deferr) {
> - mod_timer(&host->busclk_timer, jiffies + BUSCLK_TIMEOUT);
> - } else {
> - del_timer_sync(&host->busclk_timer);
> - /* Need to check clks_on again in case the busclk
> - * timer fired
> - */
> - if (host->clks_on) {
> - clk_disable(host->clk);
> - clk_disable(host->pclk);
> - host->clks_on = 0;
> - }
> - }
> -}
> -
> -static inline int
> -msmsdcc_enable_clocks(struct msmsdcc_host *host)
> -{
> - int rc;
> -
> - del_timer_sync(&host->busclk_timer);
> -
> - if (!host->clks_on) {
> - rc = clk_enable(host->pclk);
> - if (rc)
> - return rc;
> - rc = clk_enable(host->clk);
> - if (rc) {
> - clk_disable(host->pclk);
> - return rc;
> - }
> - udelay(1 + ((3 * USEC_PER_SEC) /
> - (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
> - host->clks_on = 1;
> - }
> - return 0;
> -}
> -
> -static inline unsigned int
> -msmsdcc_readl(struct msmsdcc_host *host, unsigned int reg)
> -{
> - return readl(host->base + reg);
> -}
> -
> -static inline void
> -msmsdcc_writel(struct msmsdcc_host *host, u32 data, unsigned int reg)
> -{
> - writel(data, host->base + reg);
> - /* 3 clk delay required! */
> - udelay(1 + ((3 * USEC_PER_SEC) /
> - (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
> -}
> -
> -static void
> -msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd,
> - u32 c);
> -
> -static void msmsdcc_reset_and_restore(struct msmsdcc_host *host)
> -{
> - u32 mci_clk = 0;
> - u32 mci_mask0 = 0;
> - int ret = 0;
> -
> - /* Save the controller state */
> - mci_clk = readl(host->base + MMCICLOCK);
> - mci_mask0 = readl(host->base + MMCIMASK0);
> -
> - /* Reset the controller */
> - ret = clk_reset(host->clk, CLK_RESET_ASSERT);
> - if (ret)
> - pr_err("%s: Clock assert failed at %u Hz with err %d\n",
> - mmc_hostname(host->mmc), host->clk_rate, ret);
> -
> - ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
> - if (ret)
> - pr_err("%s: Clock deassert failed at %u Hz with err %d\n",
> - mmc_hostname(host->mmc), host->clk_rate, ret);
> -
> - pr_info("%s: Controller has been re-initialiazed\n",
> - mmc_hostname(host->mmc));
> -
> - /* Restore the contoller state */
> - writel(host->pwr, host->base + MMCIPOWER);
> - writel(mci_clk, host->base + MMCICLOCK);
> - writel(mci_mask0, host->base + MMCIMASK0);
> - ret = clk_set_rate(host->clk, host->clk_rate);
> - if (ret)
> - pr_err("%s: Failed to set clk rate %u Hz (%d)\n",
> - mmc_hostname(host->mmc), host->clk_rate, ret);
> -}
> -
> -static void
> -msmsdcc_request_end(struct msmsdcc_host *host, struct mmc_request *mrq)
> -{
> - BUG_ON(host->curr.data);
> -
> - host->curr.mrq = NULL;
> - host->curr.cmd = NULL;
> -
> - if (mrq->data)
> - mrq->data->bytes_xfered = host->curr.data_xfered;
> - if (mrq->cmd->error == -ETIMEDOUT)
> - mdelay(5);
> -
> -#if BUSCLK_PWRSAVE
> - msmsdcc_disable_clocks(host, 1);
> -#endif
> - /*
> - * Need to drop the host lock here; mmc_request_done may call
> - * back into the driver...
> - */
> - spin_unlock(&host->lock);
> - mmc_request_done(host->mmc, mrq);
> - spin_lock(&host->lock);
> -}
> -
> -static void
> -msmsdcc_stop_data(struct msmsdcc_host *host)
> -{
> - host->curr.data = NULL;
> - host->curr.got_dataend = 0;
> -}
> -
> -uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host)
> -{
> - return host->memres->start + MMCIFIFO;
> -}
> -
> -static inline void
> -msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c) {
> - msmsdcc_writel(host, arg, MMCIARGUMENT);
> - msmsdcc_writel(host, c, MMCICOMMAND);
> -}
> -
> -static void
> -msmsdcc_dma_exec_func(struct msm_dmov_cmd *cmd)
> -{
> - struct msmsdcc_host *host = (struct msmsdcc_host *)cmd->data;
> -
> - msmsdcc_writel(host, host->cmd_timeout, MMCIDATATIMER);
> - msmsdcc_writel(host, (unsigned int)host->curr.xfer_size,
> - MMCIDATALENGTH);
> - msmsdcc_writel(host, (msmsdcc_readl(host, MMCIMASK0) &
> - (~MCI_IRQ_PIO)) | host->cmd_pio_irqmask, MMCIMASK0);
> - msmsdcc_writel(host, host->cmd_datactrl, MMCIDATACTRL);
> -
> - if (host->cmd_cmd) {
> - msmsdcc_start_command_exec(host,
> - (u32) host->cmd_cmd->arg,
> - (u32) host->cmd_c);
> - }
> - host->dma.active = 1;
> -}
> -
> -static void
> -msmsdcc_dma_complete_tlet(unsigned long data)
> -{
> - struct msmsdcc_host *host = (struct msmsdcc_host *)data;
> - unsigned long flags;
> - struct mmc_request *mrq;
> - struct msm_dmov_errdata err;
> -
> - spin_lock_irqsave(&host->lock, flags);
> - host->dma.active = 0;
> -
> - err = host->dma.err;
> - mrq = host->curr.mrq;
> - BUG_ON(!mrq);
> - WARN_ON(!mrq->data);
> -
> - if (!(host->dma.result & DMOV_RSLT_VALID)) {
> - pr_err("msmsdcc: Invalid DataMover result\n");
> - goto out;
> - }
> -
> - if (host->dma.result & DMOV_RSLT_DONE) {
> - host->curr.data_xfered = host->curr.xfer_size;
> - } else {
> - /* Error or flush */
> - if (host->dma.result & DMOV_RSLT_ERROR)
> - pr_err("%s: DMA error (0x%.8x)\n",
> - mmc_hostname(host->mmc), host->dma.result);
> - if (host->dma.result & DMOV_RSLT_FLUSH)
> - pr_err("%s: DMA channel flushed (0x%.8x)\n",
> - mmc_hostname(host->mmc), host->dma.result);
> -
> - pr_err("Flush data: %.8x %.8x %.8x %.8x %.8x %.8x\n",
> - err.flush[0], err.flush[1], err.flush[2],
> - err.flush[3], err.flush[4], err.flush[5]);
> -
> - msmsdcc_reset_and_restore(host);
> - if (!mrq->data->error)
> - mrq->data->error = -EIO;
> - }
> - dma_unmap_sg(mmc_dev(host->mmc), host->dma.sg, host->dma.num_ents,
> - host->dma.dir);
> -
> - host->dma.sg = NULL;
> - host->dma.busy = 0;
> -
> - if (host->curr.got_dataend || mrq->data->error) {
> -
> - /*
> - * If we've already gotten our DATAEND / DATABLKEND
> - * for this request, then complete it through here.
> - */
> - msmsdcc_stop_data(host);
> -
> - if (!mrq->data->error)
> - host->curr.data_xfered = host->curr.xfer_size;
> - if (!mrq->data->stop || mrq->cmd->error) {
> - host->curr.mrq = NULL;
> - host->curr.cmd = NULL;
> - mrq->data->bytes_xfered = host->curr.data_xfered;
> -
> - spin_unlock_irqrestore(&host->lock, flags);
> -#if BUSCLK_PWRSAVE
> - msmsdcc_disable_clocks(host, 1);
> -#endif
> - mmc_request_done(host->mmc, mrq);
> - return;
> - } else
> - msmsdcc_start_command(host, mrq->data->stop, 0);
> - }
> -
> -out:
> - spin_unlock_irqrestore(&host->lock, flags);
> - return;
> -}
> -
> -static void
> -msmsdcc_dma_complete_func(struct msm_dmov_cmd *cmd,
> - unsigned int result,
> - struct msm_dmov_errdata *err)
> -{
> - struct msmsdcc_dma_data *dma_data =
> - container_of(cmd, struct msmsdcc_dma_data, hdr);
> - struct msmsdcc_host *host = dma_data->host;
> -
> - dma_data->result = result;
> - if (err)
> - memcpy(&dma_data->err, err, sizeof(struct msm_dmov_errdata));
> -
> - tasklet_schedule(&host->dma_tlet);
> -}
> -
> -static int validate_dma(struct msmsdcc_host *host, struct mmc_data *data)
> -{
> - if (host->dma.channel == -1)
> - return -ENOENT;
> -
> - if ((data->blksz * data->blocks) < MCI_FIFOSIZE)
> - return -EINVAL;
> - if ((data->blksz * data->blocks) % MCI_FIFOSIZE)
> - return -EINVAL;
> - return 0;
> -}
> -
> -static int msmsdcc_config_dma(struct msmsdcc_host *host, struct mmc_data *data)
> -{
> - struct msmsdcc_nc_dmadata *nc;
> - dmov_box *box;
> - uint32_t rows;
> - uint32_t crci;
> - unsigned int n;
> - int i, rc;
> - struct scatterlist *sg = data->sg;
> -
> - rc = validate_dma(host, data);
> - if (rc)
> - return rc;
> -
> - host->dma.sg = data->sg;
> - host->dma.num_ents = data->sg_len;
> -
> - BUG_ON(host->dma.num_ents > NR_SG); /* Prevent memory corruption */
> -
> - nc = host->dma.nc;
> -
> - switch (host->pdev_id) {
> - case 1:
> - crci = MSMSDCC_CRCI_SDC1;
> - break;
> - case 2:
> - crci = MSMSDCC_CRCI_SDC2;
> - break;
> - case 3:
> - crci = MSMSDCC_CRCI_SDC3;
> - break;
> - case 4:
> - crci = MSMSDCC_CRCI_SDC4;
> - break;
> - default:
> - host->dma.sg = NULL;
> - host->dma.num_ents = 0;
> - return -ENOENT;
> - }
> -
> - if (data->flags & MMC_DATA_READ)
> - host->dma.dir = DMA_FROM_DEVICE;
> - else
> - host->dma.dir = DMA_TO_DEVICE;
> -
> - host->curr.user_pages = 0;
> -
> - box = &nc->cmd[0];
> -
> - /* location of command block must be 64 bit aligned */
> - BUG_ON(host->dma.cmd_busaddr & 0x07);
> -
> - nc->cmdptr = (host->dma.cmd_busaddr >> 3) | CMD_PTR_LP;
> - host->dma.hdr.cmdptr = DMOV_CMD_PTR_LIST |
> - DMOV_CMD_ADDR(host->dma.cmdptr_busaddr);
> - host->dma.hdr.complete_func = msmsdcc_dma_complete_func;
> -
> - n = dma_map_sg(mmc_dev(host->mmc), host->dma.sg,
> - host->dma.num_ents, host->dma.dir);
> - if (n == 0) {
> - pr_err("%s: Unable to map in all sg elements\n",
> - mmc_hostname(host->mmc));
> - host->dma.sg = NULL;
> - host->dma.num_ents = 0;
> - return -ENOMEM;
> - }
> -
> - for_each_sg(host->dma.sg, sg, n, i) {
> -
> - box->cmd = CMD_MODE_BOX;
> -
> - if (i == n - 1)
> - box->cmd |= CMD_LC;
> - rows = (sg_dma_len(sg) % MCI_FIFOSIZE) ?
> - (sg_dma_len(sg) / MCI_FIFOSIZE) + 1 :
> - (sg_dma_len(sg) / MCI_FIFOSIZE) ;
> -
> - if (data->flags & MMC_DATA_READ) {
> - box->src_row_addr = msmsdcc_fifo_addr(host);
> - box->dst_row_addr = sg_dma_address(sg);
> -
> - box->src_dst_len = (MCI_FIFOSIZE << 16) |
> - (MCI_FIFOSIZE);
> - box->row_offset = MCI_FIFOSIZE;
> -
> - box->num_rows = rows * ((1 << 16) + 1);
> - box->cmd |= CMD_SRC_CRCI(crci);
> - } else {
> - box->src_row_addr = sg_dma_address(sg);
> - box->dst_row_addr = msmsdcc_fifo_addr(host);
> -
> - box->src_dst_len = (MCI_FIFOSIZE << 16) |
> - (MCI_FIFOSIZE);
> - box->row_offset = (MCI_FIFOSIZE << 16);
> -
> - box->num_rows = rows * ((1 << 16) + 1);
> - box->cmd |= CMD_DST_CRCI(crci);
> - }
> - box++;
> - }
> -
> - return 0;
> -}
> -
> -static int
> -snoop_cccr_abort(struct mmc_command *cmd)
> -{
> - if ((cmd->opcode == 52) &&
> - (cmd->arg & 0x80000000) &&
> - (((cmd->arg >> 9) & 0x1ffff) == SDIO_CCCR_ABORT))
> - return 1;
> - return 0;
> -}
> -
> -static void
> -msmsdcc_start_command_deferred(struct msmsdcc_host *host,
> - struct mmc_command *cmd, u32 *c)
> -{
> - *c |= (cmd->opcode | MCI_CPSM_ENABLE);
> -
> - if (cmd->flags & MMC_RSP_PRESENT) {
> - if (cmd->flags & MMC_RSP_136)
> - *c |= MCI_CPSM_LONGRSP;
> - *c |= MCI_CPSM_RESPONSE;
> - }
> -
> - if (/*interrupt*/0)
> - *c |= MCI_CPSM_INTERRUPT;
> -
> - if ((((cmd->opcode == 17) || (cmd->opcode == 18)) ||
> - ((cmd->opcode == 24) || (cmd->opcode == 25))) ||
> - (cmd->opcode == 53))
> - *c |= MCI_CSPM_DATCMD;
> -
> - if (host->prog_scan && (cmd->opcode == 12)) {
> - *c |= MCI_CPSM_PROGENA;
> - host->prog_enable = true;
> - }
> -
> - if (cmd == cmd->mrq->stop)
> - *c |= MCI_CSPM_MCIABORT;
> -
> - if (snoop_cccr_abort(cmd))
> - *c |= MCI_CSPM_MCIABORT;
> -
> - if (host->curr.cmd != NULL) {
> - pr_err("%s: Overlapping command requests\n",
> - mmc_hostname(host->mmc));
> - }
> - host->curr.cmd = cmd;
> -}
> -
> -static void
> -msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data,
> - struct mmc_command *cmd, u32 c)
> -{
> - unsigned int datactrl, timeout;
> - unsigned long long clks;
> - unsigned int pio_irqmask = 0;
> -
> - host->curr.data = data;
> - host->curr.xfer_size = data->blksz * data->blocks;
> - host->curr.xfer_remain = host->curr.xfer_size;
> - host->curr.data_xfered = 0;
> - host->curr.got_dataend = 0;
> -
> - memset(&host->pio, 0, sizeof(host->pio));
> -
> - datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
> -
> - if (!msmsdcc_config_dma(host, data))
> - datactrl |= MCI_DPSM_DMAENABLE;
> - else {
> - host->pio.sg = data->sg;
> - host->pio.sg_len = data->sg_len;
> - host->pio.sg_off = 0;
> -
> - if (data->flags & MMC_DATA_READ) {
> - pio_irqmask = MCI_RXFIFOHALFFULLMASK;
> - if (host->curr.xfer_remain < MCI_FIFOSIZE)
> - pio_irqmask |= MCI_RXDATAAVLBLMASK;
> - } else
> - pio_irqmask = MCI_TXFIFOHALFEMPTYMASK;
> - }
> -
> - if (data->flags & MMC_DATA_READ)
> - datactrl |= MCI_DPSM_DIRECTION;
> -
> - clks = (unsigned long long)data->timeout_ns * host->clk_rate;
> - do_div(clks, NSEC_PER_SEC);
> - timeout = data->timeout_clks + (unsigned int)clks*2 ;
> -
> - if (datactrl & MCI_DPSM_DMAENABLE) {
> - /* Save parameters for the exec function */
> - host->cmd_timeout = timeout;
> - host->cmd_pio_irqmask = pio_irqmask;
> - host->cmd_datactrl = datactrl;
> - host->cmd_cmd = cmd;
> -
> - host->dma.hdr.execute_func = msmsdcc_dma_exec_func;
> - host->dma.hdr.data = (void *)host;
> - host->dma.busy = 1;
> -
> - if (cmd) {
> - msmsdcc_start_command_deferred(host, cmd, &c);
> - host->cmd_c = c;
> - }
> - msm_dmov_enqueue_cmd(host->dma.channel, &host->dma.hdr);
> - if (data->flags & MMC_DATA_WRITE)
> - host->prog_scan = true;
> - } else {
> - msmsdcc_writel(host, timeout, MMCIDATATIMER);
> -
> - msmsdcc_writel(host, host->curr.xfer_size, MMCIDATALENGTH);
> -
> - msmsdcc_writel(host, (msmsdcc_readl(host, MMCIMASK0) &
> - (~MCI_IRQ_PIO)) | pio_irqmask, MMCIMASK0);
> -
> - msmsdcc_writel(host, datactrl, MMCIDATACTRL);
> -
> - if (cmd) {
> - /* Daisy-chain the command if requested */
> - msmsdcc_start_command(host, cmd, c);
> - }
> - }
> -}
> -
> -static void
> -msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd, u32 c)
> -{
> - if (cmd == cmd->mrq->stop)
> - c |= MCI_CSPM_MCIABORT;
> -
> - host->stats.cmds++;
> -
> - msmsdcc_start_command_deferred(host, cmd, &c);
> - msmsdcc_start_command_exec(host, cmd->arg, c);
> -}
> -
> -static void
> -msmsdcc_data_err(struct msmsdcc_host *host, struct mmc_data *data,
> - unsigned int status)
> -{
> - if (status & MCI_DATACRCFAIL) {
> - pr_err("%s: Data CRC error\n", mmc_hostname(host->mmc));
> - pr_err("%s: opcode 0x%.8x\n", __func__,
> - data->mrq->cmd->opcode);
> - pr_err("%s: blksz %d, blocks %d\n", __func__,
> - data->blksz, data->blocks);
> - data->error = -EILSEQ;
> - } else if (status & MCI_DATATIMEOUT) {
> - pr_err("%s: Data timeout\n", mmc_hostname(host->mmc));
> - data->error = -ETIMEDOUT;
> - } else if (status & MCI_RXOVERRUN) {
> - pr_err("%s: RX overrun\n", mmc_hostname(host->mmc));
> - data->error = -EIO;
> - } else if (status & MCI_TXUNDERRUN) {
> - pr_err("%s: TX underrun\n", mmc_hostname(host->mmc));
> - data->error = -EIO;
> - } else {
> - pr_err("%s: Unknown error (0x%.8x)\n",
> - mmc_hostname(host->mmc), status);
> - data->error = -EIO;
> - }
> -}
> -
> -
> -static int
> -msmsdcc_pio_read(struct msmsdcc_host *host, char *buffer, unsigned int remain)
> -{
> - uint32_t *ptr = (uint32_t *) buffer;
> - int count = 0;
> -
> - if (remain % 4)
> - remain = ((remain >> 2) + 1) << 2;
> -
> - while (msmsdcc_readl(host, MMCISTATUS) & MCI_RXDATAAVLBL) {
> - *ptr = msmsdcc_readl(host, MMCIFIFO + (count % MCI_FIFOSIZE));
> - ptr++;
> - count += sizeof(uint32_t);
> -
> - remain -= sizeof(uint32_t);
> - if (remain == 0)
> - break;
> - }
> - return count;
> -}
> -
> -static int
> -msmsdcc_pio_write(struct msmsdcc_host *host, char *buffer,
> - unsigned int remain, u32 status)
> -{
> - void __iomem *base = host->base;
> - char *ptr = buffer;
> -
> - do {
> - unsigned int count, maxcnt, sz;
> -
> - maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE :
> - MCI_FIFOHALFSIZE;
> - count = min(remain, maxcnt);
> -
> - sz = count % 4 ? (count >> 2) + 1 : (count >> 2);
> - writesl(base + MMCIFIFO, ptr, sz);
> - ptr += count;
> - remain -= count;
> -
> - if (remain == 0)
> - break;
> -
> - status = msmsdcc_readl(host, MMCISTATUS);
> - } while (status & MCI_TXFIFOHALFEMPTY);
> -
> - return ptr - buffer;
> -}
> -
> -static int
> -msmsdcc_spin_on_status(struct msmsdcc_host *host, uint32_t mask, int maxspin)
> -{
> - while (maxspin) {
> - if ((msmsdcc_readl(host, MMCISTATUS) & mask))
> - return 0;
> - udelay(1);
> - --maxspin;
> - }
> - return -ETIMEDOUT;
> -}
> -
> -static irqreturn_t
> -msmsdcc_pio_irq(int irq, void *dev_id)
> -{
> - struct msmsdcc_host *host = dev_id;
> - uint32_t status;
> - u32 mci_mask0;
> -
> - status = msmsdcc_readl(host, MMCISTATUS);
> - mci_mask0 = msmsdcc_readl(host, MMCIMASK0);
> -
> - if (((mci_mask0 & status) & MCI_IRQ_PIO) == 0)
> - return IRQ_NONE;
> -
> - do {
> - unsigned long flags;
> - unsigned int remain, len;
> - char *buffer;
> -
> - if (!(status & (MCI_TXFIFOHALFEMPTY | MCI_RXDATAAVLBL))) {
> - if (host->curr.xfer_remain == 0 || !msmsdcc_piopoll)
> - break;
> -
> - if (msmsdcc_spin_on_status(host,
> - (MCI_TXFIFOHALFEMPTY |
> - MCI_RXDATAAVLBL),
> - PIO_SPINMAX)) {
> - break;
> - }
> - }
> -
> - /* Map the current scatter buffer */
> - local_irq_save(flags);
> - buffer = kmap_atomic(sg_page(host->pio.sg))
> - + host->pio.sg->offset;
> - buffer += host->pio.sg_off;
> - remain = host->pio.sg->length - host->pio.sg_off;
> - len = 0;
> - if (status & MCI_RXACTIVE)
> - len = msmsdcc_pio_read(host, buffer, remain);
> - if (status & MCI_TXACTIVE)
> - len = msmsdcc_pio_write(host, buffer, remain, status);
> -
> - /* Unmap the buffer */
> - kunmap_atomic(buffer);
> - local_irq_restore(flags);
> -
> - host->pio.sg_off += len;
> - host->curr.xfer_remain -= len;
> - host->curr.data_xfered += len;
> - remain -= len;
> -
> - if (remain == 0) {
> - /* This sg page is full - do some housekeeping */
> - if (status & MCI_RXACTIVE && host->curr.user_pages)
> - flush_dcache_page(sg_page(host->pio.sg));
> -
> - if (!--host->pio.sg_len) {
> - memset(&host->pio, 0, sizeof(host->pio));
> - break;
> - }
> -
> - /* Advance to next sg */
> - host->pio.sg++;
> - host->pio.sg_off = 0;
> - }
> -
> - status = msmsdcc_readl(host, MMCISTATUS);
> - } while (1);
> -
> - if (status & MCI_RXACTIVE && host->curr.xfer_remain < MCI_FIFOSIZE)
> - msmsdcc_writel(host, (mci_mask0 & (~MCI_IRQ_PIO)) |
> - MCI_RXDATAAVLBLMASK, MMCIMASK0);
> -
> - if (!host->curr.xfer_remain)
> - msmsdcc_writel(host, (mci_mask0 & (~MCI_IRQ_PIO)) | 0,
> - MMCIMASK0);
> -
> - return IRQ_HANDLED;
> -}
> -
> -static void msmsdcc_do_cmdirq(struct msmsdcc_host *host, uint32_t status)
> -{
> - struct mmc_command *cmd = host->curr.cmd;
> -
> - host->curr.cmd = NULL;
> - cmd->resp[0] = msmsdcc_readl(host, MMCIRESPONSE0);
> - cmd->resp[1] = msmsdcc_readl(host, MMCIRESPONSE1);
> - cmd->resp[2] = msmsdcc_readl(host, MMCIRESPONSE2);
> - cmd->resp[3] = msmsdcc_readl(host, MMCIRESPONSE3);
> -
> - if (status & MCI_CMDTIMEOUT) {
> - cmd->error = -ETIMEDOUT;
> - } else if (status & MCI_CMDCRCFAIL &&
> - cmd->flags & MMC_RSP_CRC) {
> - pr_err("%s: Command CRC error\n", mmc_hostname(host->mmc));
> - cmd->error = -EILSEQ;
> - }
> -
> - if (!cmd->data || cmd->error) {
> - if (host->curr.data && host->dma.sg)
> - msm_dmov_stop_cmd(host->dma.channel,
> - &host->dma.hdr, 0);
> - else if (host->curr.data) { /* Non DMA */
> - msmsdcc_reset_and_restore(host);
> - msmsdcc_stop_data(host);
> - msmsdcc_request_end(host, cmd->mrq);
> - } else { /* host->data == NULL */
> - if (!cmd->error && host->prog_enable) {
> - if (status & MCI_PROGDONE) {
> - host->prog_scan = false;
> - host->prog_enable = false;
> - msmsdcc_request_end(host, cmd->mrq);
> - } else {
> - host->curr.cmd = cmd;
> - }
> - } else {
> - if (host->prog_enable) {
> - host->prog_scan = false;
> - host->prog_enable = false;
> - }
> - msmsdcc_request_end(host, cmd->mrq);
> - }
> - }
> - } else if (cmd->data)
> - if (!(cmd->data->flags & MMC_DATA_READ))
> - msmsdcc_start_data(host, cmd->data,
> - NULL, 0);
> -}
> -
> -static void
> -msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status,
> - void __iomem *base)
> -{
> - struct mmc_data *data = host->curr.data;
> -
> - if (status & (MCI_CMDSENT | MCI_CMDRESPEND | MCI_CMDCRCFAIL |
> - MCI_CMDTIMEOUT | MCI_PROGDONE) && host->curr.cmd) {
> - msmsdcc_do_cmdirq(host, status);
> - }
> -
> - if (!data)
> - return;
> -
> - /* Check for data errors */
> - if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT |
> - MCI_TXUNDERRUN | MCI_RXOVERRUN)) {
> - msmsdcc_data_err(host, data, status);
> - host->curr.data_xfered = 0;
> - if (host->dma.sg)
> - msm_dmov_stop_cmd(host->dma.channel,
> - &host->dma.hdr, 0);
> - else {
> - msmsdcc_reset_and_restore(host);
> - if (host->curr.data)
> - msmsdcc_stop_data(host);
> - if (!data->stop)
> - msmsdcc_request_end(host, data->mrq);
> - else
> - msmsdcc_start_command(host, data->stop, 0);
> - }
> - }
> -
> - /* Check for data done */
> - if (!host->curr.got_dataend && (status & MCI_DATAEND))
> - host->curr.got_dataend = 1;
> -
> - /*
> - * If DMA is still in progress, we complete via the completion handler
> - */
> - if (host->curr.got_dataend && !host->dma.busy) {
> - /*
> - * There appears to be an issue in the controller where
> - * if you request a small block transfer (< fifo size),
> - * you may get your DATAEND/DATABLKEND irq without the
> - * PIO data irq.
> - *
> - * Check to see if there is still data to be read,
> - * and simulate a PIO irq.
> - */
> - if (readl(base + MMCISTATUS) & MCI_RXDATAAVLBL)
> - msmsdcc_pio_irq(1, host);
> -
> - msmsdcc_stop_data(host);
> - if (!data->error)
> - host->curr.data_xfered = host->curr.xfer_size;
> -
> - if (!data->stop)
> - msmsdcc_request_end(host, data->mrq);
> - else
> - msmsdcc_start_command(host, data->stop, 0);
> - }
> -}
> -
> -static irqreturn_t
> -msmsdcc_irq(int irq, void *dev_id)
> -{
> - struct msmsdcc_host *host = dev_id;
> - void __iomem *base = host->base;
> - u32 status;
> - int ret = 0;
> - int cardint = 0;
> -
> - spin_lock(&host->lock);
> -
> - do {
> - status = msmsdcc_readl(host, MMCISTATUS);
> - status &= msmsdcc_readl(host, MMCIMASK0);
> - if ((status & (~MCI_IRQ_PIO)) == 0)
> - break;
> - msmsdcc_writel(host, status, MMCICLEAR);
> -
> - if (status & MCI_SDIOINTR)
> - status &= ~MCI_SDIOINTR;
> -
> - if (!status)
> - break;
> -
> - msmsdcc_handle_irq_data(host, status, base);
> -
> - if (status & MCI_SDIOINTOPER) {
> - cardint = 1;
> - status &= ~MCI_SDIOINTOPER;
> - }
> - ret = 1;
> - } while (status);
> -
> - spin_unlock(&host->lock);
> -
> - /*
> - * We have to delay handling the card interrupt as it calls
> - * back into the driver.
> - */
> - if (cardint)
> - mmc_signal_sdio_irq(host->mmc);
> -
> - return IRQ_RETVAL(ret);
> -}
> -
> -static void
> -msmsdcc_request(struct mmc_host *mmc, struct mmc_request *mrq)
> -{
> - struct msmsdcc_host *host = mmc_priv(mmc);
> - unsigned long flags;
> -
> - WARN_ON(host->curr.mrq != NULL);
> - WARN_ON(host->pwr == 0);
> -
> - spin_lock_irqsave(&host->lock, flags);
> -
> - host->stats.reqs++;
> -
> - if (host->eject) {
> - if (mrq->data && !(mrq->data->flags & MMC_DATA_READ)) {
> - mrq->cmd->error = 0;
> - mrq->data->bytes_xfered = mrq->data->blksz *
> - mrq->data->blocks;
> - } else
> - mrq->cmd->error = -ENOMEDIUM;
> -
> - spin_unlock_irqrestore(&host->lock, flags);
> - mmc_request_done(mmc, mrq);
> - return;
> - }
> -
> - msmsdcc_enable_clocks(host);
> -
> - host->curr.mrq = mrq;
> -
> - if (mrq->data && mrq->data->flags & MMC_DATA_READ)
> - /* Queue/read data, daisy-chain command when data starts */
> - msmsdcc_start_data(host, mrq->data, mrq->cmd, 0);
> - else
> - msmsdcc_start_command(host, mrq->cmd, 0);
> -
> - if (host->cmdpoll && !msmsdcc_spin_on_status(host,
> - MCI_CMDRESPEND|MCI_CMDCRCFAIL|MCI_CMDTIMEOUT,
> - CMD_SPINMAX)) {
> - uint32_t status = msmsdcc_readl(host, MMCISTATUS);
> - msmsdcc_do_cmdirq(host, status);
> - msmsdcc_writel(host,
> - MCI_CMDRESPEND | MCI_CMDCRCFAIL | MCI_CMDTIMEOUT,
> - MMCICLEAR);
> - host->stats.cmdpoll_hits++;
> - } else {
> - host->stats.cmdpoll_misses++;
> - }
> - spin_unlock_irqrestore(&host->lock, flags);
> -}
> -
> -static void msmsdcc_setup_gpio(struct msmsdcc_host *host, bool enable)
> -{
> - struct msm_mmc_gpio_data *curr;
> - int i, rc = 0;
> -
> - if (!host->plat->gpio_data || host->gpio_config_status == enable)
> - return;
> -
> - curr = host->plat->gpio_data;
> - for (i = 0; i < curr->size; i++) {
> - if (enable) {
> - rc = gpio_request(curr->gpio[i].no,
> - curr->gpio[i].name);
> - if (rc) {
> - pr_err("%s: gpio_request(%d, %s) failed %d\n",
> - mmc_hostname(host->mmc),
> - curr->gpio[i].no,
> - curr->gpio[i].name, rc);
> - goto free_gpios;
> - }
> - } else {
> - gpio_free(curr->gpio[i].no);
> - }
> - }
> - host->gpio_config_status = enable;
> - return;
> -
> -free_gpios:
> - for (; i >= 0; i--)
> - gpio_free(curr->gpio[i].no);
> -}
> -
> -static void
> -msmsdcc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
> -{
> - struct msmsdcc_host *host = mmc_priv(mmc);
> - u32 clk = 0, pwr = 0;
> - int rc;
> - unsigned long flags;
> -
> - spin_lock_irqsave(&host->lock, flags);
> -
> - msmsdcc_enable_clocks(host);
> -
> - spin_unlock_irqrestore(&host->lock, flags);
> -
> - if (ios->clock) {
> - if (ios->clock != host->clk_rate) {
> - rc = clk_set_rate(host->clk, ios->clock);
> - if (rc < 0)
> - pr_err("%s: Error setting clock rate (%d)\n",
> - mmc_hostname(host->mmc), rc);
> - else
> - host->clk_rate = ios->clock;
> - }
> - clk |= MCI_CLK_ENABLE;
> - }
> -
> - if (ios->bus_width == MMC_BUS_WIDTH_4)
> - clk |= (2 << 10); /* Set WIDEBUS */
> -
> - if (ios->clock > 400000 && msmsdcc_pwrsave)
> - clk |= (1 << 9); /* PWRSAVE */
> -
> - clk |= (1 << 12); /* FLOW_ENA */
> - clk |= (1 << 15); /* feedback clock */
> -
> - if (host->plat->translate_vdd)
> - pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
> -
> - switch (ios->power_mode) {
> - case MMC_POWER_OFF:
> - msmsdcc_setup_gpio(host, false);
> - break;
> - case MMC_POWER_UP:
> - pwr |= MCI_PWR_UP;
> - msmsdcc_setup_gpio(host, true);
> - break;
> - case MMC_POWER_ON:
> - pwr |= MCI_PWR_ON;
> - break;
> - }
> -
> - if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
> - pwr |= MCI_OD;
> -
> - msmsdcc_writel(host, clk, MMCICLOCK);
> -
> - if (host->pwr != pwr) {
> - host->pwr = pwr;
> - msmsdcc_writel(host, pwr, MMCIPOWER);
> - }
> -#if BUSCLK_PWRSAVE
> - spin_lock_irqsave(&host->lock, flags);
> - msmsdcc_disable_clocks(host, 1);
> - spin_unlock_irqrestore(&host->lock, flags);
> -#endif
> -}
> -
> -static void msmsdcc_enable_sdio_irq(struct mmc_host *mmc, int enable)
> -{
> - struct msmsdcc_host *host = mmc_priv(mmc);
> - unsigned long flags;
> - u32 status;
> -
> - spin_lock_irqsave(&host->lock, flags);
> - if (msmsdcc_sdioirq == 1) {
> - status = msmsdcc_readl(host, MMCIMASK0);
> - if (enable)
> - status |= MCI_SDIOINTOPERMASK;
> - else
> - status &= ~MCI_SDIOINTOPERMASK;
> - host->saved_irq0mask = status;
> - msmsdcc_writel(host, status, MMCIMASK0);
> - }
> - spin_unlock_irqrestore(&host->lock, flags);
> -}
> -
> -static void msmsdcc_init_card(struct mmc_host *mmc, struct mmc_card *card)
> -{
> - struct msmsdcc_host *host = mmc_priv(mmc);
> -
> - if (host->plat->init_card)
> - host->plat->init_card(card);
> -}
> -
> -static const struct mmc_host_ops msmsdcc_ops = {
> - .request = msmsdcc_request,
> - .set_ios = msmsdcc_set_ios,
> - .enable_sdio_irq = msmsdcc_enable_sdio_irq,
> - .init_card = msmsdcc_init_card,
> -};
> -
> -static void
> -msmsdcc_check_status(unsigned long data)
> -{
> - struct msmsdcc_host *host = (struct msmsdcc_host *)data;
> - unsigned int status;
> -
> - if (!host->plat->status) {
> - mmc_detect_change(host->mmc, 0);
> - goto out;
> - }
> -
> - status = host->plat->status(mmc_dev(host->mmc));
> - host->eject = !status;
> - if (status ^ host->oldstat) {
> - pr_info("%s: Slot status change detected (%d -> %d)\n",
> - mmc_hostname(host->mmc), host->oldstat, status);
> - if (status)
> - mmc_detect_change(host->mmc, (5 * HZ) / 2);
> - else
> - mmc_detect_change(host->mmc, 0);
> - }
> -
> - host->oldstat = status;
> -
> -out:
> - if (host->timer.function)
> - mod_timer(&host->timer, jiffies + HZ);
> -}
> -
> -static irqreturn_t
> -msmsdcc_platform_status_irq(int irq, void *dev_id)
> -{
> - struct msmsdcc_host *host = dev_id;
> -
> - pr_debug("%s: %d\n", __func__, irq);
> - msmsdcc_check_status((unsigned long) host);
> - return IRQ_HANDLED;
> -}
> -
> -static void
> -msmsdcc_status_notify_cb(int card_present, void *dev_id)
> -{
> - struct msmsdcc_host *host = dev_id;
> -
> - pr_debug("%s: card_present %d\n", mmc_hostname(host->mmc),
> - card_present);
> - msmsdcc_check_status((unsigned long) host);
> -}
> -
> -static void
> -msmsdcc_busclk_expired(unsigned long _data)
> -{
> - struct msmsdcc_host *host = (struct msmsdcc_host *) _data;
> -
> - if (host->clks_on)
> - msmsdcc_disable_clocks(host, 0);
> -}
> -
> -static int
> -msmsdcc_init_dma(struct msmsdcc_host *host)
> -{
> - memset(&host->dma, 0, sizeof(struct msmsdcc_dma_data));
> - host->dma.host = host;
> - host->dma.channel = -1;
> -
> - if (!host->dmares)
> - return -ENODEV;
> -
> - host->dma.nc = dma_alloc_coherent(NULL,
> - sizeof(struct msmsdcc_nc_dmadata),
> - &host->dma.nc_busaddr,
> - GFP_KERNEL);
> - if (host->dma.nc == NULL) {
> - pr_err("Unable to allocate DMA buffer\n");
> - return -ENOMEM;
> - }
> - memset(host->dma.nc, 0x00, sizeof(struct msmsdcc_nc_dmadata));
> - host->dma.cmd_busaddr = host->dma.nc_busaddr;
> - host->dma.cmdptr_busaddr = host->dma.nc_busaddr +
> - offsetof(struct msmsdcc_nc_dmadata, cmdptr);
> - host->dma.channel = host->dmares->start;
> -
> - return 0;
> -}
> -
> -static int
> -msmsdcc_probe(struct platform_device *pdev)
> -{
> - struct msm_mmc_platform_data *plat = pdev->dev.platform_data;
> - struct msmsdcc_host *host;
> - struct mmc_host *mmc;
> - struct resource *cmd_irqres = NULL;
> - struct resource *stat_irqres = NULL;
> - struct resource *memres = NULL;
> - struct resource *dmares = NULL;
> - int ret;
> -
> - /* must have platform data */
> - if (!plat) {
> - pr_err("%s: Platform data not available\n", __func__);
> - ret = -EINVAL;
> - goto out;
> - }
> -
> - if (pdev->id < 1 || pdev->id > 4)
> - return -EINVAL;
> -
> - if (pdev->resource == NULL || pdev->num_resources < 2) {
> - pr_err("%s: Invalid resource\n", __func__);
> - return -ENXIO;
> - }
> -
> - memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> - dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
> - cmd_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> - "cmd_irq");
> - stat_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> - "status_irq");
> -
> - if (!cmd_irqres || !memres) {
> - pr_err("%s: Invalid resource\n", __func__);
> - return -ENXIO;
> - }
> -
> - /*
> - * Setup our host structure
> - */
> -
> - mmc = mmc_alloc_host(sizeof(struct msmsdcc_host), &pdev->dev);
> - if (!mmc) {
> - ret = -ENOMEM;
> - goto out;
> - }
> -
> - host = mmc_priv(mmc);
> - host->pdev_id = pdev->id;
> - host->plat = plat;
> - host->mmc = mmc;
> - host->curr.cmd = NULL;
> - init_timer(&host->busclk_timer);
> - host->busclk_timer.data = (unsigned long) host;
> - host->busclk_timer.function = msmsdcc_busclk_expired;
> -
> -
> - host->cmdpoll = 1;
> -
> - host->base = ioremap(memres->start, PAGE_SIZE);
> - if (!host->base) {
> - ret = -ENOMEM;
> - goto host_free;
> - }
> -
> - host->cmd_irqres = cmd_irqres;
> - host->memres = memres;
> - host->dmares = dmares;
> - spin_lock_init(&host->lock);
> -
> - tasklet_init(&host->dma_tlet, msmsdcc_dma_complete_tlet,
> - (unsigned long)host);
> -
> - /*
> - * Setup DMA
> - */
> - if (host->dmares) {
> - ret = msmsdcc_init_dma(host);
> - if (ret)
> - goto ioremap_free;
> - } else {
> - host->dma.channel = -1;
> - }
> -
> - /* Get our clocks */
> - host->pclk = clk_get(&pdev->dev, "sdc_pclk");
> - if (IS_ERR(host->pclk)) {
> - ret = PTR_ERR(host->pclk);
> - goto dma_free;
> - }
> -
> - host->clk = clk_get(&pdev->dev, "sdc_clk");
> - if (IS_ERR(host->clk)) {
> - ret = PTR_ERR(host->clk);
> - goto pclk_put;
> - }
> -
> - ret = clk_set_rate(host->clk, msmsdcc_fmin);
> - if (ret) {
> - pr_err("%s: Clock rate set failed (%d)\n", __func__, ret);
> - goto clk_put;
> - }
> -
> - ret = clk_prepare(host->pclk);
> - if (ret)
> - goto clk_put;
> -
> - ret = clk_prepare(host->clk);
> - if (ret)
> - goto clk_unprepare_p;
> -
> - /* Enable clocks */
> - ret = msmsdcc_enable_clocks(host);
> - if (ret)
> - goto clk_unprepare;
> -
> - host->pclk_rate = clk_get_rate(host->pclk);
> - host->clk_rate = clk_get_rate(host->clk);
> -
> - /*
> - * Setup MMC host structure
> - */
> - mmc->ops = &msmsdcc_ops;
> - mmc->f_min = msmsdcc_fmin;
> - mmc->f_max = msmsdcc_fmax;
> - mmc->ocr_avail = plat->ocr_mask;
> -
> - if (msmsdcc_4bit)
> - mmc->caps |= MMC_CAP_4_BIT_DATA;
> - if (msmsdcc_sdioirq)
> - mmc->caps |= MMC_CAP_SDIO_IRQ;
> - mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
> -
> - mmc->max_segs = NR_SG;
> - mmc->max_blk_size = 4096; /* MCI_DATA_CTL BLOCKSIZE up to 4096 */
> - mmc->max_blk_count = 65536;
> -
> - mmc->max_req_size = 33554432; /* MCI_DATA_LENGTH is 25 bits */
> - mmc->max_seg_size = mmc->max_req_size;
> -
> - msmsdcc_writel(host, 0, MMCIMASK0);
> - msmsdcc_writel(host, 0x5e007ff, MMCICLEAR);
> -
> - msmsdcc_writel(host, MCI_IRQENABLE, MMCIMASK0);
> - host->saved_irq0mask = MCI_IRQENABLE;
> -
> - /*
> - * Setup card detect change
> - */
> -
> - memset(&host->timer, 0, sizeof(host->timer));
> -
> - if (stat_irqres && !(stat_irqres->flags & IORESOURCE_DISABLED)) {
> - unsigned long irqflags = IRQF_SHARED |
> - (stat_irqres->flags & IRQF_TRIGGER_MASK);
> -
> - host->stat_irq = stat_irqres->start;
> - ret = request_irq(host->stat_irq,
> - msmsdcc_platform_status_irq,
> - irqflags,
> - DRIVER_NAME " (slot)",
> - host);
> - if (ret) {
> - pr_err("%s: Unable to get slot IRQ %d (%d)\n",
> - mmc_hostname(mmc), host->stat_irq, ret);
> - goto clk_disable;
> - }
> - } else if (plat->register_status_notify) {
> - plat->register_status_notify(msmsdcc_status_notify_cb, host);
> - } else if (!plat->status)
> - pr_err("%s: No card detect facilities available\n",
> - mmc_hostname(mmc));
> - else {
> - init_timer(&host->timer);
> - host->timer.data = (unsigned long)host;
> - host->timer.function = msmsdcc_check_status;
> - host->timer.expires = jiffies + HZ;
> - add_timer(&host->timer);
> - }
> -
> - if (plat->status) {
> - host->oldstat = host->plat->status(mmc_dev(host->mmc));
> - host->eject = !host->oldstat;
> - }
> -
> - ret = request_irq(cmd_irqres->start, msmsdcc_irq, IRQF_SHARED,
> - DRIVER_NAME " (cmd)", host);
> - if (ret)
> - goto stat_irq_free;
> -
> - ret = request_irq(cmd_irqres->start, msmsdcc_pio_irq, IRQF_SHARED,
> - DRIVER_NAME " (pio)", host);
> - if (ret)
> - goto cmd_irq_free;
> -
> - platform_set_drvdata(pdev, mmc);
> - mmc_add_host(mmc);
> -
> - pr_info("%s: Qualcomm MSM SDCC at 0x%016llx irq %d,%d dma %d\n",
> - mmc_hostname(mmc), (unsigned long long)memres->start,
> - (unsigned int) cmd_irqres->start,
> - (unsigned int) host->stat_irq, host->dma.channel);
> - pr_info("%s: 4 bit data mode %s\n", mmc_hostname(mmc),
> - (mmc->caps & MMC_CAP_4_BIT_DATA ? "enabled" : "disabled"));
> - pr_info("%s: MMC clock %u -> %u Hz, PCLK %u Hz\n",
> - mmc_hostname(mmc), msmsdcc_fmin, msmsdcc_fmax, host->pclk_rate);
> - pr_info("%s: Slot eject status = %d\n", mmc_hostname(mmc), host->eject);
> - pr_info("%s: Power save feature enable = %d\n",
> - mmc_hostname(mmc), msmsdcc_pwrsave);
> -
> - if (host->dma.channel != -1) {
> - pr_info("%s: DM non-cached buffer at %p, dma_addr 0x%.8x\n",
> - mmc_hostname(mmc), host->dma.nc, host->dma.nc_busaddr);
> - pr_info("%s: DM cmd busaddr 0x%.8x, cmdptr busaddr 0x%.8x\n",
> - mmc_hostname(mmc), host->dma.cmd_busaddr,
> - host->dma.cmdptr_busaddr);
> - } else
> - pr_info("%s: PIO transfer enabled\n", mmc_hostname(mmc));
> - if (host->timer.function)
> - pr_info("%s: Polling status mode enabled\n", mmc_hostname(mmc));
> -
> - return 0;
> - cmd_irq_free:
> - free_irq(cmd_irqres->start, host);
> - stat_irq_free:
> - if (host->stat_irq)
> - free_irq(host->stat_irq, host);
> - clk_disable:
> - msmsdcc_disable_clocks(host, 0);
> - clk_unprepare:
> - clk_unprepare(host->clk);
> - clk_unprepare_p:
> - clk_unprepare(host->pclk);
> - clk_put:
> - clk_put(host->clk);
> - pclk_put:
> - clk_put(host->pclk);
> -dma_free:
> - if (host->dmares)
> - dma_free_coherent(NULL, sizeof(struct msmsdcc_nc_dmadata),
> - host->dma.nc, host->dma.nc_busaddr);
> -ioremap_free:
> - tasklet_kill(&host->dma_tlet);
> - iounmap(host->base);
> - host_free:
> - mmc_free_host(mmc);
> - out:
> - return ret;
> -}
> -
> -#ifdef CONFIG_PM
> -static int
> -msmsdcc_suspend(struct platform_device *dev, pm_message_t state)
> -{
> - struct mmc_host *mmc = platform_get_drvdata(dev);
> -
> - if (mmc) {
> - struct msmsdcc_host *host = mmc_priv(mmc);
> -
> - if (host->stat_irq)
> - disable_irq(host->stat_irq);
> -
> - msmsdcc_writel(host, 0, MMCIMASK0);
> - if (host->clks_on)
> - msmsdcc_disable_clocks(host, 0);
> - }
> - return 0;
> -}
> -
> -static int
> -msmsdcc_resume(struct platform_device *dev)
> -{
> - struct mmc_host *mmc = platform_get_drvdata(dev);
> -
> - if (mmc) {
> - struct msmsdcc_host *host = mmc_priv(mmc);
> -
> - msmsdcc_enable_clocks(host);
> -
> - msmsdcc_writel(host, host->saved_irq0mask, MMCIMASK0);
> -
> - if (host->stat_irq)
> - enable_irq(host->stat_irq);
> -#if BUSCLK_PWRSAVE
> - msmsdcc_disable_clocks(host, 1);
> -#endif
> - }
> - return 0;
> -}
> -#else
> -#define msmsdcc_suspend 0
> -#define msmsdcc_resume 0
> -#endif
> -
> -static struct platform_driver msmsdcc_driver = {
> - .probe = msmsdcc_probe,
> - .suspend = msmsdcc_suspend,
> - .resume = msmsdcc_resume,
> - .driver = {
> - .name = "msm_sdcc",
> - },
> -};
> -
> -module_platform_driver(msmsdcc_driver);
> -
> -MODULE_DESCRIPTION("Qualcomm MSM 7X00A Multimedia Card Interface driver");
> -MODULE_LICENSE("GPL");
> diff --git a/drivers/mmc/host/msm_sdcc.h b/drivers/mmc/host/msm_sdcc.h
> deleted file mode 100644
> index 402028d16b86..000000000000
> --- a/drivers/mmc/host/msm_sdcc.h
> +++ /dev/null
> @@ -1,256 +0,0 @@
> -/*
> - * linux/drivers/mmc/host/msmsdcc.h - QCT MSM7K SDC Controller
> - *
> - * Copyright (C) 2008 Google, All Rights Reserved.
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - *
> - * - Based on mmci.h
> - */
> -
> -#ifndef _MSM_SDCC_H
> -#define _MSM_SDCC_H
> -
> -#define MSMSDCC_CRCI_SDC1 6
> -#define MSMSDCC_CRCI_SDC2 7
> -#define MSMSDCC_CRCI_SDC3 12
> -#define MSMSDCC_CRCI_SDC4 13
> -
> -#define MMCIPOWER 0x000
> -#define MCI_PWR_OFF 0x00
> -#define MCI_PWR_UP 0x02
> -#define MCI_PWR_ON 0x03
> -#define MCI_OD (1 << 6)
> -
> -#define MMCICLOCK 0x004
> -#define MCI_CLK_ENABLE (1 << 8)
> -#define MCI_CLK_PWRSAVE (1 << 9)
> -#define MCI_CLK_WIDEBUS (1 << 10)
> -#define MCI_CLK_FLOWENA (1 << 12)
> -#define MCI_CLK_INVERTOUT (1 << 13)
> -#define MCI_CLK_SELECTIN (1 << 14)
> -
> -#define MMCIARGUMENT 0x008
> -#define MMCICOMMAND 0x00c
> -#define MCI_CPSM_RESPONSE (1 << 6)
> -#define MCI_CPSM_LONGRSP (1 << 7)
> -#define MCI_CPSM_INTERRUPT (1 << 8)
> -#define MCI_CPSM_PENDING (1 << 9)
> -#define MCI_CPSM_ENABLE (1 << 10)
> -#define MCI_CPSM_PROGENA (1 << 11)
> -#define MCI_CSPM_DATCMD (1 << 12)
> -#define MCI_CSPM_MCIABORT (1 << 13)
> -#define MCI_CSPM_CCSENABLE (1 << 14)
> -#define MCI_CSPM_CCSDISABLE (1 << 15)
> -
> -
> -#define MMCIRESPCMD 0x010
> -#define MMCIRESPONSE0 0x014
> -#define MMCIRESPONSE1 0x018
> -#define MMCIRESPONSE2 0x01c
> -#define MMCIRESPONSE3 0x020
> -#define MMCIDATATIMER 0x024
> -#define MMCIDATALENGTH 0x028
> -
> -#define MMCIDATACTRL 0x02c
> -#define MCI_DPSM_ENABLE (1 << 0)
> -#define MCI_DPSM_DIRECTION (1 << 1)
> -#define MCI_DPSM_MODE (1 << 2)
> -#define MCI_DPSM_DMAENABLE (1 << 3)
> -
> -#define MMCIDATACNT 0x030
> -#define MMCISTATUS 0x034
> -#define MCI_CMDCRCFAIL (1 << 0)
> -#define MCI_DATACRCFAIL (1 << 1)
> -#define MCI_CMDTIMEOUT (1 << 2)
> -#define MCI_DATATIMEOUT (1 << 3)
> -#define MCI_TXUNDERRUN (1 << 4)
> -#define MCI_RXOVERRUN (1 << 5)
> -#define MCI_CMDRESPEND (1 << 6)
> -#define MCI_CMDSENT (1 << 7)
> -#define MCI_DATAEND (1 << 8)
> -#define MCI_DATABLOCKEND (1 << 10)
> -#define MCI_CMDACTIVE (1 << 11)
> -#define MCI_TXACTIVE (1 << 12)
> -#define MCI_RXACTIVE (1 << 13)
> -#define MCI_TXFIFOHALFEMPTY (1 << 14)
> -#define MCI_RXFIFOHALFFULL (1 << 15)
> -#define MCI_TXFIFOFULL (1 << 16)
> -#define MCI_RXFIFOFULL (1 << 17)
> -#define MCI_TXFIFOEMPTY (1 << 18)
> -#define MCI_RXFIFOEMPTY (1 << 19)
> -#define MCI_TXDATAAVLBL (1 << 20)
> -#define MCI_RXDATAAVLBL (1 << 21)
> -#define MCI_SDIOINTR (1 << 22)
> -#define MCI_PROGDONE (1 << 23)
> -#define MCI_ATACMDCOMPL (1 << 24)
> -#define MCI_SDIOINTOPER (1 << 25)
> -#define MCI_CCSTIMEOUT (1 << 26)
> -
> -#define MMCICLEAR 0x038
> -#define MCI_CMDCRCFAILCLR (1 << 0)
> -#define MCI_DATACRCFAILCLR (1 << 1)
> -#define MCI_CMDTIMEOUTCLR (1 << 2)
> -#define MCI_DATATIMEOUTCLR (1 << 3)
> -#define MCI_TXUNDERRUNCLR (1 << 4)
> -#define MCI_RXOVERRUNCLR (1 << 5)
> -#define MCI_CMDRESPENDCLR (1 << 6)
> -#define MCI_CMDSENTCLR (1 << 7)
> -#define MCI_DATAENDCLR (1 << 8)
> -#define MCI_DATABLOCKENDCLR (1 << 10)
> -
> -#define MMCIMASK0 0x03c
> -#define MCI_CMDCRCFAILMASK (1 << 0)
> -#define MCI_DATACRCFAILMASK (1 << 1)
> -#define MCI_CMDTIMEOUTMASK (1 << 2)
> -#define MCI_DATATIMEOUTMASK (1 << 3)
> -#define MCI_TXUNDERRUNMASK (1 << 4)
> -#define MCI_RXOVERRUNMASK (1 << 5)
> -#define MCI_CMDRESPENDMASK (1 << 6)
> -#define MCI_CMDSENTMASK (1 << 7)
> -#define MCI_DATAENDMASK (1 << 8)
> -#define MCI_DATABLOCKENDMASK (1 << 10)
> -#define MCI_CMDACTIVEMASK (1 << 11)
> -#define MCI_TXACTIVEMASK (1 << 12)
> -#define MCI_RXACTIVEMASK (1 << 13)
> -#define MCI_TXFIFOHALFEMPTYMASK (1 << 14)
> -#define MCI_RXFIFOHALFFULLMASK (1 << 15)
> -#define MCI_TXFIFOFULLMASK (1 << 16)
> -#define MCI_RXFIFOFULLMASK (1 << 17)
> -#define MCI_TXFIFOEMPTYMASK (1 << 18)
> -#define MCI_RXFIFOEMPTYMASK (1 << 19)
> -#define MCI_TXDATAAVLBLMASK (1 << 20)
> -#define MCI_RXDATAAVLBLMASK (1 << 21)
> -#define MCI_SDIOINTMASK (1 << 22)
> -#define MCI_PROGDONEMASK (1 << 23)
> -#define MCI_ATACMDCOMPLMASK (1 << 24)
> -#define MCI_SDIOINTOPERMASK (1 << 25)
> -#define MCI_CCSTIMEOUTMASK (1 << 26)
> -
> -#define MMCIMASK1 0x040
> -#define MMCIFIFOCNT 0x044
> -#define MCICCSTIMER 0x058
> -
> -#define MMCIFIFO 0x080 /* to 0x0bc */
> -
> -#define MCI_IRQENABLE \
> - (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \
> - MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \
> - MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATAENDMASK|MCI_PROGDONEMASK)
> -
> -#define MCI_IRQ_PIO \
> - (MCI_RXDATAAVLBLMASK | MCI_TXDATAAVLBLMASK | MCI_RXFIFOEMPTYMASK | \
> - MCI_TXFIFOEMPTYMASK | MCI_RXFIFOFULLMASK | MCI_TXFIFOFULLMASK | \
> - MCI_RXFIFOHALFFULLMASK | MCI_TXFIFOHALFEMPTYMASK | \
> - MCI_RXACTIVEMASK | MCI_TXACTIVEMASK)
> -/*
> - * The size of the FIFO in bytes.
> - */
> -#define MCI_FIFOSIZE (16*4)
> -
> -#define MCI_FIFOHALFSIZE (MCI_FIFOSIZE / 2)
> -
> -#define NR_SG 32
> -
> -struct clk;
> -
> -struct msmsdcc_nc_dmadata {
> - dmov_box cmd[NR_SG];
> - uint32_t cmdptr;
> -};
> -
> -struct msmsdcc_dma_data {
> - struct msmsdcc_nc_dmadata *nc;
> - dma_addr_t nc_busaddr;
> - dma_addr_t cmd_busaddr;
> - dma_addr_t cmdptr_busaddr;
> -
> - struct msm_dmov_cmd hdr;
> - enum dma_data_direction dir;
> -
> - struct scatterlist *sg;
> - int num_ents;
> -
> - int channel;
> - struct msmsdcc_host *host;
> - int busy; /* Set if DM is busy */
> - int active;
> - unsigned int result;
> - struct msm_dmov_errdata err;
> -};
> -
> -struct msmsdcc_pio_data {
> - struct scatterlist *sg;
> - unsigned int sg_len;
> - unsigned int sg_off;
> -};
> -
> -struct msmsdcc_curr_req {
> - struct mmc_request *mrq;
> - struct mmc_command *cmd;
> - struct mmc_data *data;
> - unsigned int xfer_size; /* Total data size */
> - unsigned int xfer_remain; /* Bytes remaining to send */
> - unsigned int data_xfered; /* Bytes acked by BLKEND irq */
> - int got_dataend;
> - int user_pages;
> -};
> -
> -struct msmsdcc_stats {
> - unsigned int reqs;
> - unsigned int cmds;
> - unsigned int cmdpoll_hits;
> - unsigned int cmdpoll_misses;
> -};
> -
> -struct msmsdcc_host {
> - struct resource *cmd_irqres;
> - struct resource *memres;
> - struct resource *dmares;
> - void __iomem *base;
> - int pdev_id;
> - unsigned int stat_irq;
> -
> - struct msmsdcc_curr_req curr;
> -
> - struct mmc_host *mmc;
> - struct clk *clk; /* main MMC bus clock */
> - struct clk *pclk; /* SDCC peripheral bus clock */
> - unsigned int clks_on; /* set if clocks are enabled */
> - struct timer_list busclk_timer;
> -
> - unsigned int eject; /* eject state */
> -
> - spinlock_t lock;
> -
> - unsigned int clk_rate; /* Current clock rate */
> - unsigned int pclk_rate;
> -
> - u32 pwr;
> - u32 saved_irq0mask; /* MMCIMASK0 reg value */
> - struct msm_mmc_platform_data *plat;
> -
> - struct timer_list timer;
> - unsigned int oldstat;
> -
> - struct msmsdcc_dma_data dma;
> - struct msmsdcc_pio_data pio;
> - int cmdpoll;
> - struct msmsdcc_stats stats;
> -
> - struct tasklet_struct dma_tlet;
> - /* Command parameters */
> - unsigned int cmd_timeout;
> - unsigned int cmd_pio_irqmask;
> - unsigned int cmd_datactrl;
> - struct mmc_command *cmd_cmd;
> - u32 cmd_c;
> - bool gpio_config_status;
> -
> - bool prog_scan;
> - bool prog_enable;
> -};
> -
> -#endif
> diff --git a/include/linux/platform_data/mmc-msm_sdcc.h b/include/linux/platform_data/mmc-msm_sdcc.h
> deleted file mode 100644
> index 55aa873c9396..000000000000
> --- a/include/linux/platform_data/mmc-msm_sdcc.h
> +++ /dev/null
> @@ -1,27 +0,0 @@
> -#ifndef __MMC_MSM_SDCC_H
> -#define __MMC_MSM_SDCC_H
> -
> -#include <linux/mmc/host.h>
> -#include <linux/mmc/card.h>
> -#include <linux/mmc/sdio_func.h>
> -
> -struct msm_mmc_gpio {
> - unsigned no;
> - const char *name;
> -};
> -
> -struct msm_mmc_gpio_data {
> - struct msm_mmc_gpio *gpio;
> - u8 size;
> -};
> -
> -struct msm_mmc_platform_data {
> - unsigned int ocr_mask; /* available voltages */
> - u32 (*translate_vdd)(struct device *, unsigned int);
> - unsigned int (*status)(struct device *);
> - int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id);
> - struct msm_mmc_gpio_data *gpio_data;
> - void (*init_card)(struct mmc_card *card);
> -};
> -
> -#endif
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 00/12] Remove mach-msm and associated code
2015-03-13 20:45 ` Stephen Boyd
@ 2015-03-17 16:18 ` dwalker at fifo99.com
0 siblings, 0 replies; 28+ messages in thread
From: dwalker at fifo99.com @ 2015-03-17 16:18 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Mar 13, 2015 at 01:45:36PM -0700, Stephen Boyd wrote:
> On 03/13/15 12:55, Arnd Bergmann wrote:
> > On Friday 13 March 2015 11:09:33 Stephen Boyd wrote:
> >> The maintainers for mach-msm no longer have any plans to support
> >> or test the platforms supported by this architecture[1]. Most likely
> >> there aren't any active users of this code anyway, so let's
> >> delete it and the associated drivers/code. We should probably merge
> >> this as one big series through arm-soc. Although some patches
> >> should be fine to take through maintainers, some things like
> >> mmc and usb have header file dependencies for platform_data.
> >>
> >> [1] http://lkml.kernel.org/r/20150307031212.GA8434 at fifo99.com
> >>
> > As I wrote, I'd have a mild preference for doing the multiplatform
> > conversion first and then removing the support in the following merge
> > window, just in case someone wants that code back.
> >
> > If everyone wants to see that code die rather sooner than later,
> > that's fine with me as well.
>
> I think everyone wants to see the code die now. They can always pull the
> multi-platform patches from the list. I'll stash away my 7200 DT
> conversion in case someone cares but I really doubt anybody does.
I would say I want it to die , but it seems like you do .. It's fine with me
tho ..
Daniel
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 02/12] gpio: Remove gpio-msm-v1 driver
2015-03-13 18:09 ` [PATCH 02/12] gpio: Remove gpio-msm-v1 driver Stephen Boyd
@ 2015-03-18 12:02 ` Linus Walleij
0 siblings, 0 replies; 28+ messages in thread
From: Linus Walleij @ 2015-03-18 12:02 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Mar 13, 2015 at 7:09 PM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> This driver is orphaned now that mach-msm has been removed.
> Delete it.
>
> Cc: David Brown <davidb@codeaurora.org>
> Cc: Bryan Huntsman <bryanh@codeaurora.org>
> Cc: Daniel Walker <dwalker@fifo99.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Alexandre Courbot <gnurou@gmail.com>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
>
> This can be acked and go through arm-soc or applied directly to gpio tree.
This would collide with Arnds multiplatform patches.
If you coordinate with Arnd and agree:
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 12/12] msm: msm_fb: Remove dead code
[not found] ` <20150313185109.GE14457@ns203013.ovh.net>
@ 2015-04-10 23:07 ` Stephen Boyd
[not found] ` <55806E63.8020509@codeaurora.org>
1 sibling, 0 replies; 28+ messages in thread
From: Stephen Boyd @ 2015-04-10 23:07 UTC (permalink / raw)
To: linux-arm-kernel
On 03/13/15 11:51, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 11:09 Fri 13 Mar , Stephen Boyd wrote:
>> This code is no longer used now that mach-msm has been removed.
>> Delete it.
>>
>> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
>> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
>> Cc: David Brown <davidb@codeaurora.org>
>> Cc: Bryan Huntsman <bryanh@codeaurora.org>
>> Cc: Daniel Walker <dwalker@fifo99.com>
>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>
Thanks. Kumar, can you pick this one up too?
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 12/12] msm: msm_fb: Remove dead code
[not found] ` <55806E63.8020509@codeaurora.org>
@ 2015-06-16 23:27 ` Kevin Hilman
2015-06-17 9:56 ` Tomi Valkeinen
1 sibling, 0 replies; 28+ messages in thread
From: Kevin Hilman @ 2015-06-16 23:27 UTC (permalink / raw)
To: linux-arm-kernel
Stephen Boyd <sboyd@codeaurora.org> writes:
> On 03/13/2015 11:51 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 11:09 Fri 13 Mar , Stephen Boyd wrote:
>>> This code is no longer used now that mach-msm has been removed.
>>> Delete it.
>>>
>>> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
>>> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
>>> Cc: David Brown <davidb@codeaurora.org>
>>> Cc: Bryan Huntsman <bryanh@codeaurora.org>
>>> Cc: Daniel Walker <dwalker@fifo99.com>
>>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>
>
> Thanks again. Should this go through arm-soc (Cced)? Or some other tree
> besides the fb tree? This is the last patch that hasn't been applied in
> this set of 12 patches.
It's all drivers/video/fbdev/*, so it's not arm-soc material. Looks to
me like it should go through the fbdev tree.
Kevin
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 12/12] msm: msm_fb: Remove dead code
[not found] ` <55806E63.8020509@codeaurora.org>
2015-06-16 23:27 ` Kevin Hilman
@ 2015-06-17 9:56 ` Tomi Valkeinen
2015-06-17 19:24 ` Stephen Boyd
1 sibling, 1 reply; 28+ messages in thread
From: Tomi Valkeinen @ 2015-06-17 9:56 UTC (permalink / raw)
To: linux-arm-kernel
On 16/06/15 21:43, Stephen Boyd wrote:
> On 03/13/2015 11:51 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>> On 11:09 Fri 13 Mar , Stephen Boyd wrote:
>>> This code is no longer used now that mach-msm has been removed.
>>> Delete it.
>>>
>>> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
>>> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
>>> Cc: David Brown <davidb@codeaurora.org>
>>> Cc: Bryan Huntsman <bryanh@codeaurora.org>
>>> Cc: Daniel Walker <dwalker@fifo99.com>
>>> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
>>
>
> Thanks again. Should this go through arm-soc (Cced)? Or some other tree
> besides the fb tree? This is the last patch that hasn't been applied in
> this set of 12 patches.
Are all the patches that this depends on already in v4.1-rcX? If so, I
can take this via fbdev.
Tomi
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^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 12/12] msm: msm_fb: Remove dead code
2015-06-17 9:56 ` Tomi Valkeinen
@ 2015-06-17 19:24 ` Stephen Boyd
2015-06-18 6:58 ` Tomi Valkeinen
0 siblings, 1 reply; 28+ messages in thread
From: Stephen Boyd @ 2015-06-17 19:24 UTC (permalink / raw)
To: linux-arm-kernel
On 06/17/2015 02:56 AM, Tomi Valkeinen wrote:
> Are all the patches that this depends on already in v4.1-rcX? If so, I
> can take this via fbdev.
>
Yes. Please take it via fbdev. Thanks.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 12/12] msm: msm_fb: Remove dead code
2015-06-17 19:24 ` Stephen Boyd
@ 2015-06-18 6:58 ` Tomi Valkeinen
0 siblings, 0 replies; 28+ messages in thread
From: Tomi Valkeinen @ 2015-06-18 6:58 UTC (permalink / raw)
To: linux-arm-kernel
On 17/06/15 22:24, Stephen Boyd wrote:
> On 06/17/2015 02:56 AM, Tomi Valkeinen wrote:
>> Are all the patches that this depends on already in v4.1-rcX? If so, I
>> can take this via fbdev.
>>
>
> Yes. Please take it via fbdev. Thanks.
Ok, queued for 4.2.
Tomi
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^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2015-06-18 6:58 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-03-13 18:09 [PATCH 00/12] Remove mach-msm and associated code Stephen Boyd
2015-03-13 18:09 ` [PATCH 02/12] gpio: Remove gpio-msm-v1 driver Stephen Boyd
2015-03-18 12:02 ` Linus Walleij
2015-03-13 18:09 ` [PATCH 03/12] tty: serial: Remove orphaned serial driver Stephen Boyd
2015-03-13 18:09 ` [PATCH 04/12] tty: serial: msm_serial: Remove dead code Stephen Boyd
2015-03-13 18:09 ` [PATCH 05/12] net: smc91x: " Stephen Boyd
2015-03-13 19:52 ` Arnd Bergmann
2015-03-13 18:09 ` [PATCH 06/12] mmc: Remove msm_sdcc driver Stephen Boyd
2015-03-16 11:04 ` Ulf Hansson
2015-03-13 18:09 ` [PATCH 07/12] clocksource: qcom: Remove dead code Stephen Boyd
2015-03-13 18:14 ` Daniel Lezcano
2015-03-13 18:22 ` Stephen Boyd
2015-03-13 21:11 ` Daniel Lezcano
2015-03-13 18:09 ` [PATCH 08/12] ehci-msm: Remove dead dependency Stephen Boyd
2015-03-13 18:09 ` [PATCH 09/12] usb: phy: msm: Remove dead code Stephen Boyd
2015-03-13 18:09 ` [PATCH 10/12] phy: qcom-ufs: Switch dependency to ARCH_QCOM Stephen Boyd
2015-03-13 18:09 ` [PATCH 11/12] ufs-qcom: " Stephen Boyd
[not found] ` <1426270185-19510-2-git-send-email-sboyd@codeaurora.org>
2015-03-13 19:36 ` [PATCH 01/12] ARM: Remove mach-msm and associated ARM architecture code Paul Bolle
2015-03-13 20:44 ` Stephen Boyd
2015-03-13 19:55 ` [PATCH 00/12] Remove mach-msm and associated code Arnd Bergmann
2015-03-13 19:56 ` Arnd Bergmann
2015-03-13 20:45 ` Stephen Boyd
2015-03-17 16:18 ` dwalker at fifo99.com
[not found] ` <1426270185-19510-13-git-send-email-sboyd@codeaurora.org>
[not found] ` <20150313185109.GE14457@ns203013.ovh.net>
2015-04-10 23:07 ` [PATCH 12/12] msm: msm_fb: Remove dead code Stephen Boyd
[not found] ` <55806E63.8020509@codeaurora.org>
2015-06-16 23:27 ` Kevin Hilman
2015-06-17 9:56 ` Tomi Valkeinen
2015-06-17 19:24 ` Stephen Boyd
2015-06-18 6:58 ` Tomi Valkeinen
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