From mboxrd@z Thu Jan 1 00:00:00 1970 From: lho@apm.com (Loc Ho) Date: Tue, 17 Mar 2015 00:30:21 -0600 Subject: [PATCH v6 5/5] arm64: Add APM X-Gene SoC EDAC DTS entries In-Reply-To: <1426573821-1937-5-git-send-email-lho@apm.com> References: <1426573821-1937-1-git-send-email-lho@apm.com> <1426573821-1937-2-git-send-email-lho@apm.com> <1426573821-1937-3-git-send-email-lho@apm.com> <1426573821-1937-4-git-send-email-lho@apm.com> <1426573821-1937-5-git-send-email-lho@apm.com> Message-ID: <1426573821-1937-6-git-send-email-lho@apm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch adds APM X-Gene SoC EDAC DTS entries. Signed-off-by: Feng Kan Signed-off-by: Loc Ho --- arch/arm64/boot/dts/apm/apm-storm.dtsi | 98 ++++++++++++++++++++++++++++++++ 1 files changed, 98 insertions(+), 0 deletions(-) diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index a857794..c7b028f 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -354,6 +354,104 @@ }; }; + edacmc0: edacmc0 at 7e800000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e800000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacmc1: edacmc1 at 7e840000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e840000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacmc2: edacmc2 at 7e880000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e880000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacmc3: edacmc3 at 7e8c0000 { + compatible = "apm,xgene-edac-mc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e200000 0x0 0x1000>, + <0x0 0x7e700000 0x0 0x1000>, + <0x0 0x7e720000 0x0 0x1000>, + <0x0 0x7e8c0000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd0: edacpmd0 at 7c000000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c000000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd1: edacpmd1 at 7c200000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c200000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd2: edacpmd2 at 7c400000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c400000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacpmd3: edacpmd3 at 7c600000 { + compatible = "apm,xgene-edac-pmd"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7c600000 0x0 0x200000>, + <0x0 0x1054a000 0x0 0x10>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacl3: edacl3 at 7e600000 { + compatible = "apm,xgene-edac-l3"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e600000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>; + }; + + edacsoc: edacsoc at 7e930000 { + compatible = "apm,xgene-edac-soc"; + reg = <0x0 0x78800000 0x0 0x1000>, + <0x0 0x7e930000 0x0 0x1000>, + <0x0 0x7e000000 0x0 0x1000>; + interrupts = <0x0 0x20 0x4>, + <0x0 0x21 0x4>, + <0x0 0x27 0x4>; + }; + pcie0: pcie at 1f2b0000 { status = "disabled"; device_type = "pci"; -- 1.7.1