From mboxrd@z Thu Jan 1 00:00:00 1970 From: agross@codeaurora.org (Andy Gross) Date: Tue, 17 Mar 2015 16:51:09 -0500 Subject: [PATCH 2/4] ARM: DT: apq8064: Add ADM device node In-Reply-To: <1426629071-3541-1-git-send-email-agross@codeaurora.org> References: <1426629071-3541-1-git-send-email-agross@codeaurora.org> Message-ID: <1426629071-3541-3-git-send-email-agross@codeaurora.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch adds support for the ADM DMA on the APQ8064 SOC. Signed-off-by: Andy Gross --- arch/arm/boot/dts/qcom-apq8064.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index b3154c0..0f24334 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -2,6 +2,7 @@ #include "skeleton.dtsi" #include +#include #include #include #include @@ -349,5 +350,25 @@ pinctrl-0 = <&sdc4_gpios>; }; }; + + adm_dma: dma at 18320000 { + compatible = "qcom,adm"; + reg = <0x18320000 0xE0000>; + interrupts = ; + #dma-cells = <1>; + + clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; + clock-names = "core", "iface"; + + resets = <&gcc ADM0_RESET>, + <&gcc ADM0_PBUS_RESET>, + <&gcc ADM0_C0_RESET>, + <&gcc ADM0_C1_RESET>, + <&gcc ADM0_C2_RESET>; + reset-names = "clk", "pbus", "c0", "c1", "c2"; + qcom,ee = <1>; + + status = "disabled"; + }; }; }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation