* [PATCH 1/8] coresight: making cpu index lookup arm64 compliant
2015-03-30 20:13 [PATCH 0/8] coresight: next 4.0-rc6 Mathieu Poirier
@ 2015-03-30 20:13 ` Mathieu Poirier
2015-03-30 20:13 ` [PATCH 2/8] coresight: fixing compilation warnings picked up by 64bit compiler Mathieu Poirier
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mathieu Poirier @ 2015-03-30 20:13 UTC (permalink / raw)
To: linux-arm-kernel
Function "get_logical_index()" is not available on arm64.
Instead of adding the function simply using "of_get_cpu_node()" and
comparing the return value with cpu handles yields the same
result.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/coresight/of_coresight.c | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/coresight/of_coresight.c b/drivers/coresight/of_coresight.c
index c3efa418a86d..f3cc8e97a0f8 100644
--- a/drivers/coresight/of_coresight.c
+++ b/drivers/coresight/of_coresight.c
@@ -22,6 +22,7 @@
#include <linux/platform_device.h>
#include <linux/amba/bus.h>
#include <linux/coresight.h>
+#include <linux/cpumask.h>
#include <asm/smp_plat.h>
@@ -113,7 +114,7 @@ static int of_coresight_alloc_memory(struct device *dev,
struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, struct device_node *node)
{
- int i = 0, ret = 0;
+ int i = 0, ret = 0, cpu;
struct coresight_platform_data *pdata;
struct of_endpoint endpoint, rendpoint;
struct device *rdev;
@@ -187,17 +188,10 @@ struct coresight_platform_data *of_get_coresight_platform_data(
/* Affinity defaults to CPU0 */
pdata->cpu = 0;
dn = of_parse_phandle(node, "cpu", 0);
- if (dn) {
- const u32 *cell;
- int len, index;
- u64 hwid;
-
- cell = of_get_property(dn, "reg", &len);
- if (cell) {
- hwid = of_read_number(cell, of_n_addr_cells(dn));
- index = get_logical_index(hwid);
- if (index != -EINVAL)
- pdata->cpu = index;
+ for (cpu = 0; dn && cpu < nr_cpu_ids; cpu++) {
+ if (dn == of_get_cpu_node(cpu, NULL)) {
+ pdata->cpu = cpu;
+ break;
}
}
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/8] coresight: fixing compilation warnings picked up by 64bit compiler
2015-03-30 20:13 [PATCH 0/8] coresight: next 4.0-rc6 Mathieu Poirier
2015-03-30 20:13 ` [PATCH 1/8] coresight: making cpu index lookup arm64 compliant Mathieu Poirier
@ 2015-03-30 20:13 ` Mathieu Poirier
2015-03-30 20:13 ` [PATCH 3/8] coresight: Adding coresight support for arm64 architecture Mathieu Poirier
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mathieu Poirier @ 2015-03-30 20:13 UTC (permalink / raw)
To: linux-arm-kernel
Compiling coresight drivers with a 64-bit compiler highlights a couple
of formatting issues, which are fixed by this patch.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/coresight/coresight-etb10.c | 4 ++--
drivers/coresight/coresight-tmc.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/coresight/coresight-etb10.c b/drivers/coresight/coresight-etb10.c
index c9acd406f0d0..40049869aecd 100644
--- a/drivers/coresight/coresight-etb10.c
+++ b/drivers/coresight/coresight-etb10.c
@@ -313,8 +313,8 @@ static ssize_t etb_read(struct file *file, char __user *data,
*ppos += len;
- dev_dbg(drvdata->dev, "%s: %d bytes copied, %d bytes left\n",
- __func__, len, (int) (depth * 4 - *ppos));
+ dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
+ __func__, len, (int)(depth * 4 - *ppos));
return len;
}
diff --git a/drivers/coresight/coresight-tmc.c b/drivers/coresight/coresight-tmc.c
index 3ff232f9ddf7..030e097c4fb2 100644
--- a/drivers/coresight/coresight-tmc.c
+++ b/drivers/coresight/coresight-tmc.c
@@ -533,8 +533,8 @@ static ssize_t tmc_read(struct file *file, char __user *data, size_t len,
*ppos += len;
- dev_dbg(drvdata->dev, "%s: %d bytes copied, %d bytes left\n",
- __func__, len, (int) (drvdata->size - *ppos));
+ dev_dbg(drvdata->dev, "%s: %zu bytes copied, %d bytes left\n",
+ __func__, len, (int)(drvdata->size - *ppos));
return len;
}
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 3/8] coresight: Adding coresight support for arm64 architecture
2015-03-30 20:13 [PATCH 0/8] coresight: next 4.0-rc6 Mathieu Poirier
2015-03-30 20:13 ` [PATCH 1/8] coresight: making cpu index lookup arm64 compliant Mathieu Poirier
2015-03-30 20:13 ` [PATCH 2/8] coresight: fixing compilation warnings picked up by 64bit compiler Mathieu Poirier
@ 2015-03-30 20:13 ` Mathieu Poirier
2015-03-30 20:13 ` [PATCH 4/8] coresight: Correcting documentation typographical error Mathieu Poirier
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mathieu Poirier @ 2015-03-30 20:13 UTC (permalink / raw)
To: linux-arm-kernel
Most CoreSight blocks are 64-bit ready. As such move configuration
entries from "arch/arm/Kconfig.config" to the driver's subdirectory
and source the newly created Kconfig from architecture specific
Kconfig.debug files.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
---
arch/arm/Kconfig.debug | 55 +-----------------------------------------
arch/arm64/Kconfig.debug | 2 ++
drivers/coresight/Kconfig | 61 +++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 64 insertions(+), 54 deletions(-)
create mode 100644 drivers/coresight/Kconfig
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 970de7518341..8d14ad4e1db0 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1610,59 +1610,6 @@ config DEBUG_SET_MODULE_RONX
against certain classes of kernel exploits.
If in doubt, say "N".
-menuconfig CORESIGHT
- bool "CoreSight Tracing Support"
- select ARM_AMBA
- help
- This framework provides a kernel interface for the CoreSight debug
- and trace drivers to register themselves with. It's intended to build
- a topological view of the CoreSight components based on a DT
- specification and configure the right serie of components when a
- trace source gets enabled.
-
-if CORESIGHT
-config CORESIGHT_LINKS_AND_SINKS
- bool "CoreSight Link and Sink drivers"
- help
- This enables support for CoreSight link and sink drivers that are
- responsible for transporting and collecting the trace data
- respectively. Link and sinks are dynamically aggregated with a trace
- entity at run time to form a complete trace path.
-
-config CORESIGHT_LINK_AND_SINK_TMC
- bool "Coresight generic TMC driver"
- depends on CORESIGHT_LINKS_AND_SINKS
- help
- This enables support for the Trace Memory Controller driver. Depending
- on its configuration the device can act as a link (embedded trace router
- - ETR) or sink (embedded trace FIFO). The driver complies with the
- generic implementation of the component without special enhancement or
- added features.
-
-config CORESIGHT_SINK_TPIU
- bool "Coresight generic TPIU driver"
- depends on CORESIGHT_LINKS_AND_SINKS
- help
- This enables support for the Trace Port Interface Unit driver, responsible
- for bridging the gap between the on-chip coresight components and a trace
- port collection engine, typically connected to an external host for use
- case capturing more traces than the on-board coresight memory can handle.
-
-config CORESIGHT_SINK_ETBV10
- bool "Coresight ETBv1.0 driver"
- depends on CORESIGHT_LINKS_AND_SINKS
- help
- This enables support for the Embedded Trace Buffer version 1.0 driver
- that complies with the generic implementation of the component without
- special enhancement or added features.
+source "drivers/coresight/Kconfig"
-config CORESIGHT_SOURCE_ETM3X
- bool "CoreSight Embedded Trace Macrocell 3.x driver"
- select CORESIGHT_LINKS_AND_SINKS
- help
- This driver provides support for processor ETM3.x and PTM1.x modules,
- which allows tracing the instructions that a processor is executing
- This is primarily useful for instruction level tracing. Depending
- the ETM version data tracing may also be available.
-endif
endmenu
diff --git a/arch/arm64/Kconfig.debug b/arch/arm64/Kconfig.debug
index 4a8741073c90..5b2ffd8e6cdb 100644
--- a/arch/arm64/Kconfig.debug
+++ b/arch/arm64/Kconfig.debug
@@ -89,4 +89,6 @@ config DEBUG_ALIGN_RODATA
If in doubt, say N
+source "drivers/coresight/Kconfig"
+
endmenu
diff --git a/drivers/coresight/Kconfig b/drivers/coresight/Kconfig
new file mode 100644
index 000000000000..fc1f1ae7a49d
--- /dev/null
+++ b/drivers/coresight/Kconfig
@@ -0,0 +1,61 @@
+#
+# Coresight configuration
+#
+menuconfig CORESIGHT
+ bool "CoreSight Tracing Support"
+ select ARM_AMBA
+ help
+ This framework provides a kernel interface for the CoreSight debug
+ and trace drivers to register themselves with. It's intended to build
+ a topological view of the CoreSight components based on a DT
+ specification and configure the right serie of components when a
+ trace source gets enabled.
+
+if CORESIGHT
+config CORESIGHT_LINKS_AND_SINKS
+ bool "CoreSight Link and Sink drivers"
+ help
+ This enables support for CoreSight link and sink drivers that are
+ responsible for transporting and collecting the trace data
+ respectively. Link and sinks are dynamically aggregated with a trace
+ entity at run time to form a complete trace path.
+
+config CORESIGHT_LINK_AND_SINK_TMC
+ bool "Coresight generic TMC driver"
+ depends on CORESIGHT_LINKS_AND_SINKS
+ help
+ This enables support for the Trace Memory Controller driver.
+ Depending on its configuration the device can act as a link (embedded
+ trace router - ETR) or sink (embedded trace FIFO). The driver
+ complies with the generic implementation of the component without
+ special enhancement or added features.
+
+config CORESIGHT_SINK_TPIU
+ bool "Coresight generic TPIU driver"
+ depends on CORESIGHT_LINKS_AND_SINKS
+ help
+ This enables support for the Trace Port Interface Unit driver,
+ responsible for bridging the gap between the on-chip coresight
+ components and a trace for bridging the gap between the on-chip
+ coresight components and a trace port collection engine, typically
+ connected to an external host for use case capturing more traces than
+ the on-board coresight memory can handle.
+
+config CORESIGHT_SINK_ETBV10
+ bool "Coresight ETBv1.0 driver"
+ depends on CORESIGHT_LINKS_AND_SINKS
+ help
+ This enables support for the Embedded Trace Buffer version 1.0 driver
+ that complies with the generic implementation of the component without
+ special enhancement or added features.
+
+config CORESIGHT_SOURCE_ETM3X
+ bool "CoreSight Embedded Trace Macrocell 3.x driver"
+ depends on !ARM64
+ select CORESIGHT_LINKS_AND_SINKS
+ help
+ This driver provides support for processor ETM3.x and PTM1.x modules,
+ which allows tracing the instructions that a processor is executing
+ This is primarily useful for instruction level tracing. Depending
+ the ETM version data tracing may also be available.
+endif
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 4/8] coresight: Correcting documentation typographical error
2015-03-30 20:13 [PATCH 0/8] coresight: next 4.0-rc6 Mathieu Poirier
` (2 preceding siblings ...)
2015-03-30 20:13 ` [PATCH 3/8] coresight: Adding coresight support for arm64 architecture Mathieu Poirier
@ 2015-03-30 20:13 ` Mathieu Poirier
2015-03-30 20:13 ` [PATCH 5/8] coresight: adding the LINKSINK block as a sink type Mathieu Poirier
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mathieu Poirier @ 2015-03-30 20:13 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
Documentation/trace/coresight.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/trace/coresight.txt b/Documentation/trace/coresight.txt
index 02361552a3ea..77d14d51a670 100644
--- a/Documentation/trace/coresight.txt
+++ b/Documentation/trace/coresight.txt
@@ -14,7 +14,7 @@ document is concerned with the latter.
HW assisted tracing is becoming increasingly useful when dealing with systems
that have many SoCs and other components like GPU and DMA engines. ARM has
developed a HW assisted tracing solution by means of different components, each
-being added to a design at systhesis time to cater to specific tracing needs.
+being added to a design at synthesis time to cater to specific tracing needs.
Compoments are generally categorised as source, link and sinks and are
(usually) discovered using the AMBA bus.
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 5/8] coresight: adding the LINKSINK block as a sink type
2015-03-30 20:13 [PATCH 0/8] coresight: next 4.0-rc6 Mathieu Poirier
` (3 preceding siblings ...)
2015-03-30 20:13 ` [PATCH 4/8] coresight: Correcting documentation typographical error Mathieu Poirier
@ 2015-03-30 20:13 ` Mathieu Poirier
2015-03-30 20:13 ` [PATCH 6/8] coresight: remove the unnecessary configuration coresight-default-sink Mathieu Poirier
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Mathieu Poirier @ 2015-03-30 20:13 UTC (permalink / raw)
To: linux-arm-kernel
From: Xia Kaixu <kaixu.xia@linaro.org>
>From the TMC TRM, the ETF can be configured as buffer mode, so ETF can
be a sink type.
Signed-off-by: Xia Kaixu <kaixu.xia@linaro.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/coresight/coresight.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/coresight/coresight.c b/drivers/coresight/coresight.c
index c5def9382357..894531d315b8 100644
--- a/drivers/coresight/coresight.c
+++ b/drivers/coresight/coresight.c
@@ -305,7 +305,9 @@ static int coresight_build_paths(struct coresight_device *csdev,
list_add(&csdev->path_link, path);
- if (csdev->type == CORESIGHT_DEV_TYPE_SINK && csdev->activated) {
+ if ((csdev->type == CORESIGHT_DEV_TYPE_SINK ||
+ csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) &&
+ csdev->activated) {
if (enable)
ret = coresight_enable_path(path);
else
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 6/8] coresight: remove the unnecessary configuration coresight-default-sink
2015-03-30 20:13 [PATCH 0/8] coresight: next 4.0-rc6 Mathieu Poirier
` (4 preceding siblings ...)
2015-03-30 20:13 ` [PATCH 5/8] coresight: adding the LINKSINK block as a sink type Mathieu Poirier
@ 2015-03-30 20:13 ` Mathieu Poirier
2015-03-30 20:13 ` [PATCH 7/8] coresight-tmc: Adding a status interface to sysfs Mathieu Poirier
2015-03-30 20:13 ` [PATCH 8/8] coresight: moving to new "hwtracing" directory Mathieu Poirier
7 siblings, 0 replies; 9+ messages in thread
From: Mathieu Poirier @ 2015-03-30 20:13 UTC (permalink / raw)
To: linux-arm-kernel
From: Kaixu Xia <xiakaixu@huawei.com>
The coresight-default-sink configuration option has been
removed from the framework. As such remove it from DT and bindings.
Signed-off-by: Kaixu Xia <xiakaixu@huawei.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
Documentation/devicetree/bindings/arm/coresight.txt | 1 -
arch/arm/boot/dts/hip04.dtsi | 1 -
arch/arm/boot/dts/omap3-beagle-xm.dts | 1 -
arch/arm/boot/dts/omap3-beagle.dts | 1 -
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 1 -
5 files changed, 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index a3089359aaa6..88602b75418e 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -61,7 +61,6 @@ Example:
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0 0x20010000 0 0x1000>;
- coresight-default-sink;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
port {
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 238814596a87..44044f275115 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -275,7 +275,6 @@
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0 0xe3c42000 0 0x1000>;
- coresight-default-sink;
clocks = <&clk_375m>;
clock-names = "apb_pclk";
port {
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 25f7b0a22114..8cdca51b6984 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -150,7 +150,6 @@
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x5401b000 0x1000>;
- coresight-default-sink;
clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
port {
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index c792391ef090..6d4c46be8c39 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -145,7 +145,6 @@
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x5401b000 0x1000>;
- coresight-default-sink;
clocks = <&emu_src_ck>;
clock-names = "apb_pclk";
port {
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index 33920df03640..7a2aeacd62c0 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -362,7 +362,6 @@
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0 0x20010000 0 0x1000>;
- coresight-default-sink;
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
port {
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 7/8] coresight-tmc: Adding a status interface to sysfs
2015-03-30 20:13 [PATCH 0/8] coresight: next 4.0-rc6 Mathieu Poirier
` (5 preceding siblings ...)
2015-03-30 20:13 ` [PATCH 6/8] coresight: remove the unnecessary configuration coresight-default-sink Mathieu Poirier
@ 2015-03-30 20:13 ` Mathieu Poirier
2015-03-30 20:13 ` [PATCH 8/8] coresight: moving to new "hwtracing" directory Mathieu Poirier
7 siblings, 0 replies; 9+ messages in thread
From: Mathieu Poirier @ 2015-03-30 20:13 UTC (permalink / raw)
To: linux-arm-kernel
Knowing the state of various control register is always
useful for degging and tuning. As such add an entry in
sysfs that expose to userspace the most important registers.
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
drivers/coresight/coresight-tmc.c | 56 +++++++++++++++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
diff --git a/drivers/coresight/coresight-tmc.c b/drivers/coresight/coresight-tmc.c
index 030e097c4fb2..7147f3dd363c 100644
--- a/drivers/coresight/coresight-tmc.c
+++ b/drivers/coresight/coresight-tmc.c
@@ -565,6 +565,59 @@ static const struct file_operations tmc_fops = {
.llseek = no_llseek,
};
+static ssize_t status_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int ret;
+ unsigned long flags;
+ u32 tmc_rsz, tmc_sts, tmc_rrp, tmc_rwp, tmc_trg;
+ u32 tmc_ctl, tmc_ffsr, tmc_ffcr, tmc_mode, tmc_pscr;
+ u32 devid;
+ struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
+
+ ret = clk_prepare_enable(drvdata->clk);
+ if (ret)
+ goto out;
+
+ spin_lock_irqsave(&drvdata->spinlock, flags);
+ CS_UNLOCK(drvdata->base);
+
+ tmc_rsz = readl_relaxed(drvdata->base + TMC_RSZ);
+ tmc_sts = readl_relaxed(drvdata->base + TMC_STS);
+ tmc_rrp = readl_relaxed(drvdata->base + TMC_RRP);
+ tmc_rwp = readl_relaxed(drvdata->base + TMC_RWP);
+ tmc_trg = readl_relaxed(drvdata->base + TMC_TRG);
+ tmc_ctl = readl_relaxed(drvdata->base + TMC_CTL);
+ tmc_ffsr = readl_relaxed(drvdata->base + TMC_FFSR);
+ tmc_ffcr = readl_relaxed(drvdata->base + TMC_FFCR);
+ tmc_mode = readl_relaxed(drvdata->base + TMC_MODE);
+ tmc_pscr = readl_relaxed(drvdata->base + TMC_PSCR);
+ devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
+
+ CS_LOCK(drvdata->base);
+ spin_unlock_irqrestore(&drvdata->spinlock, flags);
+
+ clk_disable_unprepare(drvdata->clk);
+
+ return sprintf(buf,
+ "Depth:\t\t0x%x\n"
+ "Status:\t\t0x%x\n"
+ "RAM read ptr:\t0x%x\n"
+ "RAM wrt ptr:\t0x%x\n"
+ "Trigger cnt:\t0x%x\n"
+ "Control:\t0x%x\n"
+ "Flush status:\t0x%x\n"
+ "Flush ctrl:\t0x%x\n"
+ "Mode:\t\t0x%x\n"
+ "PSRC:\t\t0x%x\n"
+ "DEVID:\t\t0x%x\n",
+ tmc_rsz, tmc_sts, tmc_rrp, tmc_rwp, tmc_trg,
+ tmc_ctl, tmc_ffsr, tmc_ffcr, tmc_mode, tmc_pscr, devid);
+out:
+ return -EINVAL;
+}
+static DEVICE_ATTR_RO(status);
+
static ssize_t trigger_cntr_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@@ -593,18 +646,21 @@ static DEVICE_ATTR_RW(trigger_cntr);
static struct attribute *coresight_etb_attrs[] = {
&dev_attr_trigger_cntr.attr,
+ &dev_attr_status.attr,
NULL,
};
ATTRIBUTE_GROUPS(coresight_etb);
static struct attribute *coresight_etr_attrs[] = {
&dev_attr_trigger_cntr.attr,
+ &dev_attr_status.attr,
NULL,
};
ATTRIBUTE_GROUPS(coresight_etr);
static struct attribute *coresight_etf_attrs[] = {
&dev_attr_trigger_cntr.attr,
+ &dev_attr_status.attr,
NULL,
};
ATTRIBUTE_GROUPS(coresight_etf);
--
1.9.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 8/8] coresight: moving to new "hwtracing" directory
2015-03-30 20:13 [PATCH 0/8] coresight: next 4.0-rc6 Mathieu Poirier
` (6 preceding siblings ...)
2015-03-30 20:13 ` [PATCH 7/8] coresight-tmc: Adding a status interface to sysfs Mathieu Poirier
@ 2015-03-30 20:13 ` Mathieu Poirier
7 siblings, 0 replies; 9+ messages in thread
From: Mathieu Poirier @ 2015-03-30 20:13 UTC (permalink / raw)
To: linux-arm-kernel
Keeping drivers related to HW tracing on ARM, i.e coresight,
under "drivers/coresight" doesn't make sense when other
architectures start rolling out technologies of the same
nature.
As such creating a new "drivers/hwtracing" directory where all
drivers of the same kind can reside, reducing namespace
pollution under "drivers/".
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
MAINTAINERS | 2 +-
arch/arm/Kconfig.debug | 2 +-
arch/arm64/Kconfig.debug | 2 +-
drivers/Makefile | 2 +-
drivers/{ => hwtracing}/coresight/Kconfig | 0
drivers/{ => hwtracing}/coresight/Makefile | 0
drivers/{ => hwtracing}/coresight/coresight-etb10.c | 0
drivers/{ => hwtracing}/coresight/coresight-etm-cp14.c | 0
drivers/{ => hwtracing}/coresight/coresight-etm.h | 0
drivers/{ => hwtracing}/coresight/coresight-etm3x.c | 0
drivers/{ => hwtracing}/coresight/coresight-funnel.c | 0
drivers/{ => hwtracing}/coresight/coresight-priv.h | 0
drivers/{ => hwtracing}/coresight/coresight-replicator.c | 0
drivers/{ => hwtracing}/coresight/coresight-tmc.c | 0
drivers/{ => hwtracing}/coresight/coresight-tpiu.c | 0
drivers/{ => hwtracing}/coresight/coresight.c | 0
drivers/{ => hwtracing}/coresight/of_coresight.c | 0
17 files changed, 4 insertions(+), 4 deletions(-)
rename drivers/{ => hwtracing}/coresight/Kconfig (100%)
rename drivers/{ => hwtracing}/coresight/Makefile (100%)
rename drivers/{ => hwtracing}/coresight/coresight-etb10.c (100%)
rename drivers/{ => hwtracing}/coresight/coresight-etm-cp14.c (100%)
rename drivers/{ => hwtracing}/coresight/coresight-etm.h (100%)
rename drivers/{ => hwtracing}/coresight/coresight-etm3x.c (100%)
rename drivers/{ => hwtracing}/coresight/coresight-funnel.c (100%)
rename drivers/{ => hwtracing}/coresight/coresight-priv.h (100%)
rename drivers/{ => hwtracing}/coresight/coresight-replicator.c (100%)
rename drivers/{ => hwtracing}/coresight/coresight-tmc.c (100%)
rename drivers/{ => hwtracing}/coresight/coresight-tpiu.c (100%)
rename drivers/{ => hwtracing}/coresight/coresight.c (100%)
rename drivers/{ => hwtracing}/coresight/of_coresight.c (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1de6afa8ee51..4bcaaf950cb9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -953,7 +953,7 @@ ARM/CORESIGHT FRAMEWORK AND DRIVERS
M: Mathieu Poirier <mathieu.poirier@linaro.org>
L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
S: Maintained
-F: drivers/coresight/*
+F: drivers/hwtracing/coresight/*
F: Documentation/trace/coresight.txt
F: Documentation/devicetree/bindings/arm/coresight.txt
F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 8d14ad4e1db0..8b0183a9a300 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1610,6 +1610,6 @@ config DEBUG_SET_MODULE_RONX
against certain classes of kernel exploits.
If in doubt, say "N".
-source "drivers/coresight/Kconfig"
+source "drivers/hwtracing/coresight/Kconfig"
endmenu
diff --git a/arch/arm64/Kconfig.debug b/arch/arm64/Kconfig.debug
index 5b2ffd8e6cdb..d6285ef9b5f9 100644
--- a/arch/arm64/Kconfig.debug
+++ b/arch/arm64/Kconfig.debug
@@ -89,6 +89,6 @@ config DEBUG_ALIGN_RODATA
If in doubt, say N
-source "drivers/coresight/Kconfig"
+source "drivers/hwtracing/coresight/Kconfig"
endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index 527a6da8d539..46d2554be404 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -163,5 +163,5 @@ obj-$(CONFIG_POWERCAP) += powercap/
obj-$(CONFIG_MCB) += mcb/
obj-$(CONFIG_RAS) += ras/
obj-$(CONFIG_THUNDERBOLT) += thunderbolt/
-obj-$(CONFIG_CORESIGHT) += coresight/
+obj-$(CONFIG_CORESIGHT) += hwtracing/coresight/
obj-$(CONFIG_ANDROID) += android/
diff --git a/drivers/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig
similarity index 100%
rename from drivers/coresight/Kconfig
rename to drivers/hwtracing/coresight/Kconfig
diff --git a/drivers/coresight/Makefile b/drivers/hwtracing/coresight/Makefile
similarity index 100%
rename from drivers/coresight/Makefile
rename to drivers/hwtracing/coresight/Makefile
diff --git a/drivers/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c
similarity index 100%
rename from drivers/coresight/coresight-etb10.c
rename to drivers/hwtracing/coresight/coresight-etb10.c
diff --git a/drivers/coresight/coresight-etm-cp14.c b/drivers/hwtracing/coresight/coresight-etm-cp14.c
similarity index 100%
rename from drivers/coresight/coresight-etm-cp14.c
rename to drivers/hwtracing/coresight/coresight-etm-cp14.c
diff --git a/drivers/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h
similarity index 100%
rename from drivers/coresight/coresight-etm.h
rename to drivers/hwtracing/coresight/coresight-etm.h
diff --git a/drivers/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
similarity index 100%
rename from drivers/coresight/coresight-etm3x.c
rename to drivers/hwtracing/coresight/coresight-etm3x.c
diff --git a/drivers/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c
similarity index 100%
rename from drivers/coresight/coresight-funnel.c
rename to drivers/hwtracing/coresight/coresight-funnel.c
diff --git a/drivers/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
similarity index 100%
rename from drivers/coresight/coresight-priv.h
rename to drivers/hwtracing/coresight/coresight-priv.h
diff --git a/drivers/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c
similarity index 100%
rename from drivers/coresight/coresight-replicator.c
rename to drivers/hwtracing/coresight/coresight-replicator.c
diff --git a/drivers/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
similarity index 100%
rename from drivers/coresight/coresight-tmc.c
rename to drivers/hwtracing/coresight/coresight-tmc.c
diff --git a/drivers/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c
similarity index 100%
rename from drivers/coresight/coresight-tpiu.c
rename to drivers/hwtracing/coresight/coresight-tpiu.c
diff --git a/drivers/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
similarity index 100%
rename from drivers/coresight/coresight.c
rename to drivers/hwtracing/coresight/coresight.c
diff --git a/drivers/coresight/of_coresight.c b/drivers/hwtracing/coresight/of_coresight.c
similarity index 100%
rename from drivers/coresight/of_coresight.c
rename to drivers/hwtracing/coresight/of_coresight.c
--
1.9.1
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