From mboxrd@z Thu Jan 1 00:00:00 1970 From: mcoquelin.stm32@gmail.com (Maxime Coquelin) Date: Tue, 31 Mar 2015 18:24:48 +0200 Subject: [PATCH v4 07/15] dt-bindings: Document the STM32 timer bindings In-Reply-To: <1427819096-31109-1-git-send-email-mcoquelin.stm32@gmail.com> References: <1427819096-31109-1-git-send-email-mcoquelin.stm32@gmail.com> Message-ID: <1427819096-31109-8-git-send-email-mcoquelin.stm32@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This adds documentation of device tree bindings for the STM32 timer. Tested-by: Chanwoo Choi Signed-off-by: Maxime Coquelin --- .../devicetree/bindings/timer/st,stm32-timer.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/st,stm32-timer.txt diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.txt b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt new file mode 100644 index 0000000..d3fdeb0 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt @@ -0,0 +1,22 @@ +. STMicroelectronics STM32 timer + +The STM32 MCUs family has several general-purpose 16 and 32 bits timers. + +Required properties: +- compatible : Should be st,stm32-timer" +- reg : Address and length of the register set +- clocks : Reference on the timer input clock +- interrupts : Reference to the timer interrupt + +Optional properties: +- resets: Reference to a reset controller asserting the timer + +Example: + +timer5: timer at 40000c00 { + compatible = "st,stm32-timer"; + reg = <0x40000c00 0x400>; + interrupts = <50>; + resets = <&rrc 259>; + clocks = <&clk_pmtr1>; +}; -- 1.9.1